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NCN5192NGEVB

http://onsemi.com

6

C

2

, C

3

 and C

14

 are 100 nF ceramic decoupling capacitors

located directly adjacent to each power pin. For analog
power pins, an additional large-value ceramic capacitor may
be needed in addition to the 100 nF decoupling capacitor
when the application is intended for high-noise
environments.

For loop-powered devices, additional decoupling with a

large value capacitor is advised to prevent digital noise from
being transmitted on the current loop.

Additional ferrite beads in series with power supply lines

can help to reduce EMI.

Reference Voltages and Comparator Bias

NCN5192 needs an external analog reference voltage.

This reference is used by receiver or demodulator (RX)
comparator, carrier detect (CD), and voltage supervisor.

The AREF reference voltage sets the trip point of the

demodulation operational amplifier of the NCP5192. The
AREF reference voltage is also used in setting the DC
operating point of the received signal after it has passed
through the band-pass receive filter. The ideal value for the
AREF reference voltage depends on the voltage supply, and
is chosen roughly half-way the operating range of the
operational amplifiers. This ensures the range of the
operational amplifier is maximized. For operation at 3 V, a
1.24 V reference voltage is recommended. For operation at
5 V, a 2.5 V reference voltage is recommended.

For NCN5192NGEVB, a series regulator is used with an

internal reference of 1.25 V. The chosen regulator has a very
low supply current, to optimize power usage. Using a series

regulator is more desirable from a power usage perspective,
as a series regulator’s current draw will vary with the output
current, whereas a shunt regulator is dimensioned on the
maximum current draw and will always draw the same
current. Large capacitors on the in- and output of the voltage
regulator increase the reference stability.

The CDREF reference voltage sets the threshold for the

carrier detect comparator. As the received signal is biased at
AREF, the difference between CDREF and AREF will
determine the minimum amplitude needed for the carrier
detect comparator to flip. A (AREF-CDREF) of 80 mV
corresponds to signal of approximately 100 mV
peak-to-peak at the input of the receive filter. The CDREF
reference voltage on the NCN5192NGEVB is generated by
a resistor division of the AREF reference.

An external resistor is required to set the bias current. The

voltage over the bias resistor is regulated to AREF, so that
the resistor determines a bias current. This bias current
controls the operating parameters of the internal operational
amplifiers and comparators and should be set to
approximately 2.5

m

A. For low cost solutions, a 470 k

W

 is

acceptable with minimal effect on operation.

Table 3. REFERENCE VOLTAGES

Description

Value

AREF Reference Voltage

1.248 V

CDREF Reference Voltage

1.163 V

Figure 6. Reference Voltages Schematic

www.BDTIC.com/ON/

Summary of Contents for NCN5192NGEVB

Page 1: ...g carrier detect and transmit signal shaping The NCN5192 also includes an internal 16 bit sigma delta modulation DAC for easy implementation of slave devices An SPI bus provides easy communication to...

Page 2: ...modulator and demodulator module communicating with a UART without internal buffer as well as an internal 16 bit sigma delta DAC The NCN5192 requires some external filter components and a 460 8 kHz 92...

Page 3: ...NCN5192NGEVB http onsemi com 3 NCN5192NGEVB DESCRIPTION Schematic Diagram BOM List Figure 2 NCN5192NGEVB Schematic www BDTIC com ON...

Page 4: ...kW 0603 7 R15 R39 0 R 0603 2 R25 560 kW 0603 1 R26 R27 R28 R32 R35 470 kW 0603 5 R29 33 kW 0603 1 R33 680 kW 0603 1 R34 3M3 0603 1 R37 4k7 0603 1 TP5 TP6 TP7 TP8 Do Not Populate DNP 4 U1 ON Semicondu...

Page 5: ...es an internal voltage supervisor This will guarantee correct operation of the digital circuitry during start up All that is required for using this supervisor is an external resistor divider R25 R26...

Page 6: ...e is recommended For NCN5192NGEVB a series regulator is used with an internal reference of 1 25 V The chosen regulator has a very low supply current to optimize power usage Using a series regulator is...

Page 7: ...70 100 mA less However care must be taken that this external signal has the required frequency accuracy 1 Duty cycle of the clock signal is specified between 40 and 60 No errors were observed during...

Page 8: ...e 10 The skew time is measured from the initial falling edge of the start bit to the center of the 11th bit cell This 21 skew by itself is a relatively good result However there is another error sourc...

Page 9: ...used for the implementation of a slave analog transmitter The included DAC has a Sigma Delta topology This means that the output of the DAC is constantly switching between 0 V en DACREF 3 V on the eva...

Page 10: ...larger output range is achieved but at the cost of accuracy In non RTZ mode 16 bit accuracy will be harder to obtain To achieve maximum accuracy of the DAC it is also advised to use a separate low noi...

Page 11: ...is a band pass filter based on a Sallen Key topology allowing only frequencies around the HART signal frequencies to pass through For a more detailed description of the filter see the user manual of A...

Page 12: ...sistor R3 should be placed on the negative input and dimensioned to approach the impedance seen by the positive terminal The amplifier will then determine the current flowing through the loop by chang...

Page 13: ...and range of the ADC A HART Master can have a sense resistor ranging from 230 W to 600 W Increasing the sense resistor will result in higher amplitude HART signal received but will also reduce the vol...

Page 14: ...NCN5192NGEVB http onsemi com 14 Figure 19 Sample Master Implementation www BDTIC com ON...

Page 15: ...surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where persona...

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