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NCN5192NGEVB

http://onsemi.com

13

is a virtual ground, as this assumption is only valid for DC
signals. We can, however, find a relationship between input
amplitude and output amplitude. We know that the positive
amplifier input voltage has the following form, due to the
summing network:

V

)

+

ǒ

R

1

ńń

R

2

ńń

ǒ

R

4

)

R

5

Ǔ

Ǔ

ǒ

V

in

R

1

*

V

out

R

2

Ǔ

The amplifier is configured as an integrator for low

frequencies, but for high frequencies, the amplifier
configuration has a gain of 1, and the transistor is configured
as a voltage follower, so we can conclude that for AC
frequencies V

+

 = V

out

. Taking this into account, we get the

following equation:

V

out

+

R

2

R

1

ǒ

R

1

ńń

R

2

ńń

ǒ

R

4

)

R

5

Ǔ

Ǔ

ǒ

R

1

ńń

R

2

ńń

ǒ

R

4

)

R

5

Ǔ

Ǔ

)

R

2

V

in

Reconfiguring for the unknown R

1

:

R

1

+

R

2

ǒ

R

4

)

R

5

Ǔ

V

in

)

V

out

ǒ

R

2

)

R

3

Ǔ

V

out

ǒ

1

)

ǒ

R

4

)

R

5

Ǔ

Ǔ

The amplifier is configured as an integrator for low

frequencies. Care must be taken that the 3-dB frequency of
the integrator is below the HART band, so that the amplifier
gain in that band is independent of frequency. The resistor
R

3

 

is chosen so that it compensates for input bias current.

This is achieved by taking a value close to the resistance seen
on the positive terminal. This means that the capacitor C

2

needs to be chosen so that (2

p

 R

3

C

2

)

1

 < 1 kHz.

Figure 18. Sample Slave Implementation

Master Implementation

An example of a possible master implementation is shown

in Figure 19.

The current loop master has a sense resistor over which the

current flowing through the loop can be measured. The value
of this resistor varies depending on the sensitivity required
and range of the ADC. A HART Master can have a sense
resistor ranging from 230 

W

 to 600

W

. Increasing the sense

resistor will result in higher amplitude HART signal
received, but will also reduce the voltage available on the
slave side. Furthermore, if you wish to sense the analog
transmitted signal, the MSB of your DAC may limit the
resistor size. If this limitation is too stringent, the sense
resistor can be split in two resistors, as shown in the figure,
effectively creating a resistor divider.

To transmit a HART signal, the TxA signal will need to be

amplified, as the NCN5192 transmit circuit can only drive
high impedance circuits (>30 k

W

). An additional

operational amplifier is required. Depending on the sense

resistor used, some gain or attenuation may be required to
get a 1 mA peak-to-peak HART output signal. This can be
accomplished by the resistors R

3

 and R

4

. For a typical sense

resistor of 500

W

, a unity gain suffices and a unity gain

operational amplifier configuration can be used instead.

The amplifier however has a low impedance output,

which cannot be paralleled with the sense resistor, as this
would cause problems when the slave is transmitting. This
problem is solved by adding a series switch (such as
MC74VHC1G66DTT1G), controlled by the RTS signal.
For a normally open switch, the nRTS signal as applied to the
NCN5192 must be inverted first. To reduce power usage, the
operational amplifier can be disabled when the transmitter
is turned off. This is both done by inserting PNP transistor
Q

1

on the V

DD

 connection of the amplifier.

To couple the signal into the current loop, a single

capacitor was used. For other coupling techniques see
application note AND8346/D.

www.BDTIC.com/ON/

Summary of Contents for NCN5192NGEVB

Page 1: ...g carrier detect and transmit signal shaping The NCN5192 also includes an internal 16 bit sigma delta modulation DAC for easy implementation of slave devices An SPI bus provides easy communication to...

Page 2: ...modulator and demodulator module communicating with a UART without internal buffer as well as an internal 16 bit sigma delta DAC The NCN5192 requires some external filter components and a 460 8 kHz 92...

Page 3: ...NCN5192NGEVB http onsemi com 3 NCN5192NGEVB DESCRIPTION Schematic Diagram BOM List Figure 2 NCN5192NGEVB Schematic www BDTIC com ON...

Page 4: ...kW 0603 7 R15 R39 0 R 0603 2 R25 560 kW 0603 1 R26 R27 R28 R32 R35 470 kW 0603 5 R29 33 kW 0603 1 R33 680 kW 0603 1 R34 3M3 0603 1 R37 4k7 0603 1 TP5 TP6 TP7 TP8 Do Not Populate DNP 4 U1 ON Semicondu...

Page 5: ...es an internal voltage supervisor This will guarantee correct operation of the digital circuitry during start up All that is required for using this supervisor is an external resistor divider R25 R26...

Page 6: ...e is recommended For NCN5192NGEVB a series regulator is used with an internal reference of 1 25 V The chosen regulator has a very low supply current to optimize power usage Using a series regulator is...

Page 7: ...70 100 mA less However care must be taken that this external signal has the required frequency accuracy 1 Duty cycle of the clock signal is specified between 40 and 60 No errors were observed during...

Page 8: ...e 10 The skew time is measured from the initial falling edge of the start bit to the center of the 11th bit cell This 21 skew by itself is a relatively good result However there is another error sourc...

Page 9: ...used for the implementation of a slave analog transmitter The included DAC has a Sigma Delta topology This means that the output of the DAC is constantly switching between 0 V en DACREF 3 V on the eva...

Page 10: ...larger output range is achieved but at the cost of accuracy In non RTZ mode 16 bit accuracy will be harder to obtain To achieve maximum accuracy of the DAC it is also advised to use a separate low noi...

Page 11: ...is a band pass filter based on a Sallen Key topology allowing only frequencies around the HART signal frequencies to pass through For a more detailed description of the filter see the user manual of A...

Page 12: ...sistor R3 should be placed on the negative input and dimensioned to approach the impedance seen by the positive terminal The amplifier will then determine the current flowing through the loop by chang...

Page 13: ...and range of the ADC A HART Master can have a sense resistor ranging from 230 W to 600 W Increasing the sense resistor will result in higher amplitude HART signal received but will also reduce the vol...

Page 14: ...NCN5192NGEVB http onsemi com 14 Figure 19 Sample Master Implementation www BDTIC com ON...

Page 15: ...surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where persona...

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