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NCN5192NGEVB

http://onsemi.com

12

APPLICATION IDEAS

The NCN5192 takes care of the HART modulation. This

HART signal must then be superimposed on a 4-20 mA
current loop. The NCN5192 simplifies slave implementation

by including an integrated DAC. Below are some possible
implementations of both a master and slave transmitter.

Slave Implementation

A simple slave implementation is shown in Figure 18. The

analog loop current is set by the integrated DAC, and HART
signals are added to this by a resistive summing network.
The DAC is implemented as a sigma-delta modulator, which
means that additional filtering should be implemented. To
explain the operation of this circuit, let us first look at an
example where the DAC is not of a switching topology, such
as shown in Figure 17. As one end of R

6

 is tied to local

ground, and current passing through R

7

 also passes through

R

6,

 it can easily be seen that the voltage at the negative loop

terminal is negative with respect to the local ground.
Resistor R

4

 is then chosen so that in steady state their

common terminal is a virtual ground point in the absence of
HART signals, since the negative terminal of the amplifier
is also connected to ground. A similar principle applies
when HART signals are applied. So both amplifier inputs are
regulated to ground.

Figure 17. Simple Slave Implementation

A compensation capacitor C

4

 may be required depending

on the operational amplifier used. To avoid offset generated
by bias current in the operational amplifier, a resistor R

3

should be placed on the negative input, and dimensioned to
approach the impedance seen by the positive terminal.

The amplifier will then determine the current flowing

through the loop by changing the base of a transistor in
emitter feedback configuration. The value for R

7

 is

determined by the output range V

o,max

 of the amplifier used:

R

7, max

+

V

o, max

*

V

BE

20 mA

It is often recommended to take a value as large as

possible, so that noise effects are minimal.

Typically the value of R

6

 is chosen equal to R

7

. The

voltage over R

6

 and R

7

 combined should however be less

than 12 V when the current setting is 20 mA.

Next, the value of R

4

 is chosen depending on the most

significant bit of the DAC.

2 V

MSB

R

2

+

20 mA R

6

R

4

When the DAC is not a switching topology, we can now

choose R

1

 and C

1

. We have:

500 mV R

2

+

1 mA R

6

Z

Where:

Z

+

Ť

1

sC

1

)

R

1

Ť

In practice, C

1

 is chosen sufficiently large so that Z

R

1

.

Because the integrated DAC has a sigma-delta output, a

circuit using the NCP5192 gets a bit more complicated, as
can be seen in Figure 18. We need to filter away high
frequency DAC components, but leave HART signals intact.
A simple RC-filter is not sufficient, since the output
capacitor has low impedance for HART frequencies. We can
do this by replacing the summing resistor R

4

 by a T-filter.

This filter has high output impedance due to the output
resistor.

To dimension this filter without too much calculation, we

can treat it as a RC-filter using its first branch. The 3-dB
frequency should be placed just above the DAC bandwidth
(10 Hz).

We get, with R

4

R

5

:

f

3dB

+

1

2

p

C

3

R

4

To dimension the summing resistor of the HART input, we

can no longer assume that the positive input of the amplifier

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Summary of Contents for NCN5192NGEVB

Page 1: ...g carrier detect and transmit signal shaping The NCN5192 also includes an internal 16 bit sigma delta modulation DAC for easy implementation of slave devices An SPI bus provides easy communication to...

Page 2: ...modulator and demodulator module communicating with a UART without internal buffer as well as an internal 16 bit sigma delta DAC The NCN5192 requires some external filter components and a 460 8 kHz 92...

Page 3: ...NCN5192NGEVB http onsemi com 3 NCN5192NGEVB DESCRIPTION Schematic Diagram BOM List Figure 2 NCN5192NGEVB Schematic www BDTIC com ON...

Page 4: ...kW 0603 7 R15 R39 0 R 0603 2 R25 560 kW 0603 1 R26 R27 R28 R32 R35 470 kW 0603 5 R29 33 kW 0603 1 R33 680 kW 0603 1 R34 3M3 0603 1 R37 4k7 0603 1 TP5 TP6 TP7 TP8 Do Not Populate DNP 4 U1 ON Semicondu...

Page 5: ...es an internal voltage supervisor This will guarantee correct operation of the digital circuitry during start up All that is required for using this supervisor is an external resistor divider R25 R26...

Page 6: ...e is recommended For NCN5192NGEVB a series regulator is used with an internal reference of 1 25 V The chosen regulator has a very low supply current to optimize power usage Using a series regulator is...

Page 7: ...70 100 mA less However care must be taken that this external signal has the required frequency accuracy 1 Duty cycle of the clock signal is specified between 40 and 60 No errors were observed during...

Page 8: ...e 10 The skew time is measured from the initial falling edge of the start bit to the center of the 11th bit cell This 21 skew by itself is a relatively good result However there is another error sourc...

Page 9: ...used for the implementation of a slave analog transmitter The included DAC has a Sigma Delta topology This means that the output of the DAC is constantly switching between 0 V en DACREF 3 V on the eva...

Page 10: ...larger output range is achieved but at the cost of accuracy In non RTZ mode 16 bit accuracy will be harder to obtain To achieve maximum accuracy of the DAC it is also advised to use a separate low noi...

Page 11: ...is a band pass filter based on a Sallen Key topology allowing only frequencies around the HART signal frequencies to pass through For a more detailed description of the filter see the user manual of A...

Page 12: ...sistor R3 should be placed on the negative input and dimensioned to approach the impedance seen by the positive terminal The amplifier will then determine the current flowing through the loop by chang...

Page 13: ...and range of the ADC A HART Master can have a sense resistor ranging from 230 W to 600 W Increasing the sense resistor will result in higher amplitude HART signal received but will also reduce the vol...

Page 14: ...NCN5192NGEVB http onsemi com 14 Figure 19 Sample Master Implementation www BDTIC com ON...

Page 15: ...surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where persona...

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