background image

PFC SPM

®

 Design Guide 

 

© 2005 

Rev. 1.0.1-2012 

Fairchild Semiconductor – System Engineering Group 

 8 

 

   

s :  j

(= j

2

f) 

Control Loop  Implementation 

Current Loop 

[Step 1]

 Crossover frequency 

Theoretical crossover frequency is given by following equation. 

kHz

f

f

S

C

7

.

6

6

 

 

 

 

 

(Eq.3) 

[Step 2]

 Fz and Fp decision 

kHz

f

f

C

Z

3

.

3

2

kHz

f

f

Z

P

20

6

 

[Step 3]

 Rz, Cp, Cz decision 

R

i

 is same to R

MO

. (Refer to “other parameters” in page 10) 

R

i

 = 470[

], 

In Eq.1, 

dB

L

f

R

V

sL

R

V

G

C

SH

DC

SH

DC

kHz

f

PST

C

8

.

39

0103

.

0

)

2

(

4

4

6

.

6

 

Therefore it requires 40dB boosting at fc(=6.6kHz). 

R

z

 is given by Eq.7.   

dB

R

R

G

i

z

dB

40

log

20

 

 R

z

 = 47[k

], 

From Eq.4 ,Eq.5, Cp and Cz is given. 

C

p

 = 180[pF],   

C

z

 = 1[nF] 

z

z

z

C

R

f

2

1

 

 

 

 

(Eq.4) 

p

z

z

p

z

p

C

C

R

C

C

f

2

   

 

 

(Eq.5) 

Summary of Contents for Fairchild PFC SPM

Page 1: ...y ON Semiconductor Typical parameters which may be provided in ON Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time Al...

Page 2: ...v 1 0 1 2012 Fairchild Semiconductor System Engineering Group 1 Application Note AN 9041 PFC SPM Design Guide with Analog PFC IC Written by Application Engineering Part Motion Control System Team HV P...

Page 3: ...nce and Inductance design 5 Output Voltage Ripple Output Capacitance 5 Inductance Input Current Ripple 6 Open Loop Response 6 Current Loop Amplifier 7 Voltage Loop Amplifier 7 Control Loop Implementat...

Page 4: ...g Fig 2 shows the timing chart of protection function There are two kind of protection level for both OCP and OVP Generally PFC control ICs have its own OCP and OVP function Also user can make the PFC...

Page 5: ...evel 1 suppresses voltage overshoot in transient situation It doesn t generate fault out signal OVP Level 2 PFC SPM The voltage level of OVP level 2 is higher than that of OVP level 1 When OV situatio...

Page 6: ...tage Vimin 176 Vac 3 Nominal Input Voltage Vinom 220 Vac 4 Maximum Input Voltage Vimax 264 Vac 5 Output Max Power Po 5000 W 6 Minimum Output Voltage Vomin 350 Vdc 7 Nominal Output Voltage Vonom 380 Vd...

Page 7: ...LV V V V I P P fL V I OUTDC MAX L P P 4 OUTDC IN V V 2 1 A I MAX L P P 5 475 40000 20 380 20 H f V L OUTDC fs 40kHz Current ripple is decided by switching frequency and inductance To reduce current ri...

Page 8: ...put of the multiplier and the voltage of the current sensing resister is amplified by the current loop The VEA output of the current loop is the reference voltage to the comparameter that generates th...

Page 9: ...C 7 6 6 Eq 3 Step 2 Fz and Fp decision kHz f f C Z 3 3 2 kHz f f Z P 20 6 Step 3 Rz Cp Cz decision Ri is same to RMO Refer to other parameters in page 10 Ri 470 In Eq 1 dB L f R V sL R V G C SH DC SH...

Page 10: ...r System Engineering Group 9 R i C p C z R z I A C A O U T I A R M O Fig 4 Current loop circuit Fig 5 Desired current error amplifier response 1 z i dB C fR G 2 1 log 20 Eq 6 2 i z dB R R G log 20 Eq...

Page 11: ...VD is added between E A input and sensing resistor By virtue of large RVD CVF can be replaced by small SMD type capacitor k RVD 120 RVS M R R VD VF 1 8 RVD 120 2 1 VF VD CV C R f CVF 1uF Hz fCV 3 1 C...

Page 12: ...ance can cause distortions at low level current RAC Optocoupler circuit Optocuopler TLP180 RAC RFF UCC3818 ISINE VFF CL VCC Optocoupler 1 2 5 4 RAX CFF RL Rc1 Rc2 Fig 7 Input AC voltage sensing circui...

Page 13: ...t protection circuit The actual protection level can be slightly different from the calculated value It depends on PCB layout pattern About demo board the designed values are R18 R40 1 2 k R19 R37 82...

Page 14: ...ver voltage protection circuit About demo board the designed values are RX 15 k RY 1 8 k RZ 870 270 270 330 k And the expected OC levels are 1 OVP level 1 422 8 8 16 8 886 _ _ _ _ V V R R R R R V V V...

Page 15: ...VD VL DC V R R R R R V R R R R R R R R R R R R R R V 2 1 1 1 1 1 1 1 1 1 1 5 7 The variable VDC voltage is available by just changing VSIG voltage VEA the output of voltage error amplifier changes fro...

Page 16: ...sults Fig 12 shows the overall schematics of implemented PFC converter Table 2 shows the components that are used for the implemented hardware Fig 13 shows the input ac current and DC link voltage wav...

Page 17: ...PFC SPM Design Guide 2005 Rev 1 0 1 2012 Fairchild Semiconductor System Engineering Group 16 Table 2 BOM of PFC SPM demo board 16...

Page 18: ...OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD...

Page 19: ...the rights of others ON Semiconductor products are not designed intended or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices wit...

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