ON Semiconductor Fairchild PFC SPM, Design Manual

Page: 14 / 19

PFC SPM
®
Design Guide
© 2005 Rev. 1.0.1-2012 Fairchild Semiconductor – System Engineering Group
13
Over Voltage Protection
Vdc
O V P 1
O VP 2
R
X
R
Y
R
Z
Fig.9 Over voltage protection circuit
About demo board, the designed values are:
R
X
= 15 [k Ω ], R
Y
= 1.8 [k Ω ], R
Z
= 870 (270+270+330) [k Ω ]
And the expected OC levels are:
1) OVP level 1
] [ 422 8
8 . 16
8 . 886
_ _
_
_
V V
R R
R R R
V
V
V
R R R
R R
OV REF
Y X
Z Y X
PK DC
PK DC
OV REF
Z Y X
Y X
  

 
  
 

2) OVP level 2
] [ 443 5 . 7
15
8 . 886
_
_
V V
R
R R R
V
V
V
R R R
R
REF
X
Z Y X
PK DC
PK DC
REF
Z Y X
X
  
 
  
 