PFC SPM
®
Design Guide
© 2005
Rev. 1.0.1-2012
Fairchild Semiconductor – System Engineering Group
6
Inductance & Input Current Ripple
where:
I
Lp-p
: Peak to peak current of PFC inductor
V
IN
: Input AC voltage
V
OUTDC
: DC link Voltage
f : Switching frequency
L : Inductance of PFC inductor
OUTDC
IN
OUTDC
IN
L
fLV
V
V
V
I
P
P
)
(
fL
V
I
OUTDC
MAX
L
P
P
4
)
(
(
OUTDC
IN
V
V
2
1
)
A
I
MAX
L
P
P
5
)
(
]
[
475
40000
20
380
20
H
f
V
L
OUTDC
(fs=40kHz)
Current ripple is decided by switching frequency and inductance. To reduce current ripple, high
switching frequency and large inductance value is required. It means that employing higher switching
frequency can reduce inductor size. But the power losses will increase and it requires more efficient heat
sink structure.
Open Loop Response
Fig.3 Block diagram of PFC control IC
6
