NXP Semiconductors
JN5189
JN5189-DK006 Development Kit User Guide
UM11368
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© NXP Semiconductors N.V. 2020. All rights reserved.
User Guide
Rev.1.1
— 28 April 2020
18 of 21
IC2 interface to LPC
10, 11
5
Disabled by default. No current draw if DIOS
10 and 11 are high. Cut JS2 and JS11 to
remove completely
Debug
Interface
12, 13, 14
6
Negligible effect. Cut CH4 to disconnect
RESET and ISP
buttons
5, RST
7
Negligible current drawn if not pressed. See
Table for Sleep current measurement
For sleep current measurements, the following additional changes are required to
achieve the datasheet value otherwise the result is typically 600nA high.
Component
Action
Schematic Page
Comment
R51
Remove
2
Allow connection of a Multimeter across J14
IC22
Remove
3V3OUT
7
See Section 5.5 below
D5
Remove
7
Disconnect ISPEN from FTDI device
C33
Remove
7
Remove capacitor from Reset Line
R64
Remove
7
Remove Pullup Resistor from ISPEN
IC21 or cut JS5-6
Remove
6
Disconnect current sense amplifier
IC11
Remove
6
Disconnect control lines from LPC debug
interface
7.5 Running the DK6 board at different voltages
In order to run the DK6 at different voltages, it is necessary to disconnect the FTDI
3V3OUT signal otherwise this will continue to supply 3.3V to the board. The circuit is
shown below in
Figure 14