NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
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Figure 12. Voltage Monitor Connections
VDD_IN
47.5k
Ω,
1%
47.4k
Ω,1%
VIN_PWR_BAD#
TPS3808G01
TP
SENSE
CT
VCC
MR*
GND
RST*
2.49k
Ω,
1%
100 k
Ω,
1%
RB5 21CS30L
Note:
The threshold for VDD_IN, determined by the voltage divider components used in the circuit above is 8.04V.
Jetson TX2
A voltage monitor circuit is implemented on Jetson TX2
to indicate if the main DC input rail, VDD_IN, “droops” below an
acceptable level. The device used w ill react quickly and generate an alert to one of the Tegra SOC_THERM capable pins
(VCOMP_ALERT). The voltage monitor circuit is implemented w ith a fast voltage comparator supplied by V DD_IN w ith a 1.8V
(VDD_1V8) reference common w ith the Tegra IO domain that receives the output signal. This device has an open drain active
low output w hich is pulled low w hen the VDD_IN voltage drops below the selected threshold.
Figure 13. Voltage Monitor Connections
VDD_IN
VDD_1V8
VDD_5V0_SYS
34k
Ω,1%
34k
Ω,1%
49.9k
Ω,
1%
49.9k
Ω,
1%
110k
Ω,1%
110k
Ω,1%
COMP_SOC_THERM* (Tegra VCOMP_ALERT)
VOUT
IN_POS
IN_NEG
VCC
VEE
+
–
VOUT
IN_POS
IN_NEG
VCC
VEE
+
–
100k
Ω
100k
Ω
1.8V
Note:
The threshold for VDD_IN, determined by the voltage divider components used in the cir cuit above is 5.75V.
3.7 Deep Sleep (SC7)
Jetson TX2/TX2i supports a low pow er state called Deep Sleep or SC7. This can be entered under softw are control, and exited
using various mechanisms, including w ake capable pins that are listed in the table below .
Table 11. Signal Wake Events
Potential Wake Event (Reference Design Signal)
Module Pin Assigned
Wake #
PCIe Wake Request (PEX_WAKE#)
PEX_WAKE#
1
Bluetooth Wake AP (BT2_WAKE_AP
–
Secondary)
GPIO13_BT_WAKE_AP
8
WLAN Wake AP (WIFI_WAKE_AP - Secondary)
GPIO10_WIFI_WAKE_AP
9
Thermal/Over-current Warning
BATT_OC
10
Audio Codec Interrupt (AUD_INT_L)
GPIO20_AUD_INT
12
DP 0 Hot Plug Detect (DP_AUX_CH0_HPD)
DP0_HPD
19
HDMI Consumer Electronic Control (HDMI_CEC)
HDMI_CEC
20
DP 1 Hot Plug Detect (DP_AUX_CH1_HPD)
DP1_HPD
21
Camera Vertical Sync (CAM_VSYNC)
CAM_VSYNC
23
POWER_BTN#
POWER_BTN#
29
Motion Interrupt (MOTION_INT)
GPIO9_MOTION_INT
46
CAN 1 Error (CAN1_ERR)
CAN1_ERR
47
CAN Wake (CAN_WAKE)
CAN_WAKE
48
CAN 0 Error (CAN0_ERR)
CAN0_ERR
49
