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ML0021 August 15, 2018
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Copyright 2018 Bitronics, LLC
8.13.3 PHYSTS Register Contents (P1x)
The Ethernet software driver supplies to the upper protocol layers a modified copy of the
PHYSTS register of the PHY controller chip at the time a link is established. Many of the
bits in the register are of no use to the M87x user. Bit 0 is the least significant bit.
BIT
DESCRIPTION
9
1=Auto-negotiation enabled for the M87x
3
1=Link partner auto-negotiable, 0=network hub/switch does not support auto-negotiation
2
1=Full Duplex, 0=half duplex (differs from PHYTER register definition) (reflects duplex LED)
1
1=10 Mb speed in use, 0=100 Mb speed (if 100 LED on, then this bit is zero)
0
1=Link valid (follows Link LED).
Summary of Contents for Bitronics M87X Series
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