CHAPTER 1 INTRODUCTION
User’s Manual U13850EJ4V0UM
36
Pin names (V850/SB1)
A1 to A21:
Address bus
P70 to P77:
Port 7
AD0 to AD15:
Address/data bus
P80 to P83:
Port 8
ADTRG:
AD trigger input
P90 to P96:
Port 9
ANI0 to ANI11:
Analog input
P100 to P107:
Port 10
ASCK0, ASCK1:
Asynchronous serial clock
P110 to P113:
Port 11
ASTB:
Address strobe
RD:
Read
AV
DD
:
Analog V
DD
REGC:
Regulator control
AV
REF
:
Analog reference voltage
RESET:
Reset
AV
SS
:
Analog V
SS
RTP0 to RTP7:
Real-time output port
BV
DD
:
Power supply for bus interface
RTPTRG:
RTP trigger
BV
SS
:
Ground for bus interface
R/W:
Read/write status
CLKOUT:
Clock output
RXD0, RXD1:
Receive data
DSTB:
Data strobe
SCK0 to SCK4:
Serial clock
EV
DD
:
Power supply for port
SCL0, SCL1:
Serial clock
EV
SS
:
Ground for port
SDA0, SDA1:
Serial data
HLDAK:
Hold acknowledge
SI0 to SI4:
Serial input
HLDRQ:
Hold request
SO0 to SO4:
Serial output
IC:
Internally connected
TI00, TI01, TI10,
INTP0 to INTP6:
Interrupt request from peripherals
TI11, TI2 to TI5:
Timer input
KR0 to KR7
:
Key return
TO0 to TO5:
Timer output
LBEN:
Lower byte enable
TXD0,TXD1:
Transmit data
NMI:
Non-maskable interrupt request
UBEN:
Upper byte enable
P00 to P07:
Port 0
V
DD
:
Power supply
P10 to P15:
Port 1
V
PP
:
Programming power supply
P20 to P27:
Port 2
V
SS
:
Ground
P30 to P37:
Port 3
WAIT:
Wait
P40 to P47:
Port 4
WRH:
Write strobe high level data
P50 to P57:
Port 5
WRL:
Write strobe low level data
P60 to P65:
Port 6
X1, X2:
Crystal for main clock
XT1, XT2:
Crystal for subclock
