User’s Manual U13850EJ4V0UM
23
LIST OF FIGURES (7/9)
Figure No.
Title
Page
14-18
Block Diagram of P23, P26, and P27 ............................................................................................................388
14-19
Port 3 (P3) .....................................................................................................................................................389
14-20
Port 3 Mode Register (PM3) ..........................................................................................................................390
14-21
Pull-Up Resistor Option Register 3 (PU3) .....................................................................................................390
14-22
Port 3 Function Register (PF3) ......................................................................................................................391
14-23
Block Diagram of P30 to P32 and P35 to P37...............................................................................................391
14-24
Block Diagram of P33 and P34......................................................................................................................392
14-25
Ports 4 and 5 (P4 and P5) .............................................................................................................................393
14-26
Port 4 Mode Register, Port 5 Mode Register (PM4, PM5) .............................................................................394
14-27
Block Diagram of P40 to P47 and P50 to P57...............................................................................................395
14-28
Port 6 (P6) .....................................................................................................................................................396
14-29
Port 6 Mode Register (PM6) ..........................................................................................................................397
14-30
Block Diagram P60 to P65.............................................................................................................................398
14-31
Ports 7 and 8 (P7 and P8) .............................................................................................................................399
14-32
Block Diagram of P70 to P77 and P80 to P83...............................................................................................400
14-33
Port 9 (P9) .....................................................................................................................................................401
14-34
Port 9 Mode Register (PM9) ..........................................................................................................................402
14-35
Block Diagram of P90 to P96.........................................................................................................................403
14-36
Port 10 (P10) .................................................................................................................................................404
14-37
Port 10 Mode Register (PM10) ......................................................................................................................405
14-38
Pull-Up Resistor Option Register 10 (PU10) .................................................................................................406
14-39
Port 10 Function Register (PF10) ..................................................................................................................406
14-40
Block Diagram of P100 to P107.....................................................................................................................407
14-41
Port 11 (P11) .................................................................................................................................................408
14-42
Port 11 Mode Register (PM11) ......................................................................................................................409
14-43
Pull-Up Resistor Option Register 11 (PU11) .................................................................................................410
14-44
Port Alternate-Function Control Register (PAC) ............................................................................................410
14-45
Block Diagram of P110 to P113.....................................................................................................................411
15-1
System Reset Timing.....................................................................................................................................416
16-1
Regulator .......................................................................................................................................................417
17-1
Block Diagram of ROM Correction ................................................................................................................418
17-2
Correction Control Register (CORCN)...........................................................................................................419
17-3
Correction Request Register (CORRQ).........................................................................................................420
17-4
Correction Address Registers 0 to 3 (CORAD0 to CORAD3)........................................................................421
17-5
ROM Correction Operation and Program Flow..............................................................................................422
