NEC UPD789026 Series, User Manual

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CHAPTER 11 STANDBY FUNCTION
User's Manual U11919EJ3V0UM00
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11.2.2 STOP mode
(1) Setting and operation status of STOP mode
The STOP mode is set by executing the STOP instruction.
Caution Because the standby mode can be released by an interrupt request signal, the standby mode is
released as soon as it is set if there is an interrupt source whose interrupt request flag is set
and interrupt mask flag is reset. When the STOP mode is set, therefore, the HALT mode is set
immediately after the STOP instruction has been executed, the wait time set by the oscillation
settling time select register (OSTS) elapses, and then operation mode is set.
The operation status in the STOP mode is shown in the following table.
Table 11-3. STOP Mode Operating Status
Item STOP Mode Operation Status
Clock generation circuit Stops system clock oscillation
CPU Stops operation
Port (Output latch) Retains the status before setting the STOP mode
16-bit timer Stops operation
8-bit timer/event counter Operation is enabled only when TI0 is selected as the count clock
Watchdog timer Stops operation
Serial interface Enables operation only when input clock from external is selected as serial clock
External interrupt Operation enabled
Key return Only the pin set to key return mode is enabled
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