CHAPTER 9 SERIAL INTERFACE 00
User's Manual U11919EJ3V0UM00
142
(d) Reception
When bit 6 (RXE00) of asynchronous serial interface mode register 00 (ASIM00) is set to 1, a receive
operation is enabled and sampling of the RxD pin input is performed.
RxD pin input sampling is performed using the serial clock specified by ASIM00.
When the RxD pin input becomes low, the 3-bit counter starts counting, and at the time when half the
time determined by the specified baud rate has passed, the data sampling start timing signal is output.
If the RxD pin input sampled again as a result of this start timing signal is low, it is identified as a start
bit, the 3-bit counter is initialized and starts counting, and data sampling is performed. When character
data, a parity bit, and one stop bit are detected after the start bit, reception of one frame of data ends.
When one frame of data has been received, the receive data in the shift register is transferred to
receive buffer register 00 (RXB00), and a reception completion interrupt (INTSR) is generated.
If an error is generated, the receive data in which the error was generated is still transferred to RXB00,
and INTSR is generated.
If the RXE00 bit is reset to 0 during the receive operation, the receive operation is stopped immediately.
In this case, the contents of RXB00 and asynchronous serial interface status register 00 (ASIS00) are
not changed, and INTSR is not generated.
Figure 9-9. Asynchronous Serial Interface Reception Completion Interrupt Timing
STOP
Parity
D7
D6
D2
D1
D0
START
RxD (Input)
INTSR
Caution
Be sure to read receive buffer register 00 (RXB00) even if a receive error occurs. If
RXB00 is not read, an overrun error will be generated when the next data is received,
and the receive error state will continue indefinitely.
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Summary of Contents for UPD789026 Series
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