2-8
2.7 Configuration of DDC (EDID) data
The configuration of DDC (EDID) data is as follows.
EDID DATA DUMP TEXT
-- ANALOG EDID DATA DUMP TEXT --
Manufacturer Code: NEC
Product Code (HEX): 65C8
Product Code (DEC): 26056
(Microsoft INF ID: NEC65C8)
Serial Number (HEX): SN
Week of Manuf: WW
Year of Manuf: YY
EDID Version: 1
EDID Revision: 3
Extension Flag: 0
Video:
Input Signal: ANALOG
Setup: NO
Sync on Green: YES
Composite Sync: YES
Separate Sync: YES
V Sync Serration: NO
V Signal Level: 0.700V/0.300V (1V p-p)
Max Image Size H: 30 cm
Max Image Size V: 23 cm
DPMS Stand By: YES
DPMS Suspend: YES
DPMS Active Off: YES
GTF Support: NO
Standard Default Color Space: YES
Preferred Timing Mode: YES
Display Type: RGB Color
Color:
Gamma: 2.20
Red x: 0.620
Red y: 0.340
Green x: 0.290
Green y: 0.600
Blue x: 0.150
Blue y: 0.100
White x: 0.310
White y: 0.340
Established Timings:
720x400 @ 70 Hz
640x480 @ 60 Hz
640x480 @ 67 Hz
640x480 @ 72 Hz
640x480 @ 75 Hz
800x600 @ 56 Hz
800x600 @ 60 Hz
800x600 @ 72 Hz
800x600 @ 75 Hz
832x624 @ 75 Hz
1024x768 @ 60 Hz
1024x768 @ 70 Hz
1024x768 @ 75 Hz
Standard Timing #1:
NOT USED
Standard Timing #2:
NOT USED
Standard Timing #3:
NOT USED
Standard Timing #4:
NOT USED
Standard Timing #5:
NOT USED
Standard Timing #6:
NOT USED
Standard Timing #7:
NOT USED
Standard Timing #8:
NOT USED
Detailed Timing (block #1):
---Preferred Timing Mode---
Pixel Clock: 65.00 MHz
Horizontal Active: 1024 pixels
Horizontal Blanking: 320 pixels
Vertical Active: 768 lines
Vertical Blanking: 38 lines
(Horizontal Frequency: 48.36 kHz)
(Vertical Frequency: 60.0 Hz)
Horizontal Sync Offset: 24 pixels
Horizontal Sync Width: 136 pixels
Vertical Sync Offset: 3 lines
Vertical Sync Width: 6 lines
Horizontal Border: 0 pixels
Vertical Border: 0 lines
Horizontal Image Size: 304 mm
Vertical Image Size: 228 mm
Interlaced: NO
Image: Normal Display
Sync: Digital Separate
Bit 1: OFF
Bit 2: OFF
Monitor Range Limits (block #2):
Minimum Vertical Rate: 50 Hz
Maximum Vertical Rate: 75 Hz
Minimum Horizontal Rate: 30 kHz
Maximum Horizontal Rate: 60 kHz
Maximum Pixel Clock: 80 MHz
GTF Data: 00 0a 20 20 20 20 20 20
Summary of Contents for NEC MultiSync LCD1550X LCD1550X LCD1550X
Page 88: ...SCHEMATIC DIAGRAM POWER LCD1550X Normal Power Save 1ch Pin 4 2ch Pin 1 3ch Pin 2 4ch Pin 5...
Page 89: ...SCHEMATIC DIAGRAM PWB MAIN POWER LCD1550X...
Page 90: ...SCHEMATIC DIAGRAM PWB MAIN INPUT LCD1550X...
Page 91: ...SCHEMATIC DIAGRAM PWB MAIN SYNC LCD1550X...
Page 92: ...SCHEMATIC DIAGRAM PWB MAIN TMDS LCD1550X...
Page 96: ...SCHEMATIC DIAGRAM PWB MAIN ASIC LCD1550X...
Page 97: ...SCHEMATIC DIAGRAM INVERTER LCD1550X 1ch Q701 B 2ch Q702 B...
Page 98: ...SCHEMATIC DIAGRAM PWB SW LCD1550X...
Page 100: ...SCHEMATIC DIAGRAM POWER LCD1550X...
Page 101: ...SCHEMATIC DIAGRAM PWB MAIN POWER LCD1550X...
Page 102: ...SCHEMATIC DIAGRAM PWB MAIN INPUT LCD1550X...
Page 103: ...SCHEMATIC DIAGRAM PWB MAIN SYNC LCD1550X...
Page 104: ...SCHEMATIC DIAGRAM PWB MAIN TMDS LCD1550X...
Page 105: ...SCHEMATIC DIAGRAM PWB MAIN MC LCD1550X...
Page 106: ...SCHEMATIC DIAGRAM PWB MAIN ASIC LCD1550X...
Page 107: ...SCHEMATIC DIAGRAM INVERTER LCD1550X...
Page 108: ...SCHEMATIC DIAGRAM PWB SW LCD1550X...
Page 127: ...16 Document No VSPF A028 Bave Average brightness of 1 to 9 10 50 90 90 10 50 5 1 2 3 6 9 8 7 4...
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