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1.6.2
DC/DC output voltage design sheet
5V system output DC/DC (IC608)
Vref accuracy
Output voltage fine adjustment resistor
R1 (output voltage dividing resistor upper limit)
R2 (output voltage dividing resistor lower limit)
DC/DC output voltage Max.
DC/DC output voltage Typ.
DC/DC output voltage Min.
IC specifications
1.23V ±
2%
Design value
330
5930
±
1%
1800
±
1%
5.47V
5.28V
5.10V
IC specifications
0.06
1.05W
Design value
5.47V
-
5.03V
-0.07V
0.08W
FET output voltage range must satisfy
panel's input voltage range
4.5V to 5.5V.
FET-SW (IC610)
R
DS(On)
on resistor (Max.)
FET output voltage Max.
FET output voltage Typ.
FET output voltage Min.
Maximum drop voltage
FET-SW tolerable channel loss
3.3V system output DC/DC (IC608)
Vref accuracy
Output voltage fine adjustment resistor
R1 (output voltage dividing resistor upper limit)
R2 (output voltage dividing resistor lower limit)
DC/DC output voltage Max.
DC/DC output voltage Typ.
DC/DC output voltage Min.
IC specifications
1.23V ±
2%
Design value
270
5870
±
1%
3300
±
1%
3.53V
3.42V
3.31V
Operating voltage
2.7~5.5V
2.7~5.5V
2.5~5.5V
2.0~17V
2.97~3.63V
2.0~14V
2.7~5.5V
3.0~3.6V
2.0~3.6V
V
OUT
+0.4~3.5V
Absolute rating
-0.3~6.5V
-0.3~6.5V
-0.3~6.5V
18V
-0.5~7V
~15V
-1~7V
-0.3~4.2V
-0.5~7V
~16V
DC/DC output voltage range must
be
within operating voltage range of load IC.
M3_3V system IC, D3_3V system IC power
voltage
Microcomputer (IC102)
BR24C01AF-WE2 (IC104,5,7)
M24C32-W/24LC32A (IC100)
M51957AFP (IC101)
KCO-7_355 (X100)
NJM12903 (IC103)
X9116WM-2.7 (IC106)
ASIC 3_3V I/O system (IC400)
74LCX14MTCX (IC302,5)
SI3025LSA (IC602, IC604)
(P prototype and following)
5.5V system output DC/DC (IC611)
Vref accuracy
Output voltage fine adjustment resistor
R1 (output voltage dividing resistor upper limit)
R2 (output voltage dividing resistor lower limit)
DC/DC output voltage Max.
DC/DC output voltage Typ.
DC/DC output voltage Min.
IC specifications
1.26V ±
2%
Design value
750
6350
±
1%
1800
±
1%
5.91V
5.71V
5.50V
IC specifications
5.10V
5.00V
4.90V
0.4V
0.35W
Design value
0.4V
1.0V
0.15W
A5V regulator (PQ1U501M2ZP)
REG output voltage Max.
REG output voltage Typ.
REG output voltage Min.
Minimum potential
difference between input/output
(Max.)
Maximum drop voltage
Tolerable regulator collector loss (Max.)
Summary of Contents for NEC MultiSync LCD1550X LCD1550X LCD1550X
Page 88: ...SCHEMATIC DIAGRAM POWER LCD1550X Normal Power Save 1ch Pin 4 2ch Pin 1 3ch Pin 2 4ch Pin 5...
Page 89: ...SCHEMATIC DIAGRAM PWB MAIN POWER LCD1550X...
Page 90: ...SCHEMATIC DIAGRAM PWB MAIN INPUT LCD1550X...
Page 91: ...SCHEMATIC DIAGRAM PWB MAIN SYNC LCD1550X...
Page 92: ...SCHEMATIC DIAGRAM PWB MAIN TMDS LCD1550X...
Page 96: ...SCHEMATIC DIAGRAM PWB MAIN ASIC LCD1550X...
Page 97: ...SCHEMATIC DIAGRAM INVERTER LCD1550X 1ch Q701 B 2ch Q702 B...
Page 98: ...SCHEMATIC DIAGRAM PWB SW LCD1550X...
Page 100: ...SCHEMATIC DIAGRAM POWER LCD1550X...
Page 101: ...SCHEMATIC DIAGRAM PWB MAIN POWER LCD1550X...
Page 102: ...SCHEMATIC DIAGRAM PWB MAIN INPUT LCD1550X...
Page 103: ...SCHEMATIC DIAGRAM PWB MAIN SYNC LCD1550X...
Page 104: ...SCHEMATIC DIAGRAM PWB MAIN TMDS LCD1550X...
Page 105: ...SCHEMATIC DIAGRAM PWB MAIN MC LCD1550X...
Page 106: ...SCHEMATIC DIAGRAM PWB MAIN ASIC LCD1550X...
Page 107: ...SCHEMATIC DIAGRAM INVERTER LCD1550X...
Page 108: ...SCHEMATIC DIAGRAM PWB SW LCD1550X...
Page 127: ...16 Document No VSPF A028 Bave Average brightness of 1 to 9 10 50 90 90 10 50 5 1 2 3 6 9 8 7 4...
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