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4.0 Register Set
(Continued)
DP83816
4.1.6 Configuration Memory Address Register
This register specifies the Base Memory address which is required to build an address map during configuration. It also
specifies the number of bytes required as well as an indication that it can be mapped into memory space.
4.1.7 Configuration Subsystem Identification Register
The CFGSID allows system software to distinguish between different subsystems based on the same PCI silicon. The
values in this register can be loaded from the EEPROM if configuration is enabled.
Tag:
CFGMA
Size:
32 bits
Hard Reset:
00000000h
Offset:
14h
Access:
Read Write
Soft Reset:
unchanged
Bit
Bit Name
Description
31-12
MEMBASE
Memory Base Address
This is set by software to the base address for the Operational Register Map.
11-4
MEMSIZE
Memory Size
These bits return 0, which indicates that the DP83816 requires 4096 bytes of Memory Space (the
minimum recommended allocation).
3
MEMPF
Prefetchable
Set to 0 by DP83816. Read Only.
2-1
MEMLOC
Location Selection
Set to 00 by DP83816. This indicates that the base register is 32-bits wide and can be placed anywhere
in the 32-bit memory space. Read Only.
0
MEMIND
Memory Space Indicator
Set to 0 by DP83816 to indicate that DP83816 is capable of being mapped into memory space. Read
Only.
Tag:
CFGSID
Size:
32 bits
Hard Reset:
00000000h
Offset:
2Ch
Access:
Read Only
Soft Reset:
unchanged
Bit
Bit Name
Description
31-16
SDEVID
Subsystem Device ID
Set to 0 by DP83816.
15-0
SVENID
Subsystem Vendor ID
Set to 0 by DP83816.
Summary of Contents for DP83816AVNG
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