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4.0 Register Set
(Continued)
DP83816
4.2.17 Receive Filter/Match Control Register
The RFCR register is used to control and configure the DP83816 Receive Filter Control logic. The Receive Filter Control
Logic is used to configure destination address filtering of incoming packets.
Tag:
RFCR
Size:
32 bits
Hard Reset:
00000000h
Offset:
0048h
Access:
Read Write
Soft Reset:
00000000h
Bit
Bit Name
Description
31
RFEN
Rx Filter Enable
When this bit is set to 1, the Rx Filter is enabled to qualify incoming packets. When set to a 0, receive
packet filtering is disabled (i.e. all receive packets are rejected). This bit must be 0 for the other bits in this
register to be configured.
30
AAB
Accept All Broadcast
When set to a 1, this bit causes all broadcast address packets to be accepted. When set to 0, no
broadcast address packets will be accepted.
29
AAM
Accept All Multicast
When set to a 1, this bit causes all multicast address packets to be accepted. When set to 0, multicast
destination addresses must have the appropriate bit set in the multicast hash table mask in order for the
packet to be accepted.
28
AAU
Accept All Unicast
When set to a 1, this bit causes all unicast address packets to be accepted. When set to 0, the
destination address must match the node address value specified through some other means in order for
the packet to be accepted.
27
APM
Accept on Perfect Match
When set to 1, this bit allows the perfect match register to be used to compare against the DA for packet
acceptance. When this bit is 0, the perfect match register contents will not be used for DA comparison.
26-23
APAT
Accept on Pattern Match
When one or more of these bits is set to 1, a packet will be accepted if the first n bytes (n is the value
defined in the associated pattern count register) match the associated pattern buffer memory contents.
When a bit is set to 0, the associated pattern buffer will not be used for packet acceptance.
22
AARP
Accept ARP Packets
When set to 1, this bit allows all ARP packets (packets with a TYPE/LEN field set to 806h) to be
accepted, regardless of the DA value. When set to 0, ARP packets are treated as normal packets and
must meet other DA match criteria for acceptance.
21
MHEN
Multicast Hash Enable
When set to 1, this bit allows hash table comparison for multicast addresses, i.e. a hash table hit for a
multicast addressed packet will be accepted. When set to 0, multicast hash hits will not be used for
packet acceptance.
20
UHEN
Unicast Hash Enable
When set to 1, this bit allows hash table comparison for unicast addresses, i.e. a hash table hit for a
unicast addressed packet will be accepted. When set to 0, unicast hash hits will not be used for packet
acceptance.
19
ULM
U/L bit Mask
When set to 1, this bit will cause the U/L bit (2nd MSb) of the DA to be ignored during comparison with
the perfect match register.
18-10
Unused
returns 0
Summary of Contents for DP83816AVNG
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