USRP-2940
Figure 5. USRP-2940 Front Panel
LINK
TX OUTPUT MAX +20 dBm, RX INPUT MAX -15 dBm, ALL RF PORTS 50
Ω
TX1 RX1
RX2
GPS
PPS
REF
TX1 RX1
RX2
JTAG
PWR
Table 3. USRP-2940 Module Front Panel Connectors
Connector
Use
JTAG
A USB port that connects the host computer to the device FPGA for
recovery purposes. This port can be used with the Xilinx iMPACT
configuration tool to temporarily load a new bitfile.
RF 0 TX1 RX1 Input and output terminal for the RF signal. TX1 RX1 is an SMA (f)
connector with an impedance of 50 Ω and is a single-ended input or output
channel.
RX2
Input terminal for the RF signal. RX2 is an SMA (f) connector with an
impedance of 50 Ω and is a single-ended input channel.
AUX I/O
General-purpose I/O (GPIO) port. AUX I/O is controlled by the FPGA.
RF 1 TX1 RX1 Input and output terminal for the RF signal. TX1 RX1 is an SMA (f)
connector with an impedance of 50 Ω and is a single-ended input or output
channel.
RX2
Input terminal for the RF signal. RX2 is an SMA (f) connector with an
impedance of 50 Ω and is a single-ended input channel.
Note
The LED indications described in the following table occur only when you
use the NI-USRP API with the default API image. When you use LabVIEW FPGA,
you customize the LED indications.
USRP-2940/2942/2943/2944/2945 Getting Started Guide
|
© National Instruments
|
13
