National Instruments PCI-6281, User Manual

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Chapter 4 Analog Input
Using an Internal Source
One of the following internal signals can drive AI Sample Clock:
• Counter
n
Internal Output
• AI Sample Clock Timebase (divided down)
• A pulse initiated by host software
A programmable internal counter divides down the sample clock timebase.
Several other internal signals can be routed to AI Sample Clock through RTSI. Refer to
Device
Routing in MAX
in the
NI-DAQmx Help
or the
LabVIEW Help
for more information.
Using an External Source
Use one of the following external signals as the source of AI Sample Clock:
• PFI <0..15>
• RTSI <0..7>
• PXI_STAR
• Analog Comparison Event (an analog trigger)
Routing AI Sample Clock Signal to an Output Terminal
You can route AI Sample Clock out to any PFI <0..15> or RTSI <0..7> terminal. This pulse is
always active high.
You can specify the output to have one of two behaviors. With the pulse behavior, your DAQ
device briefly pulses the PFI terminal once for every occurrence of AI Sample Clock.
With level behavior, your DAQ device drives the PFI terminal high during the entire sample.
All PFI terminals are configured as inputs by default.
Other Timing Requirements
Your DAQ device only acquires data during an acquisition. The device ignores AI Sample Clock
when a measurement acquisition is not in progress. During a measurement acquisition, you can
cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal.
A counter on your device internally generates AI Sample Clock unless you select some external
source. AI Start Trigger starts this counter and either software or hardware can stop it once a
finite acquisition completes. When using an internally generated AI Sample Clock, you also can
specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse. By default,
this delay is set to two ticks of the AI Sample Clock Timebase signal. When using an externally
generated AI Sample Clock, you must ensure the clock signal is consistent with respect to the
timing requirements of AI Convert Clock. Failure to do so may result in AI Sample Clock pulses
that are masked off and acquisitions with erratic sampling intervals. Refer to AI Convert Clock
Signal for more information about the timing requirements between AI Convert Clock and AI
Sample Clock.