National Instruments PCI-6281 Page 97 User Manual Download

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6-9

M Series User Manual

Getting Started with DIO Applications in
Software

You can use the M Series device in the following digital I/O applications:

•

Static digital input

•

Static digital output

•

Digital waveform generation

•

Digital waveform acquisition

•

DI change detection

Note

For more information about programming digital I/O applications and

triggers in software, refer to the

NI-DAQmx Help

or the

LabVIEW Help

Summary of Contents for PCI-6281

Page 1: ...PCI 6281...

Page 2: ...DAQ M Series M Series User Manual NI 622x NI 625x and NI 628x Multifunction I O Modules and Devices M Series User Manual July 2016 371022L 01...

Page 3: ...port phone numbers email addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support informat...

Page 4: ...TLE OR NON INFRINGEMENT AND ANY WARRANTIES THAT MAY ARISE FROM USAGE OF TRADE OR COURSE OF DEALING NI DOES NOT WARRANT GUARANTEE OR MAKE ANY REPRESENTATIONS REGARDING THE USE OF OR THE RESULTS OF THE...

Page 5: ...ependent from NI and have no agency partnership or joint venture relationship with NI Patents For patents covering NI products technology refer to the appropriate location Help Patents in your softwar...

Page 6: ...el to USB Screw Terminal Devices 1 6 USB Device Chassis Ground 1 6 USB Device Panel Wall Mounting 1 8 USB Device LEDs 1 8 USB Cable Strain Relief 1 8 USB Device Fuse Replacement 1 9 USB Device Securit...

Page 7: ...ound Reference Settings in Software 4 6 Multichannel Scanning Considerations 4 6 Analog Input Data Acquisition Methods 4 9 Software Timed Acquisitions 4 9 Hardware Timed Acquisitions 4 9 Analog Input...

Page 8: ...rce 4 24 Routing AI Sample Clock Signal to an Output Terminal 4 24 Other Timing Requirements 4 24 AI Sample Clock Timebase Signal 4 25 AI Convert Clock Signal 4 25 Using an Internal Source 4 26 Using...

Page 9: ...tput Terminal 5 8 AO Sample Clock Signal 5 8 Using an Internal Source 5 8 Using an External Source 5 8 Routing AO Sample Clock Signal to an Output Terminal 5 9 Other Timing Requirements 5 9 AO Sample...

Page 10: ...quency with One Counter Averaged 7 9 High Frequency with Two Counters 7 9 Large Range of Frequencies with Two Counters 7 10 Choosing a Method for Measuring Frequency 7 11 Position Measurement 7 14 Mea...

Page 11: ...al 7 28 Frequency Output Signal 7 28 Routing Frequency Output to a Terminal 7 28 Default Counter Timer Pinouts 7 28 Counter Triggering 7 29 Other Counter Features 7 30 Cascading Counters 7 30 Counter...

Page 12: ...9 6 PXI Clock and Trigger Signals 9 8 PXI_CLK10 9 8 PXI Triggers 9 8 PXI_STAR Trigger 9 8 PXI_STAR Filters 9 8 Chapter 10 Bus Interface Data Transfer Methods 10 1 PCI PCI Express Device and PXI PXI E...

Page 13: ...NI 6224 A 13 NI 6225 A 15 NI 6229 A 21 NI 6250 A 27 NI 6251 A 29 NI 6254 A 37 NI 6255 A 39 NI 6259 A 45 NI 6280 A 53 NI 6281 A 55 NI 6284 A 61 NI 6289 A 63 Appendix B Timing Diagrams Appendix C Troub...

Page 14: ...A 15 USB 6251 Screw Terminal Pinout A 31 Figure A 16 USB 6251 BNC Top Panel and Pinout A 33 Figure A 17 USB 6251 Mass Termination Pinout A 35 Figure A 18 PCI PXI 6254 Pinout A 37 Figure A 19 PCI PXI 6...

Page 15: ...es device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection Caution The maximum input voltages rating of AI signals with...

Page 16: ...will not occur in a particular installation when the product is connected to a test object or if the product is used in residential areas To minimize the potential for the product to cause interferenc...

Page 17: ...DAQ Getting Started Guide for Externally Powered USB packaged with your device or module and also available on ni com manuals contain step by step instructions for installing software and hardware co...

Page 18: ...reference voltage of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment Disconnect all external signals when you self...

Page 19: ...re using an SCC accessory without an external power supply such as the SC 2345 Refer to the specifications document for your device for more information about PCI Express power requirements and power...

Page 20: ...actices Applying the Signal Label to USB Screw Terminal Devices USB 622x 625x 628x Screw Terminal Devices The supplied signal label can be adhered to the inside cover of the USB 62xx Screw Terminal de...

Page 21: ...4 The wire should be as short as possible Figure 1 4 Grounding a USB 62xx Screw Terminal Device through the Chassis Ground Lug USB 62xx BNC Devices You can attach a wire to a CHS GND screw terminal o...

Page 22: ...SB 622x 625x 628x Mass Termination Devices Use the supplied strain relief hardware to provide strain relief for your USB cable Adhere the cable tie mount to the rear panel of the USB 62xx Screw Termin...

Page 23: ...50V fuse that protects the device from overcurrent through the 5 V terminal s USB 622x 625x 628x Screw Terminal Devices To replace a broken fuse in the USB 62xx Screw Terminal complete the following s...

Page 24: ...BNC Devices To replace a broken fuse in the USB 62xx BNC complete the following steps 1 Power down and unplug the device Note Take proper ESD precautions when handling the device 2 Remove the USB cab...

Page 25: ...of self threading screws will produce a compromised connection 4 With a Phillips 2 screwdriver remove the Phillips 4 40 screw adjacent to the USB connector 5 Remove the nut from the power connector 6...

Page 26: ...s Figure 1 10 USB 62xx Mass Termination Fuse Locations 5 Replace the lid and screws USB Device Security Cable Slot USB 622x 625x BNC Devices The security cable slot shown in Figure 1 7 allows you to a...

Page 27: ...11 Installing the Ferrite on the Power Cable Pinouts Refer to Appendix A Module Device Specific Information for M Series device pinouts Specifications Refer to the device specifications document for y...

Page 28: ...ts of a Typical DAQ System DAQ Hardware DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 2 2 features comp...

Page 29: ...ation Circuitry The M Series analog inputs and outputs have calibration circuitry to correct gain and offset errors You can calibrate the device to minimize AI and AO errors caused by time and tempera...

Page 30: ...sories or 37 Pin M Series Cables and Accessories For more specific information about these products refer to ni com Note For compliance with Electromagnetic Compatibility EMC requirements this product...

Page 31: ...PM SHC68 68 Unshielded RC68 68 RC68 68 RC68 68 RC68 68 Accessories Shielded Screw Terminal Block SCB 68A SCB 68 TB 2706 SCB 68A SCB 68 SCB 68A SCB 68 SCB 68A SCB 68 BNC Terminal Block BNC 2110 BNC 211...

Page 32: ...284 6289 devices and modules RC68 68 Highly flexible unshielded ribbon cable USB Mass Termination Device 68 Pin Cables You can use the following cables with USB devices with mass termination connector...

Page 33: ...terminal accessories SCB 68A SCB 68 Shielded connector block with temperature sensor TB 27061 Front panel mounted terminal block for PXI PXI Express M Series devices SCC 68 I O connector block with s...

Page 34: ...hat support track and hold you must programmatically disable track and hold You also can use an M Series PXI module to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 o...

Page 35: ...scribes some cable and accessory options for the PCI 6221 37 pin device Refer to the following sections for descriptions of these cables and accessories Refer to ni com for other accessory options Tab...

Page 36: ...CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required 37 Pin Custom Cabling NI offers cables and access...

Page 37: ...thermocouples is very small and susceptible to noise Therefore you may need to amplify or filter the thermocouple output before digitizing it The manipulation of signals to prepare them for digitizing...

Page 38: ...put and eight digital I O lines Low profile portable Integrates well with other laptop computer measurement technologies High bandwidth Acquire signals at rates up to 1 25 MHz Connectivity Incorporate...

Page 39: ...ends using the latest version of NI DAQmx supported for your OS Refer to the NI DAQmx download page by going to ni com info and entering the Info Code nidaqmxdownloads Table 2 4 M Series NI DAQmx Soft...

Page 40: ...M Series connector signals power and user defined terminals The LED Patterns section contains information about M Series USB device LEDs Note Refer to Appendix A Module Device Specific Information fo...

Page 41: ...or differential measurements AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 Similarly the following signal pairs also form differential input channels AI 1 A...

Page 42: ...functions are not available on all devices refer to the specifications for your device Refer to the APFI 0 1 Terminals section of Chapter 11 Triggering 5 V D GND Output 5 V Power Source These termina...

Page 43: ...counter timer pins for most M Series devices USER 1 2 User Defined Channels On USB 62xx BNC devices the USER 1 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of y...

Page 44: ...ondition occurs check your cabling to the 5 V terminals and replace the fuse as described in the USB Device Fuse Replacement section of Chapter 1 Getting Started Caution Never connect the 5 V power te...

Page 45: ...igure 3 2 Connecting PFI 8 to USER 1 BNC The designated space below each USER BNC is for marking or labeling signal names USER 2 BNC D GND USER 1 P0 6 P0 5 P0 4 D GND P0 3 P0 2 P0 1 P0 0 D GND 5 V D G...

Page 46: ...vice is configured Table 3 2 shows the behavior of the LEDs Note USB 62xx BNC devices also have a POWER 5 V LED on the top panel The POWER 5 V LED indicates device power Table 3 2 LED Patterns POWER 5...

Page 47: ...e Settings The analog input ground reference settings circuitry selects between differential referenced single ended and non referenced single ended input modes Each AI channel can use a different mod...

Page 48: ...ies device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 216 codes that is one of 65 536 possible digital values...

Page 49: ...r example if the signal of interest does not have frequency components beyond 40 kHz then using a filter with a cutoff frequency at 40 kHz attenuates noise beyond the cutoff that is not of interest Th...

Page 50: ...verview Analog Input Ground Reference Settings M Series devices support the analog input ground reference settings Differential mode In DIFF mode the M Series device measures the difference in voltage...

Page 51: ...ment for your device Exceeding the maximum input voltage of AI signals distorts the measurement results Exceeding the maximum input voltage rating also can damage the device and the computer NI is not...

Page 52: ...nsiderations M Series devices can scan multiple channels at high rates and digitize the signals accurately However you should consider several issues when designing your measurement system to ensure t...

Page 53: ...AI signals to the device Refer to the Connecting Analog Input Signals section for more information 3 Carefully Choose the Channel Scanning Order Avoid Switching from a Large to a Small Input Range Swi...

Page 54: ...eeds gives the NI PGIA more time to settle to a more accurate level Here are two examples to consider Example 1 Averaging many AI samples can increase the accuracy of the reading by decreasing noise e...

Page 55: ...Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for to be generated samples Buffer...

Page 56: ...the device Typically hardware timed non buffered operations are used to read single samples with known time increments between them Note NI USB 62xx Devices USB M Series devices do not support non bu...

Page 57: ...ts with non isolated outputs Differential DIFF Non Referenced Single Ended NRSE Referenced Single Ended RSE Refer to the Analog Input Ground Reference Settings section for descriptions of the RSE NRSE...

Page 58: ...DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to th...

Page 59: ...the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With...

Page 60: ...to both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the NI PGIA Figure 4 5 Dif...

Page 61: ...ll enough not to produce significant input offset voltage as a result of input bias current typically 100 k to 1 M In this case connect the negative input directly to AI GND If the source has high out...

Page 62: ...of the bias resistor configurations discussed in the Using Differential Connections for Floating Signal Sources section apply to the NRSE bias resistors as well Replace AI with AI SENSE in Figures 4 4...

Page 63: ...e connected to the building system ground It is already connected to a common ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non...

Page 64: ...use non referenced single ended input connections if the input signal meets the following conditions The input signal is high level greater than 1 V The leads connecting the signal to the device are...

Page 65: ...source to the M Series device configured in DIFF mode Figure 4 10 Differential Connections for Ground Referenced Signal Sources Note NI USB 62xx BNC Devices To measure a ground referenced signal sourc...

Page 66: ...input of the NI PGIA Therefore the ground point of the signal connects to the negative input of the NI PGIA Any potential difference between the device ground and the signal ground appears as a commo...

Page 67: ...onnection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference Refer to the Field Wiring and Noise Considerations for Analog Signals document...

Page 68: ...ng rate is aggregate one channel at 250 kS s or two channels at 125 kS s per channel illustrates the relationship Posttriggered data acquisition allows you to view only data that is acquired after a t...

Page 69: ...e counter value decrements until the specified number of posttrigger samples have been acquired M Series devices feature the following analog input timing signals AI Sample Clock Signal AI Sample Cloc...

Page 70: ...during the entire sample All PFI terminals are configured as inputs by default Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores AI Sample Clock whe...

Page 71: ...r AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling...

Page 72: ...e will result in errors Using an Internal Source One of the following internal signals can drive AI Convert Clock AI Convert Clock Timebase divided down Counter n Internal Output A programmable intern...

Page 73: ...art Trigger signal Once the device recognizes an AI Sample Clock pulse it ignores subsequent AI Sample Clock pulses until it receives the correct number of AI Convert Clock pulses Similarly the device...

Page 74: ...at the same time In this mode each tick of the external clock causes a conversion on the ADC Figure 4 22 shows this timing relationship Figure 4 22 One External Signal Driving Both Clocks Simultaneous...

Page 75: ...d so that a low to high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed AI Start Trigger Signal Use the AI Start Trigger ai StartTr...

Page 76: ...iggered DAQ operation AI Reference Trigger Signal Use AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a...

Page 77: ...also can specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger Using an Analog Source When you use an analog trigger source the acquisition stops...

Page 78: ...the signal goes high or vice versa Routing AI Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to RTSI 0 7 Note Pause triggers are only sensitive to the level of the sourc...

Page 79: ...log output circuitry are as follows DACs Digital to analog converters DACs convert digital codes to analog voltages AO FIFO The AO FIFO enables analog output waveform generation It is a first in first...

Page 80: ...et is always 0 V AO GND The AO reference of each analog output AO 0 3 can be individually set to one of the following 10 V 5 V APFI 0 1 You can connect an external signal to APFI 0 1 to provide the AO...

Page 81: ...tput Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due t...

Page 82: ...samples Once the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set n...

Page 83: ...s support digital triggering but some do not support analog triggering To find your device s triggering options refer to the specifications document for your device Refer to the AO Start Trigger Signa...

Page 84: ...riggers you can begin a generation with a software command Using a Digital Source To use AO Start Trigger specify a source and an edge The source can be one of the following signals A pulse initiated...

Page 85: ...seTrigger signal to mask off samples in a DAQ sequence That is when AO Pause Trigger is active no samples occur AO Pause Trigger does not stop a sample that is in progress The pause does not take effe...

Page 86: ...of Chapter 11 Triggering for more information Routing AO Pause Trigger Signal to an Output Terminal You can route AO Pause Trigger out to RTSI 0 7 AO Sample Clock Signal Use the AO Sample Clock ao Sam...

Page 87: ...AO Start Trigger to the first AO Sample Clock pulse By default this delay is two ticks of AO Sample Clock Timebase Figure 5 6 shows the relationship of AO Sample Clock to AO Start Trigger Figure 5 6 A...

Page 88: ...ting Started with AO Applications in Software You can use an M Series device in the following analog output applications Single point on demand generation Finite generation Continuous generation Wavef...

Page 89: ...utput High speed digital waveform generation High speed digital waveform acquisition DI change detection trigger interrupt Figure 6 1 shows the circuitry of one DIO line Each DIO line is similar The f...

Page 90: ...nal to be the source of DI Sample Clock or DO Sample Clock Then generate a trigger that initiates pulses on the source signal The method for generating this trigger depends on which signal is the sour...

Page 91: ...Therefore you must route an external signal or one of many internal signals from another subsystem to be the DI Sample Clock For example you can correlate digital and analog samples in time by sharing...

Page 92: ...ter all the samples in the FIFO have been clocked out the FIFO begins outputting all of the samples again in the same order For example if the FIFO contains five samples the pattern generated consists...

Page 93: ...o active edges of DO Sample Clock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sample fast enough The DAQ device reports an overrun error to t...

Page 94: ...e signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO...

Page 95: ...dually on each DIO line The DAQ devices synchronize each DI signal to 80MHzTimebase and then sends the signal to the change detectors The circuitry ORs the output of all enabled change detectors from...

Page 96: ...gital I O Signals The DIO signals P0 0 31 P1 0 7 and P2 0 7 are referenced to D GND You can individually program each line as an input or output Figure 6 4 shows P1 0 3 configured for digital input an...

Page 97: ...eries device in the following digital I O applications Static digital input Static digital output Digital waveform generation Digital waveform acquisition DI change detection Note For more information...

Page 98: ...nformation about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Input Applications The following sections list the various counter input applications available o...

Page 99: ...the Source input after the counter is armed On demand refers to the fact that software can read the counter contents at any time without disturbing the counting process Figure 7 2 shows an example of...

Page 100: ...e the first active edge on Gate Figure 7 4 Buffered Sample Clock Edge Counting Controlling the Direction of Counting In edge counting applications the counter can count up or down You can configure th...

Page 101: ...the number of edges on the Source input while the Gate input remains active When the Gate input goes inactive the counter stores the count in a hardware save register and ignores other edges on the G...

Page 102: ...ng edges of the Gate input signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling...

Page 103: ...lly occurs in the middle of a period of the Gate input So the first value stored in the hardware save register does not reflect a full period of the Gate input In most applications this first point sh...

Page 104: ...the following sections for more information about M Series semi period measurement options Single Semi Period Measurement Buffered Semi Period Measurement Single Semi Period Measurement Single semi p...

Page 105: ...Frequency with Two Counters Large Range of Frequencies with Two Counters Refer to the Choosing a Method for Measuring Frequency section for a detailed comparison of these frequency measurement method...

Page 106: ...od Figure 7 11 illustrates this method Figure 7 11 Low Frequency with One Counter Averaged High Frequency with Two Counters In this method you measure one pulse of a known width using your signal and...

Page 107: ...ase The M Series device can measure this long pulse more accurately than the faster input signal You can route the signal to measure to the Source input of Counter 0 as shown in Figure 7 13 Assume thi...

Page 108: ...the frequency to be measured if no error fk is the known source or gate frequency Measurement time T is the time it takes to measure a single sample Divide down N is the integer to divide down measur...

Page 109: ...ounters Averaged High Frequency Large Range fk Known timebase Known timebase Known timebase T gating period Maximum frequency error Hz fk Maximum error Note Accuracy equations do not take clock stabil...

Page 110: ...vantage of this method is that it requires only one counter Disadvantages include the possibility of FIFO overflow at high frequencies and high N for this method These measurements take more time and...

Page 111: ...counters and it has a variable sample time and variable error percent dependent on the input signal Table 7 4 summarizes some of the differences in methods of measuring frequency For information about...

Page 112: ...le and the resulting increments and decrements for X1 encoding When channel A leads channel B the increment occurs on the rising edge of channel A When channel B leads channel A the decrement occurs o...

Page 113: ...gure 7 17 the reload phase is when both channel A and channel B are low The reload occurs when this phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus...

Page 114: ...se width measurement except that there are two measurement signals Aux and Gate An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting You must arm...

Page 115: ...ure 7 20 Single Two Signal Edge Separation Measurement Buffered Two Signal Edge Separation Measurement Buffered and single two signal edge separation measurements are similar but buffered measurement...

Page 116: ...Generation with Start Trigger Retriggerable Single Pulse Generation Single Pulse Generation The counter can output a single pulse The pulse appears on the Counter n Internal Output signal of the count...

Page 117: ...ulse Generation The counter can output a single pulse in response to each pulse on a hardware Start Trigger signal The pulses appear on the Counter n Internal Output signal of the counter You can rout...

Page 118: ...u also can specify the active edge of the Source input rising or falling The counter can begin the pulse train generation as soon as the counter is armed or in response to a hardware Start Trigger You...

Page 119: ...can output a square wave at many different frequencies The frequency generator is independent of the two general purpose 32 bit counter timer modules on M Series devices Figure 7 27 shows a block dia...

Page 120: ...ts section Pulse Generation for ETS In the equivalent time sampling ETS application the counter produces a pulse on the output a specified delay after an active edge on Gate After each active edge on...

Page 121: ...Series devices feature the following counter timing signals Counter n Source Signal Counter n Gate Signal Counter n Aux Signal Counter n A Signal Counter n B Signal Counter n Z Signal Counter n Up_Do...

Page 122: ...ailable in some driver software Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI 0 15 or RTSI 0 7 terminal All PFIs are set to high impedance at startup Cou...

Page 123: ...1 Source can be routed to Counter 0 Gate Counter 0 Internal Output or Counter 0 Source can be routed to Counter 1 Gate Some of these options may not be available in some driver software Routing Count...

Page 124: ...ignal to an Output Terminal You can route Counter n Z out to RTSI 0 7 Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal Counter n HW Arm Signal The Counter n HW Arm...

Page 125: ...Output signal can be internally routed to be a counter timer input or an external source for AI AO DI or DO timing signals Routing Counter n Internal Output to an Output Terminal You can route Counte...

Page 126: ...er input or output function you must first enable or arm the counter Software can arm a counter or configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start...

Page 127: ...n applications For edge counting acquisitions the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generat...

Page 128: ...s introduces jitter on the input signal For the 125 ns and 6 425 s filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 s When a PFI input is routed directly to...

Page 129: ...counter cannot be read therefore you cannot determine how many edges have occurred since the previous rollover Prescaling can be used for event counting provided it is acceptable to have an error of...

Page 130: ...ext Source pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate The details of when exactly the counter synchronizes the Gate...

Page 131: ...nously to the Source signal With duplicate count prevention the counter value and Counter n Internal Output signals change synchronously to the 80 MHz Timebase Note that duplicate count prevention sho...

Page 132: ...r M Series devices use one of three synchronization methods 80 MHz Source Mode Other Internal Source Mode External Source Mode In DAQmx the device uses 80 MHz source mode if you perform the following...

Page 133: ...of the source and counts on the following rising edge of the source as shown in Figure 7 36 Figure 7 36 Other Internal Source Mode External Source Mode In external source mode the device generates a d...

Page 134: ...ounter timer functions Each PFI input also has a programmable debouncing filter Figure 8 1 shows the circuitry of one PFI line Each PFI line is similar Figure 8 1 M Series PFI Circuitry When a termina...

Page 135: ...O Sample Clock ao SampleClock AO Sample Clock Timebase ao SampleClockTimebase AO Pause Trigger ao PauseTrigger Counter input signals for either counter Source Gate Aux HW_Arm A B Z DI Sample Clock di...

Page 136: ...ital input or a static digital output When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 x or PFI x P2 x In ad...

Page 137: ...fer to Table 8 1 The filter setting for each input can be configured independently On power up the filters are disabled Figure 8 3 shows an example of a low to high transition on an input that has its...

Page 138: ...ormal operating range The PFI or DIO lines have a smaller operating range than the AI signals Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and th...

Page 139: ...on sub systems use these signals to manage acquisitions and generations These signals can come from the following sources Your M Series device Other devices in your system through RTSI User input thro...

Page 140: ...general purpose counter timers The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200 External Reference Clock The external reference clock can be used as a source for the inter...

Page 141: ...eceive the 10 MHz reference clock from RTSI or PFI This signal becomes the external reference clock A PLL on each device generates the internal timebases synchronous to the external reference clock On...

Page 142: ...bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer In...

Page 143: ...ai PauseTrigger AO Sample Clock ao SampleClock AO Start Trigger ao StartTrigger AO Pause Trigger ao PauseTrigger 10 MHz Reference Clock Counter n Source Gate Z Internal Output Change Detection Event...

Page 144: ...base ao SampleClockTimebase AO Pause Trigger ao PauseTrigger Counter input signals for either counter Source Gate Aux HW_Arm A B or Z DI Sample Clock di SampleClock DO Sample Clock do SampleClock Most...

Page 145: ...6 425 s filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 s When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series...

Page 146: ...ed trigger line between the first peripheral slot adjacent to the system slot and the other peripheral slots The Star Trigger can be used to synchronize multiple devices or to share a common trigger s...

Page 147: ...6 425 s filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 s When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series...

Page 148: ...following sections for information about bus interface data transfer methods for M Series devices PCI PCI Express Device and PXI PXI Express Module Data Transfer Methods The primary ways to transfer d...

Page 149: ...freeze Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Pr...

Page 150: ...ata Transfer Mechanism property node function in NI DAQmx PXI Considerations PXI clock and trigger signals are only available on PXI devices PXI Clock and Trigger Signals Refer to the PXI_CLK10 PXI Tr...

Page 151: ...eries device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI...

Page 152: ...l M Series devices support analog triggering For more information about triggering compatibility refer to the specifications document for your device Triggering with a Digital Source Your DAQ device c...

Page 153: ...for other functions such as the AO External Reference input as described in the AO Offset and AO Reference Selection section of Chapter 5 Analog Output Analog Input Channels Select any analog input ch...

Page 154: ...perform an action in response to the Analog Comparison Event signal The action can affect the following Analog input acquisition Analog output generation Counter behavior Routing Analog Comparison Eve...

Page 155: ...rising slope you specify a trigger level and amount of hysteresis The high threshold is the trigger level the low threshold is the trigger level minus the hysteresis For the trigger to assert the sig...

Page 156: ...mparison Event signal as shown in Figure 11 6 Figure 11 6 Analog Edge Triggering with Hysteresis Falling Slope Example Analog Window Triggering An analog window trigger occurs when an analog signal ei...

Page 157: ...I PGIA amplifies the AI channel signal before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the inpu...

Page 158: ...devices NI 6220 NI 6221 68 Pin NI PCI 6221 37 Pin NI 6224 NI 6225 NI 6229 NI 6250 NI 6251 NI 6254 NI 6255 NI 6259 NI 6280 NI 6281 NI 6284 NI 6289 To obtain documentation for devices not listed here r...

Page 159: ...I 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 NC...

Page 160: ...Specifications Refer to the NI 6220 Specifications for more detailed information about the PCI PXI 6220 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories sectio...

Page 161: ...evice Specific Information NI 6221 68 Pin The following sections contain information about the PCI PXI 6221 USB 6221 Screw Terminal and USB 6221 BNC PCI PXI 6221 PCI PXI 6221 Pinout Figure A 2 shows t...

Page 162: ...ND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 NC AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI...

Page 163: ...evice Specifications Refer to the NI 6221 Specifications for more detailed information about the PCI PXI 6221 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories s...

Page 164: ...4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND NC AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND AI 2 AI 2 AI 10 AI 2...

Page 165: ...USB 6221 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 Screw Terminal LEDs Fuse Replacement Refer t...

Page 166: ...National Instruments A 9 M Series User Manual USB 6221 BNC USB 6221 BNC Pinout Figure A 4 shows the pinout of the USB 6221 BNC Figure A 4 USB 6221 BNC Top Panel and Pinout...

Page 167: ...Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of...

Page 168: ...OUT 17 PFI 6 CTR 0 A 13 PFI 0 CTR 0 Z 32 PFI 1 CTR 0 B 33 PFI 2 CTR 1 SRC 15 PFI 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 AI 0 AI 0 AI 9...

Page 169: ...tant Links The following list contains links specific to your DAQ device Specifications Refer to the NI 6221 37 Pin Specifications for more detailed information about the PCI 6221 37 pin device Access...

Page 170: ...0 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19...

Page 171: ...Specifications Refer to the NI 6224 Specifications for more detailed information about the PCI PXI 6224 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 172: ...I 64 AI 64 AI 73 AI 65 AI 74 AI 66 AI 67 AI 67 AI 76 AI 68 AI 77 AI 69 AI 70 AI 70 AI 79 AI 71 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53...

Page 173: ...Specifications Refer to the NI 6225 Specifications for more detailed information about the PCI PXI 6225 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 174: ...2 AI 22 AI GND AI 23 AI 23 AI 32 AI 32 AI 33 AI 33 AI 34 AI 34 AI 35 AI 35 AI 36 AI 36 AI GND AI 37 AI 37 AI 38 AI 38 AI 39 AI 39 AI 48 AI 48 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 8...

Page 175: ...s section of Chapter 3 Connector and LED Information for information about the USB 6225 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Start...

Page 176: ...24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 NC No Connect AI 79 AI 71 AI 70 AI 70 AI 77 AI 69 AI 76 AI 68 AI 67...

Page 177: ...o the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6225 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chap...

Page 178: ...1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36...

Page 179: ...Specifications Refer to the NI 6229 Specifications for more detailed information about the PCI PXI 6229 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 180: ...ND NC AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33 34 35 36 37 38 39...

Page 181: ...Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Gettin...

Page 182: ...National Instruments A 25 M Series User Manual USB 6229 BNC USB 6229 BNC Pinout Figure A 12 shows the pinout of the USB 6229 BNC Figure A 12 USB 6229 BNC Top Panel and Pinout...

Page 183: ...Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of C...

Page 184: ...AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0...

Page 185: ...evice Specifications Refer to the NI 6250 Specifications for more detailed information about the PCI PXI 6250 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories s...

Page 186: ...7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1...

Page 187: ...d information about the NI PCI PCIe PXI PXIe 6251 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information...

Page 188: ...30 31 32 AI 4 AI 4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND APFI 0 AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND...

Page 189: ...bout the USB 6251 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 Screw Terminal LEDs Fuse Replacemen...

Page 190: ...National Instruments A 33 M Series User Manual USB 6251 BNC USB 6251 BNC Pinout Figure A 16 shows the pinout of the USB 6251 BNC Figure A 16 USB 6251 BNC Top Panel and Pinout...

Page 191: ...Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of C...

Page 192: ...1 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1...

Page 193: ...efer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section o...

Page 194: ...52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 1...

Page 195: ...Specifications Refer to the NI 6254 Specifications for more detailed information about the PCI PXI 6254 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 196: ...64 AI 64 AI 73 AI 65 AI 74 AI 66 AI 67 AI 67 AI 76 AI 68 AI 77 AI 69 AI 70 AI 70 AI 79 AI 71 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 3...

Page 197: ...Specifications Refer to the NI 6255 Specifications for more detailed information about the PCI PXI 6255 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 198: ...AI 21 AI 22 AI 22 AI GND AI 23 AI 23 AI 32 AI 32 AI 33 AI 33 AI 34 AI 34 AI 35 AI 35 AI 36 AI 36 AI GND AI 37 AI 37 AI 38 AI 38 AI 39 AI 39 AI 48 AI 48 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48...

Page 199: ...s section of Chapter 3 Connector and LED Information for information about the USB 6255 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Start...

Page 200: ...6 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 79 AI 71 AI 70 AI 70 AI 77 AI 69 AI 76 AI 68 AI 67 AI...

Page 201: ...fer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6255 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of...

Page 202: ...AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26...

Page 203: ...rmation about the NI PCI PCIe PXI PXIe 6259 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information PCI E...

Page 204: ...31 AI 23 AI GND APFI 1 AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33...

Page 205: ...Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Gettin...

Page 206: ...National Instruments A 49 M Series User Manual USB 6259 BNC USB 6259 BNC Pinout Figure A 24 shows the pinout of the USB 6259 BNC Figure A 24 USB 6259 BNC Top Panel and Pinout...

Page 207: ...Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of C...

Page 208: ...I 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17...

Page 209: ...o the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chap...

Page 210: ...AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0...

Page 211: ...evice Specifications Refer to the NI 6280 Specifications for more detailed information about the PCI PXI 6280 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories s...

Page 212: ...GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1...

Page 213: ...evice Specifications Refer to the NI 6281 Specifications for more detailed information about the PCI PXI 6281 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories s...

Page 214: ...30 31 32 AI 4 AI 4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND APFI 0 AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND...

Page 215: ...bout the USB 6281 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Screw Terminal LEDs Fuse Replacemen...

Page 216: ...1 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1...

Page 217: ...efer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section o...

Page 218: ...AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40...

Page 219: ...ific to your DAQ device Specifications Refer to the NI 6284 Specifications for more detailed information about the PCI PXI 6284 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables...

Page 220: ...AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40...

Page 221: ...Specifications Refer to the NI 6289 Specifications for more detailed information about the PCI PXI 6289 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section...

Page 222: ...31 AI 23 AI GND APFI 1 AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33...

Page 223: ...Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Gettin...

Page 224: ...I 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17...

Page 225: ...o the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chap...

Page 226: ...timing engine Input Timing Input timing relates to any signal external to the M Series device that is used as a clock or a trigger This timing describes the delays involved with importing the externa...

Page 227: ...Convert Clock signal Sync Convert Clock Timebase is a signal related to Convert Clock Timebase that is used to synchronize external signals before they are used by circuits running from Convert Clock...

Page 228: ...Sample Clock and Sample Clock Selected Sample Clock is the signal selected to become Sample Clock before any synchronization just after the selection mux The Sample Clock marks the beginning of a new...

Page 229: ...aximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important Start Trigger Terminal Selected Referenc...

Page 230: ...ree running and highly irregular In this case Sync Convert Clock Timebase is selected to be the actual external signal and Convert Clock Timebase is a delayed version of the external signal This delay...

Page 231: ...ample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Co...

Page 232: ...ert Clock Timebase If the SI2 counter is not being used external convert case the Convert Clock Timebase is assumed to be not free running and the relationship between the Convert Clock Timebase and t...

Page 233: ...9 Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected...

Page 234: ...Clock Timebase timing domain has received a valid Start Trigger the AI timing engine is ready to begin generating converts as soon as it receives a Sample Clock beginning of a sample Once the Sample...

Page 235: ...Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync S...

Page 236: ...Trigger Hold Time to Sync Convert Clock Timebase 0 t16 Sync Convert Clock Timebase to Start Trigger 0 9 2 4 t17 Start Trigger to POUT PFI 1 1 3 1 RTSI 1 1 2 7 Start Trigger Terminal Selected Reference...

Page 237: ...ns t18 Delay to Selected Start Trigger PFI 3 4 8 8 RTSI 3 3 8 5 STAR 2 7 5 7 t19 Selected Start Trigger Setup Hold Time to Sync Sample Clock Timebase 1 5 t20 Selected Start Trigger Setup Hold Time to...

Page 238: ...Its output is called the Selected Reference Trigger Figure B 13 Reference Trigger and the Analog Input Timing Engine Figure B 14 Reference Trigger Timing Diagram Start Trigger Terminal Selected Refer...

Page 239: ...he Selected Reference Trigger PFI 3 6 8 9 RTSI 3 4 8 4 STAR 2 9 5 6 t23 Selected Reference Trigger Setup to Sync Convert Clock Timebase 1 5 t24 Selected Reference Trigger Hold to Sync Convert Clock Ti...

Page 240: ...is called Selected Sample Clock Figure B 15 Sample Clock and the Analog Input Timing Engine Figure B 16 Sample Clock Timing Diagram SI2_TC Start Trigger Terminal Selected Reference Trigger Reference...

Page 241: ...Max ns t27 Delay to Selected Sample Clock PFI 3 5 8 9 RTSI 3 4 8 6 STAR 2 8 5 9 t28 Selected Sample Clock Setup time to Sync Convert Clock Timebase 1 5 t29 Selected Sample Clock Hold time to Sync Con...

Page 242: ...ne Figure B 19 Pause Trigger Timing Diagram Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigge...

Page 243: ...21 and Table B 11 describe output timing The delays presented in this section assume a 200 pF load on PFI lines and a 50 pF load on RTSI lines Actual delays vary with the actual load Table B 10 Pause...

Page 244: ...6 0 13 9 Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal...

Page 245: ...routed to the DAC and in every pulse the DAC will perform a data conversion This signal can come directly from an external signal or can be the result of dividing down the Sample Clock Timebase using...

Page 246: ...ion block for the Pause Trigger source Star_Trig RTSI or PFI These terminals are the I O interface for the device All external triggers are input on these terminals Internal signals can be exported to...

Page 247: ...be an external signal When the analog output timing engine operates in this mode it is assumed that the source signal for the Sample Clock timebase is a free running clock so the Sync Sample Clock Ti...

Page 248: ...the rising edge of Sync Sample Clock Timebase Table B 14 Sample Clock Timebase and the Sync Sample Clock Timebase Timing Time From To Min ns Max ns t4 Signal_i Sample Clock Timebase 2 4 9 3 t5 Signal_...

Page 249: ...lay be the delay from the trigger terminal to the DFF Let ClockDelay be the delay from the clock terminal to the DFF Let DFFSetup and DFFHold be the setup and hold time of the DFF Let ExternalSetup an...

Page 250: ...aximum delay and two numbers for the minimum delay In order to account for the worst case skew between different input terminals use the range given in the input delay tables in the Input Timing secti...

Page 251: ...y adding the delay in Table B 20 to the total Selected Pause delay Figure B 33 Pause Trigger Path Table B 19 Start Trigger Output Delay Timing Time From To Min ns Max ns t12 Selected Start Trigger PFI...

Page 252: ...ling edge representing a conversion Figure B 35 Sample Clock Path Figure B 36 Sample Clock Delay Timing Diagram Table B 20 Pause Trigger Output Routing Delay Timing Time From To Min ns Max ns t13 Sele...

Page 253: ...ns of the M Series device The other named signals represent internal signals Figure B 37 Digital Waveform Acquisition Timing Circuitry Figure B 38 and Tables B 22 and B 23 describe the digital wavefor...

Page 254: ...given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important When DI Sample Clock is...

Page 255: ...digital waveform generation timing delays and requirements Your inputs must meet the requirements to ensure proper behavior Figure B 40 Digital Waveform Acquisition Timing Delays Table B 24 DO Timing...

Page 256: ...eriods of 80 MHz Timebase The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This diffe...

Page 257: ...s Max ns t1 PFI PFI_i 5 2 6 2 18 2 22 0 RTSI RTSI_i 2 0 2 5 5 0 6 0 STAR STAR_i 0 9 2 5 The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger gr...

Page 258: ...nced to these two signals Any internal signal refers to signals with _i from the previous table or signals coming from another subsystem inside the M Series device It does not include internal timebas...

Page 259: ...delays depend on both the synchronization mode and gating mode for the application Figure B 45 Count Enable Delays Table B 28 Selected Source Delays Timing Time From To Min ns Max ns t3 PFI_i RTSI_i P...

Page 260: ...uirements Table B 29 Selected Gate to Count Enable Delays Time Synchronization Mode Gating Mode Min ns Max ns t4 80 MHz Source Edge 0 5 5 0 Level 1 0 0 5 Other Internal Source Edge 1 2 Source Period 1...

Page 261: ...t6 Counter n Source Pulse Width 80 MHz Source 6 2 Other Internal Source 12 5 External Source 16 0 The times in this table are measured at the pin of the M Series device For example t5 specifies the m...

Page 262: ...an determine whether the setup and hold requirements are met by adding up the various delays of the appropriate signals through the counter timer circuit Figure B 49 DAQ STC2 Internal Block Setup and...

Page 263: ...ld time subtract the Gate delay from the Source delay Use minimum delays Output Delays Refer to the Figure B 41 for the M Series counter timer circuitry Gate Delay PFI to PFI_i 22 0 ns PFI_i to Select...

Page 264: ...or edge gating mode In NI DAQmx the counter timers use level gating mode for the following measurements Edge counting Pulse width measurements Two signal edge separation measurements All other measur...

Page 265: ...ms Table B 35 Quadrature and Two Pulse Encoder Timing Time Description Min ns Max ns t14 Counter n A Period 50 0 t15 Counter n A Pulse Width 25 0 t16 Counter n B Period 50 0 t17 Counter n B Pulse Widt...

Page 266: ...the onboard 80 MHz oscillator Figure B 52 Generating Different Clocks from the Onboard 80 MHz Oscillator Table B 36 Generating Different Clocks from the Onboard 80 MHz Oscillator Time From To Min ns...

Page 267: ...rnal Reference Clock and the PLL Table B 37 Generating Different Clocks Using an External Reference Clock and the PLL Time From To Min ns Max ns t4 80 MHz Timebase 20 MHz Timebase 1 5 5 0 t5 The sourc...

Page 268: ...s due to sampling among multiple channels at various gains In this situation the settling times can increase For more information about charge injection and sampling channels at different gains refer...

Page 269: ...ws multiple channels to be sampled relatively quickly in relationship to the overall sample rate providing a nearly simultaneous effect with a fixed delay between channels Analog Output I am seeing gl...

Page 270: ...signals to my M Series device The Default Counter Timer Pinouts section of Chapter 7 Counters has information about counter signal connections M Series Installation Issues My M Series device is not d...

Page 271: ...ween M Series and E Series multifunction I O families M Series and E Series Pinout Comparison The pinout of Connector 0 of 68 pin M Series devices is similar to the pinout of 68 pin E Series devices O...

Page 272: ...OUT GPCTR1_OUT PFI 13 P2 5 EXT STROBE PFI 10 P2 2 AI HOLD COMP SCANCLK PFI 11 P2 3 PFI 9 CTR 0 GATE GPCTR0_GATE PFI 9 P2 1 As a PFI input the functionality of E Series and M Series devices is similar...

Page 273: ...n M Series devices you have to use one of the PFI terminals to control the up down signal of general purpose Counters 0 and 1 P0 7 P0 7 AO EXT REF EXTREF APFI 0 On E Series devices this terminal is th...

Page 274: ...hts the main differences to remember when moving an application from E Series to M Series devices To access this document go to ni com info and enter the Info Code rde2m1 Using E Series Accessories wi...

Page 275: ...and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQmx 15 5 or later M Se...

Page 276: ...22x 625x 628x devices are not supported in NI DAQmx for Linux NI DAQmx Base Linux Mac OS X The NI DAQmx Base Getting Started Guide describes how to install your NI DAQmx Base software your NI DAQmx Ba...

Page 277: ...ion about getting started with LabVIEW Real Time The Real Time Module Concepts book of the LabVIEW Real Time Module Help includes conceptual information about real time programming techniques applicat...

Page 278: ...to Getting Started with the Measurement Studio Class Libraries To create an NI DAQmx application using Visual Basic NET or Visual C follow these general steps 1 In Visual Studio select File New Projec...

Page 279: ...eb For additional support refer to ni com support or ni com examples Note You can download these documents at ni com manuals Many DAQ specifications and user guides manuals are available as PDFs You m...

Page 280: ...fy your systems accuracy and reliability requirements and provides warranty sparing and calibration services to help you maintain accuracy and minimize downtime over the life of your system Visit ni c...

Page 281: ...tions Engineers make sure every question submitted online receives an answer Software Support Service Membership The Standard Service Program SSP is a renewable one year subscription included with alm...

Page 282: ...rminal A 24 USB 6251 BNC A 34 USB 6251 Mass Termination A 36 USB 6255 Mass Termination A 20 A 44 USB 6259 BNC A 50 USB 6259 Mass Termination A 52 USB 6281 Mass Termination A 60 USB 6289 Mass Terminati...

Page 283: ...ting C 1 analog output 5 1 circuitry 5 1 connecting signals 5 5 data generation methods 5 3 fundamentals 5 1 getting started with applications in software 5 10 glitches on the output signal 5 3 offset...

Page 284: ...281 Mass Termination A 60 USB 6289 Mass Termination A 68 calibration 1 4 cascading counters 7 30 Change Detection Event signal 6 7 changing data transfer methods between DMA and IRQ 10 2 10 3 between...

Page 285: ...4 21 for multichannel scanning 4 6 for PXI 10 3 continuous pulse train generation 7 21 controller DMA 10 2 controlling counting direction 7 2 count enable delay B 34 counter input and output 7 28 outp...

Page 286: ...13 self calibration 1 4 specifications A 1 DI change detection 6 7 DI Sample Clock signal 6 3 di SampleClock 6 3 DIFF connections using with floating signal sources 4 13 using with ground referenced...

Page 287: ...al 7 18 single two signal 7 18 enabling duplicate count prevention in NI DAQmx 7 35 encoders quadrature 7 15 encoding X1 7 15 X2 7 15 X4 7 15 equivalent time sampling 7 23 example programs E 1 exporti...

Page 288: ...put 4 4 ground referenced signal sources connecting 4 17 description 4 17 using in differential mode 4 19 using in NRSE mode 4 20 when to use in differential mode 4 18 when to use in NRSE mode 4 18 wh...

Page 289: ...tion A 20 USB 6225 Screw Terminal A 18 USB 6229 BNC A 26 USB 6229 Screw Terminal A 24 USB 6251 BNC A 34 USB 6251 Mass Termination A 36 USB 6251 Screw Terminal A 32 USB 6255 Mass Termination A 44 USB 6...

Page 290: ...accessory options A 38 cabling options A 38 pinout A 37 specifications A 38 NI 6255 A 39 specifications A 40 A 44 NI 6259 A 45 specifications A 52 NI 6280 A 53 accessory options A 54 cabling options...

Page 291: ...45 specifications A 46 PCI PXI 6221 68 pin accessory options A 6 A 12 cabling options A 6 A 12 pinout A 4 specifications A 6 PCI PXI 6225 accessory options A 16 cabling options A 16 pinout A 15 specif...

Page 292: ...B 6251 BNC A 33 USB 6251 Mass Termination A 35 USB 6251 Screw Terminal A 31 USB 6255 Mass Termination A 43 USB 6255 Screw Terminal A 41 USB 6259 BNC A 49 USB 6259 Mass Termination A 51 USB 6259 Screw...

Page 293: ...l 11 3 clock 9 1 digital 9 1 RSE configuration 4 17 RSE connections using with floating signal sources 4 17 when to use with floating signal sources 4 13 when to use with ground referenced signal sour...

Page 294: ...glitches on 5 3 simple pulse generation 7 19 single period measurement 7 5 point edge counting 7 2 pulse generation 7 19 retriggerable 7 20 with start trigger 7 20 pulse width measurement 7 4 semi per...

Page 295: ...s B 2 analog input Start B 9 analog input timing B 3 analog output B 20 analog output input timing B 21 analog output Pause Trigger B 26 analog output pause trigger B 23 analog output signal definitio...

Page 296: ...relief 1 8 USB 6221 Mass Termination USB cable strain relief 1 8 USB 6221 Screw Terminal accessory options A 8 A 10 A 18 A 24 A 26 A 34 A 50 cabling options A 8 A 10 A 18 A 24 A 26 A 34 A 50 fuse repl...

Page 297: ...A 50 pinout A 49 specifications A 50 USB cable strain relief 1 8 USB 6259 Mass Termination accessory options A 52 cabling options A 52 fuse replacement A 52 LED patterns A 52 pinout A 51 specification...

Page 298: ...3 as timing input signals 8 2 to export timing output signals 8 2 RTSI as outputs 9 5 terminals as timing input signals 9 6 short high quality cabling 4 7 the disk drive power connector PCI Express 1...

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