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Chapter 7
Counters
Figure 7-7 shows an example of a single period measurement.
Figure 7-7.
Single Period Measurement
Buffered Period Measurement
Buffered period measurement is similar to single period measurement, but buffered period
measurement measures multiple periods.
The counter counts the number of rising (or falling) edges on the Source input between each pair
of active edges on the Gate input. At the end of each period on the Gate signal, the counter stores
the count in a hardware save register. A DMA controller transfers the stored values to host
memory.
The counter begins when it is armed. The arm usually occurs in the middle of a period of the
Gate input. So the first value stored in the hardware save register does not reflect a full period of
the Gate input. In most applications, this first point should be discarded.
Figure 7-8 shows an example of a buffered period measurement.
Figure 7-8.
Buffered Period Measurement
Note that if you are using an external signal as the Source, at least one Source pulse should occur
between each active edge of the Gate signal. This condition ensures that correct values are
returned by the counter. If this condition is not met, consider using duplicate count prevention,
described in the
section.
S
OURCE
GATE
Co
u
nter V
a
l
u
e
HW
Sa
ve Regi
s
ter
1
0
3
5
4
5
2
S
OURCE
GATE
Co
u
nter V
a
l
u
e
B
u
ffer
1
1
2
3
3
2
3
3
1
1
2
2
2
2
3
3
2
(Di
s
c
a
rd)
(Di
s
c
a
rd)
(Di
s
c
a
rd)
3
Co
u
nter Armed
Summary of Contents for PCI-6281
Page 1: ...PCI 6281...
