B-8
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Appendix B
Timing Diagrams
Figure B-6.
Convert Clock and the Analog Input Timing Engine
Figure B-7.
Convert Clock Timing Diagram
Table B-3.
Convert Clock Timing
Time
Description
Line
Min (ns)
Max (ns)
t
8
Delay from _i to Sync Convert Clock
Timebase
PFI
6.4
15.9
RTSI
6.0
15.6
STAR
5.7
12.9
S
t
a
rt Trigger
Termin
a
l
S
elected Reference Trigger
Reference Trigger
Termin
a
l
Termin
a
l
S
elected
Sa
mple Clock
Termin
a
l
Termin
a
l
Termin
a
l
S
elected
S
t
a
rt Trigger
RT
S
I
Termin
a
l
Termin
a
l
Termin
a
l
S
elected P
aus
e Trigger
S
I
Co
u
nter
Block
S
I2
Co
u
nter
Block
S
I_TC
Sa
mple Clock Time
bas
e
S
ync
Sa
mple Clock Time
bas
e
Convert Clock Time
bas
e
S
ync Convert Clock Time
bas
e
S
I
S
t
a
rt
p_AI_Convert
S
t
a
rt
1
S
I2_TC
P
aus
e Trigger
_i
POUT
S
ync Convert Clock Time
bas
e
Convert Clock Time
bas
e
p_AI_Convert
t
8
t
9
t
10
t
11
Summary of Contents for PCI-6281
Page 1: ...PCI 6281...
