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Chapter 7
Clocks
100 kHz Timebase
The 100 kHz Timebase also can be used as the Source input to the 32-bit general-purpose
counter/timers.
The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200.
External Reference Clock
The external reference clock can be used as a source for the internal timebases (100 MHz
Timebase, 20 MHz Timebase, and 100 kHz Timebase) on your device. By using the external
reference clock, you can synchronize the internal timebases to an external clock.
The following signals can be routed to drive the external reference clock:
•
PXI_Trigger<0..7>
•
PFI <0..39>
•
PXIe_CLK100
1
•
PXI_STAR
•
PXIe-DSTAR<A, B>
To route a signal to the external reference clock, set the DAQmx Timing Property RefClk.Src to
the desired signal name.
The external reference clock is an input to a Phase-Lock Loop (PLL). The PLL generates the
internal timebases.
Caution
Do
not
disconnect an external reference clock once the devices have been
synchronized or are used by a task. Doing so may cause the device to go into an
unknown state. Make sure that all tasks using a reference clock are stopped before
disconnecting it.
Enabling or disabling the PLL through the use of a reference clock affects the clock
distribution to all subsystems. For this reason, the PLL can only be enabled or
disabled when no other tasks are running in any of the device subsystems.
10 MHz Reference Clock
The 10 MHz reference clock can be used to synchronize other devices to your NI 6614 device.
The 10 MHz reference clock can be routed to the PXI_Trigger <0..7> or PFI <0..39> terminals.
Other devices connected to the PXI_Trig bus can use this signal as a clock input.
The 10 MHz reference clock is generated from the onboard oscillator.
1
PXIe_CLK100, PXI_STAR, and PXIe-DSTAR<A,B> are advanced terminals.
See
Filtering
NI-DAQmx Name Controls
in
LabVIEW Help
for more information on showing advanced
terminals.
