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Chapter 2
Digital I/O
The timing engine ignores the DO Start Trigger signal while the clock generation is in progress.
After the clock generation is finished, the timing engine waits for another start trigger to begin
another clock generation. Figure 2-9 shows a retriggerable DO of four samples.
Figure 2-9.
Retriggerable DO
Using a Digital Start Trigger
To use DO Start Trigger, specify a source and an edge. You can route many signals to DO Start
Trigger Signal. To view the complete list of possible routes, see the
Device Routes
tab in MAX.
Refer to
Device Routing in MAX
in the
NI-DAQmx Help
or the
LabVIEW Help
for more
information.
Waveform generation can be specified to begin either on the rising- or falling-edge of DO Start
Trigger.
Routing DO Start Trigger Signal to an Output Terminal
DO Start Trigger can be routed out to any PFI <0..39>, PXI_Trig <0..7>, or PXIe-DSTARC
terminal. The output is an active high pulse. PFI terminals are configured as inputs by default.
DO Pause Trigger Signal
Use the DO Pause Trigger (do/PauseTrigger) signal to mask off samples in a DAQ sequence.
That is, when DO Pause Trigger is active, no samples occur.
DO Pause Trigger does not stop a sample that is in progress. The pause does not take effect until
the beginning of the next sample.
When generating digital output signals, the generation pauses as soon as the pause trigger is
asserted. If the sample clock source is the onboard clock, the generation resumes as soon as the
pause trigger is deasserted, as shown in Figure 2-10.
Figure 2-10.
DO Pause Trigger with the Onboard Clock Source
DO
S
t
a
rt Trigger
DO
Sa
mple Clock
P
aus
e Trigger
Sa
mple Clock
