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Chapter 2
Digital I/O
DI Change Detection
The device can be configured to detect changes in the DIO signals, which includes Port 0 and
Port 1. Figure 2-12 shows a block diagram of the DIO change detection circuitry.
Figure 2-12.
DI Change Detection
The DIO change detection circuitry can be enabled to detect rising edges, falling edges, or either
edge individually on each DIO line. The device synchronizes each DI signal to the 100 MHz
Timebase, and then sends the signal to the change detectors. The circuitry ORs the output of all
enabled change detectors from every DI signal. The result of this OR is the Change Detection
Event signal.
Change detection performs bus correlation by considering all changes within a 50 ns window
one change detection event. This keeps signals on the same bus synchronized in samples and
prevents overruns.
The Change Detection Event signal can do the following:
•
Drive any PXI_Trig <0..7>, PFI <0..39>, or PXI_STAR signal
•
Drive the DO Sample Clock or DI Sample Clock
•
Generate an interrupt
The Change Detection Event signal also can be used to detect changes on digital output events.
S
ynch
S
ynch
P0.0
P1.7
En
ab
le
En
ab
le
En
ab
le
En
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Ch
a
nge Detection Event
