Table 3.
Sample Clock Sources
Clock
Notes
Frequency
Range
50 MHz
onboard clock
—
30 MHz to
50 MHz
Sync Clock
(DStarA)
Sync Clock (DStarA) is only available on NI PXI
Express FlexRIO FPGA modules (such as the
NI PXIe-796xR). DStarA is not available on NI-793xR
controllers for FlexRIO or NI PXI FlexRIO FPGA
modules (such as the NI PXI-795xR). On PXI Express
modules, Sync Clock is driven by the DStarA from the
PXI/PXIe backplane.
If you change the frequency of Sync Clock (DStarA) or
CLK IN (when used as the Sample Clock), you must
assert Force Initialization.
CLK IN (front
panel SMB)
If you change the frequency of Sync Clock (DStarA) or
CLK IN (when used as the Sample Clock), you must
assert Force Initialization. For more information, refer
to the
FlexRIO Help
.
Related Information
For more information about clock sources, refer to the FlexRIO Help.
Block Diagram
The following figure shows the NI 5751/5751B block diagram and signal flow.
NI 5751/5751B Getting Started Guide
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© National Instruments
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