4-13
BIOS Setup
AGP & P2P Bridge Control
Press <Enter> and the following sub-menu appears:
DRAM Timing
The value in this field depends on performance parameters of the installed
memory chips (DRAM). Do not change the value from the factory setting un-
less you install new memory that has a different performance rating than the
original DRAMs.
SDRAM CAS Latency
This controls the timing delay (in clock cycles) before SDRAM starts a read
command after receiving it. [1.5] increases the system performance the most
while [3.0] provides the most stable performance.
Impor tant
The value plus a ratio (CPU: DDR) with parentheses means the
non-synchronous overclocking.
VGA Share M emory Size
The system shares memory to the onboard VGA card. This setting controls the
exact memory size shared to the VGA card.
Direct Frame Buffer
Frame Buffer is the video memory that stores data for video display (frame).
This field is used to control the processor
’
s access to the section of system
memory reserved for use by the integrated graphics processor as graphics
memory.
[Enabled]
The processor is allowed to directly write to the section of
system memory reserved as graphics memory. This in
creases the performance of applications that write directly
to the frame buffer.
[Disabled
The processor is NOT allowed to directly write to the sec
tion of system memory reserved as graphics memory. This
reduces the performance of applications that write directly
to the frame buffer.
Summary of Contents for 945-E - Hetis - 0 MB RAM
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