2-14
Computer Group Literature Center Web Site
Operating Instructions
2
4.
ALT_RST
∗
function controlled by the Port 92 register in the PIB
(resets the VMEbus when the MVME2603/2604 is system
controller)
5. PCI/ISA I/O Reset function controlled by the Clock Divisor register
in the PIB
6. The VMEbus
SYSRESET
∗
signal
7. VMEbus Reset sources from the Universe ASIC (PCI/VME bus
bridge controller): the System Software reset and Local Software
Reset.
The following table shows which devices are affected by the various types
of resets. For details on using resets, refer to the MVME2600 Series Single
Board Computer Programmer’s Reference Guide, listed in
Appendix D,
Related Documentation
.
Table 2-4. Classes of Reset and Effectiveness
Device Affected
Processor
Raven
ASIC
Falcon
Chip
Set
PCI
Devices
ISA
Devices
VMEbus
(as system
controller
Reset Source
Power-On reset
√
√
√
√
√
√
Reset switch
√
√
√
√
√
√
Watchdog reset
√
√
√
√
√
√
VME
SYSRESET
∗
signal
√
√
√
√
√
√
VME System SW reset
√
√
√
√
√
√
VME Local SW reset
√
√
√
√
√
Hot reset (Port 92)
√
√
√
√
√
PCI/ISA reset
√
√
