Motorola MPC564EVB, User Manual

Page: 20 / 98

1-10 MPC564EVB User’s Manual
Support Logic
having to overwrite the ROM Monitor. The user’s code will boot from internal flash
(0x0000_0000) needs to contain the start of the Exception Vector Table).
When the switch is ON (IP is set), the behavior of the system is normal, dBUG boots and then runs
from 0x0090_0000.
Procedure:
1. Compile and link as though the code was to be placed at the base of the internal flash, but
setup so that it will download to the SRAM starting at address 0xFFF0_8000. The user
should refer to their compiler documentation for this, since it will depend upon the compiler
used.
2. Set IP bit (Switch 5 ON).
3. Download to SRAM (If using serial or ethernet, start the ROM Monitor first. If using BDM
via a wiggler cable, download first, then start ROM Monitor by pointing the program
counter (PC) to 0x0090_0100 and run.)
4. In the ROM Monitor, execute the 'upuser' command.
5. Turn off IP bit (Switch 5 OFF). User code should now be running from reset/POR.
1.3.7 Power Oak K/I/S Hardware Options
Several hardware options surround the Power Oak supply to allow the user access to many of the
features. The options are sorted by leading character to indicate functionality. ‘K’ designated
options refer to VKAM and MPC564 back-up supply options. ‘I’ designated options refer to
Interrupt operation options. ‘S’ designated options refer to MPC564 Reset or I/O signal connection
options. Following is the summary table (also refer to MPC564EVB schematic):
Table 1-3. K/I/S Option Table
Option
Designator
Power Oak Signal
MPC564
signal
Associated
Option
1
Default Connection
K0 VKAM KAPWR K1 Closed
K1 2.6V KAPWR K0 Open
K2 VKAM IRAMSTBY K3 Closed
K3 2.6V IRAMSTBY K2 Open
K4 VKAM VDDSYN K5 Open
K5 +2.6V VDDSYN K4 Closed
I0 WAKEUP IRQ4 Open
I1 WAKEUP IRQ0 I2 Open
I2 PRERESET IRQ0 I1 Open
S0 PORESETB PORESET Closed
S1 HRESETB HRESET Closed
S2 SLEEP RSTCONF_TEXP Open