Motorola M68EVB912B32, User Manual

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OPERATION
68EVB912B32UM/D 3-11
ASM Assembler/Disassembler ASM
syntax:
ASM <Address>
where:
<Address> is a 16-bit hexadecimal number.
The assembler/disassembler is an interactive memory editor that allows memory contents to be
viewed and altered using assembly language mnemonics. Each entered source line is translated
into object code and placed into memory at the time of entry. When displaying memory contents,
each instruction is disassembled into its source mnemonic form and displayed along with the
hexadecimal object code and any instruction operands.
Assembler mnemonics and operands may be entered in any mix of upper and lower case letters.
Any number of spaces may appear between the assembler prompt and the instruction mnemonic
or between the instruction mnemonic and the operand. Numeric values appearing in the operand
field are interpreted as signed decimal numbers. Placing a $ in front of any number will cause
the number to be interpreted as a hexadecimal number.
When an instruction is disassembled and displayed, the D-Bug12 prompt is displayed following
the disassembled instruction. If a carriage return is the first non-space character entered
following the prompt, the next instruction in memory is disassembled and displayed on the next
line.
If a CPU12 instruction is entered following the prompt, the entered instruction is assembled and
placed into memory. The line containing the new entry is erased and the new instruction is
disassembled and displayed on the same line. The next instruction location is then disassembled
and displayed on the screen.
The instruction mnemonics and operand formats accepted by the assembler follows the syntax as
described in the CPU12 Reference Manual.
There are a number of M68HC11 instruction mnemonics that appear in the CPU12 Reference
Manual that do not have directly equivalent CPU12 instructions. These mnemonics, listed in
Table 3-2, are translated into functionally equivalent CPU12 instructions. To aid the current
M68HC11 users who may desire to continue using the M68HC11 mnemonics, the disassembler
portion of the assembler/disassembler recognizes the functionally equivalent CPU12 instructions
and disassembles those instructions into the equivalent M68HC11 mnemonics.
When entering branch instructions, the number placed in the operand field should be the absolute
destination address of the instruction. The assembler calculates the two’s-complement offset of
the branch and places the offset in memory with the instruction