Operating Mode
Technical Summary
2-7
2.4 Clock Source
The DSP56F807EVM uses an 8.00MHz crystal, Y1, connected to its External Crystal
Inputs, EXTAL and XTAL. The DSP56F807 uses its internal PLL to multiply the input
frequency by 10, to achieve its 80MHz maximum operating frequency. An external
oscillator source can be connected to the DSP by using the oscillator bypass connector,
JG6 and JG18; see
Figure 2-3. Schematic Diagram of the Clock Interface
2.5 Operating Mode
The DSP56F807EVM provides a boot-up MODE selection jumper, JG7. This jumper is
used to select the operating mode of the DSP as it exits RESET. Refer to the DSP56F807
User’s Manual for a complete description of the chip’s operating modes.
the two operation modes available on the DSP56F807.
Table 2-2. Operating Mode Selection
Operating Mode
JG7
Comment
0
1–2
Bootstrap from internal memory (GND)
3
No Jumper
Bootstrap from external memory (3.3V)
DSP56F807
EXTERNAL
OSCILLATOR
HEADERS
JG5
3
2
1
1
2
EXTAL
XTAL
JG6
10M
8.00MHz
Summary of Contents for Digital DNA DSP56F807
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