Motorola APX 2000, Detailed Service Manual

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Theory of Operation: Main Board 3-17
3.1.4.2 Trident IC U702
The Trident IC, U702, is a multiple protocol, multiple band transceiver Motorola-proprietary, CMOS
IC, with built-in dual-port modulation. The Trident IC incorporates frequency division and comparison
circuitry to keep the VCO signals stable. The Trident IC is controlled by the MCU through a serial
bus. All of the synthesizer circuitry is enclosed in rigid metal cans on the transceiver board to reduce
interference effects. Separate power supply inputs are used for the various functional blocks on the
IC. Inductors L727, L733, L735, L738 and L741 provide isolation between the IC and the different
power supplies. Host control is through a four-wire, smart SPI interface (pins D8, D9, D10 and C11).
Some of the Trident IC functions include frequency synthesis, reference clock generation,
modulation control, voltage multiplication and filtering, near-integer spurious reduction, RF divide-by-
two and auxiliary SPI.
3.1.4.3 Synthesizer
Frequency synthesis functions include a low band and high band mode prescaler, a phase detector,
a programmable loop divider and its control logic, a charge pump, and a lock detector output.
Fractional-N synthesizer principles of operation are covered in detail in the manufacturers' literature.
No similar discussion will be attempted here.
3.1.4.4 Clocks
U702, pin K5 (REF_IN), is the 16.8 MHz reference oscillator input from the VCTCXO (Y701).
3.1.4.5 Modulation
To support many voice, data, and signaling protocols, APX 1000 radios must modulate the
transmitter carrier frequency over a wide audio frequency range, from less than 10 Hz up to more
than 6 kHz. The Trident IC supports audio frequencies down to zero Hz by using dual-port
modulation. The digital audio signal at pin F11 (TXD) is transferred to the Trident baseband circuitry
via the TX Serial Synchronous Interface (SSI) bus. The data is then internally divided into high and
low-frequency components, which modify both the synthesizer dividers and the external VCOs
through a signal on HP_MOD_OUT (pin L9). The DSP scaling is adjusted to achieve a flat
modulation frequency response during the transmitter modulation balance calibration.
3.1.4.6 Voltage Multiplier and Superfilter
Pins H10 (VMULT2) and H11 (VMULT1) together with diode arrays D722 and D723 and their
associated capacitors form the voltage multiplier. The voltage multiplier generates 10.625 Vdc to
supply the phase detector and charge-pump output stage at pin F1 (MN_CP_VCC). The superfilter is
an active filter that provides a low-noise supply for the VCOs. The input is a regulated 5 Vdc from
DC_LIN_5V at pin K4 (SF_SPLY). The output is a superfiltered voltage at pin J5 (SF_OUT).
3.1.4.7 Loop Filter
The components connected to pins G3 (MN_CP) and G2 (MN_ADAPT_CP) form a 4th-order, RC
low-pass filter. Current from the charge-pump output, MN_CP, is transformed to voltage
VCO_VCTRL, which modulates the VCOs. Extra current is supplied by MN_ADAPT_CP for rapid
phase-lock acquisition during frequency changes. The lock detector output pin B4
(TEST1_LCKDET) goes to a logic “1” to indicate when the phase-lock loop is in lock.
3.1.4.8 Buffers and VCOs
Q731 and surrounding circuitry is the prescalar buffer that takes the output of the VCOs and feeds
the prescalar input to the Trident IC, pin G1 (M_PRSC).