9
Table 2: Prescalar Values
Prescale Value
Divisor___
00000
Do not use
00001
/4
00010
/6
00011
/8
00100
/10
00101
/12
00110
/14
00111
/16
01xxx
Do not use
1xxxx
Do not use
_H12ADTCTL5 is used to select the conversion mode, which channels are to be
converted and to initiate the conversions. The conversion sequence is started by
any write made to this register. If a write is made to this register while a
conversion sequence is in progress, the conversion is aborted and the SCF and CCF
flags are reset.
_H12ADTCTL5:
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
unused
S8CM
SCAN
MULT
CD
CC
CB
CA
S8CM is used to select between making 4 conversions, when the bit is set to zero,
and 8 conversions, when the bit is set to one.
SCAN is used to select between performing either a single conversion or multiple
conversions. If SCAN is set to zero, then a single conversion will be run and the
flag will then be set. If SCAN is set to 1, then the A/D converter will run
continuous conversions on the A/D channels.
MULT determines whether the conversion is run on a single channel or on multiple
channels. When MULT zero, the A/D converter runs all the conversions on a single
channel, which is selected by CD,CC,CB, and CA. When MULT is one, the conversion
is run on several different channels in the group specified by CD,CC,CB, and CA.
The possible channel combinations are in Table 3.
Table 3: A/D Converter Settings
S8CM CD CC CB CA Channel Signal Result in ADRx if MULT = 1
0
0 0 0* 0*
AN0
ADR0
0
0 0 0* 1*
AN1
ADR1
0
0 0 1* 0*
AN2
ADR2
0
0 0 1* 1*
AN3
ADR3
0
0 1 0* 0*
AN4
ADR0
0
0 1 0* 1*
AN5
ADR1
0
0 1 1* 0*
AN6
ADR2
0
0 1 1* 1*
AN7
ADR3
0
1 0 0* 0*
Reserved
ADR0
0
1 0 0* 1*
Reserved
ADR1
0
1 0 1* 0*
Reserved
ADR2
0
1 0 1* 1*
Reserved
ADR3
0
1 1 0* 0*
V RH
ADR0
0
1 1 0* 1*
V RL
ADR1
0
1 1 1* 0*
(V RH + V RL )/2 ADR2
0
1 1 1* 1*
TEST/Reserved
ADR3
1
0 0* 0* 0*
AN0
ADR0
1
0 0* 0* 1*
AN1
ADR1
1
0 0* 1* 0*
AN2
ADR2
Summary of Contents for 68HC12
Page 31: ...31 ...