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Output Compare 7 

 
Output Compare 7 has a special feature that makes it very powerful. 
Output Compare 7 allows the programmer to change the state of any of the output 
compare pin, without changing the operation that is performed by that Output 
Compare.  This is particularly useful for generating pulsewidth modulated signals.  
Anyone interested in this particular application should refer to the LITEC manual 
for more detailed information on pulsewidth modulation. 
 
The method for using output compare 7 to control the other output compares is set 
up as follows.  Just as with any other output compare operation, the time at which 
OC7 is triggered must be stored in _H12TOC7. The next step is to select which 
channels will be controlled by OC7 and what will occur when OC7 triggers.  This is 
done using the _H12OC7M and _H12OC7D registers. 
 
_H12OC7M is used to select which channels are controlled by OC7.  Writing a one to 
a bit in _H12OC7M assigns control of the corresponding channel to OC7. The data 
that is output by the channel is stored in _H12OC7D.  When OC7 is triggered, for 
each bit that is set in _H12OC7M, the corresponding data bit in _H12OC7D is written 
to the output compare pin. 
 
A successful OC7 event can be used to cause the “free running” counter to be reset.  
This is done by writing a one to TCRE in _H12TMSK2.  Note if you write a one and 
set the OC7 event for $0000 the free running counter will stay at $0000.  Similarly 
if you set OC7 for $FFFF, the Timer Overflow Flag will never be set.  (See Timer 
Overflow Interrupt.) 
 
_H12OC7M: 
bit 7    bit 6    bit 5    bit 4     bit 3    bit 2    bit 1    bit 0 
OC7M7 

OC7M6 

OC7M5 

OC7M4 

OC7M3 

OC7M2 

OC7M1 

OC7M0 

 
_H120C7D: 
bit 7    bit 6    bit 5     bit 4    bit 3    bit 2    bit 1    bit 0 
OC7D7 

OC7D6 

OC7D5 

OC7D4 

OC7D3 

OC7D2 

OC7D1 

OC7D0 

 
_H12TMSK2: 
bit 7    bit 6     bit 5   bit 4     bit 3    bit 2    bit 1    bit 0 
TOIE 

unused 

TPE 

TDRB 

TCRE 

PR2 

PR1 

PR0 

 

Sample Code 

This code simply shows how to setup OC7. 
 
 

_H12TC7=0x4000; 

 

// Set up the time when the OC triggers 

_H12OC7M=0x01; 

 

// select channel 0 

_H12OC7D=0x00; 

// cause channel 0 to output a low when 

 

// triggered 

 

Summary of Contents for 68HC12

Page 1: ...onverter 8 c Timer Functions 12 i Timer Output Compare 13 ii Output Compare 7 14 iii Timer Compare Force Register 15 iv Input Capture 15 5 Interrupt Service Routines 16 a Overview 16 b Interrupt Priority 17 c Real Time Interrupt 18 d Timer Overflow Interrupt 19 e Pulse Accumulator Edge Triggered Interrupt 20 f Pulse Accumulator Overflow Triggered Interrupt 22 g Output Compare Interrupt 23 h Input ...

Page 2: ...include an increase in the number of A D converter registers Timer output compare and input capture pins and I O ports Also added is a second SCI connector and a new interrupt called a Key Wakeup interrupt This manual is intended to provide a brief introduction to the 68HC12 and how to program it in C using the Introl C compiler 4 00 This manual is intended primarily for those people who are alrea...

Page 3: ...al function declarations needed by Introl to compile the program DBUG12 H This contains the information need to call the D Bug12 routines and to handle interrupts Omitting this file will result in the calls to the D Bug12 routines being flagged as errors by the compiler Your main function must be of the format void _ _main The two 2 underscores before main are necessary as that is the format that ...

Page 4: ...The error message that is returned is that the function does not exist Putting the DB12 before the function name will solve this problem D Bug12 Functions Readers interested in a more in depth explanation of the D Bug12 routines are referred to Motorola Document an1280a Using the Callable Routines in D Bug 12 available on the web at http www ecse rpi edu Courses CStudio appnotes getchar This funct...

Page 5: ...etCmdLine char CmdLineStr int CmdLineLen Return Value An error code of NoErr The location where data that is read in is stored and the number of characters that are to be read are determined by CmdLineStr and CmdLineLen respectively CmdLineStr is a char array that is created by the programmer This is where the input line from the user is stored CmdLineLen is the length of the string to be read in ...

Page 6: ...f the string pointed to by cs strcpy This routine makes a copy of string two to string one The string to be copied must be null terminated Function Prototype char strcpy char s1 char s2 Return Value A pointer to s1 out2hex This outputs an 8 bit number on the screen as two hexadecimal numbers Function Prototype void out2hex unsigned int num Return Value None out4hex This outputs a 16 bit number on ...

Page 7: ...an input and when it is set to 1 it is an output Port H is an 8 bit general purpose I O port The direction of the port is controlled by the _H12DDRH When _H12DDRH bit is set to 0 the port pin is an input and when it is set to 1 it is an output Port J is an 8 bit general purpose I O port The direction of the port is controlled by the _H12DDRJ When _H12DDRJ bit is set to 0 the port pin is an input a...

Page 8: ...upt is enabled when the bit equals one and disabled when the bit is set to zero In scan mode this bit is set to 0 to disable interrupts Bit 0 is the interrupt flag ASCIF which is not used in the polling version of the A D converter _H12ADTCTL2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ADPU AFFC AWAI unused unused unused ASCIE ASCIF _H12ADTCTL3 should always be set to 0x00 This is used to con...

Page 9: ...o zero then a single conversion will be run and the flag will then be set If SCAN is set to 1 then the A D converter will run continuous conversions on the A D channels MULT determines whether the conversion is run on a single channel or on multiple channels When MULT zero the A D converter runs all the conversions on a single channel which is selected by CD CC CB and CA When MULT is one the conve...

Page 10: ...sion counter They are the pointer for the conversion cycle and reflect which result register will be written to next CCF7 CCF0 are the Conversion Complete Flags CCF for the individual A D channels When the conversion sequence for a channel has been complete the flag is set The flags can be cleared by reading the A D register for the channel and by reading the _H12STAT register The results of the A...

Page 11: ...11 DB12 out2hex _H12ADR1H DB12 printf n r DB12 out2hex _H12ADR2H DB12 printf n r DB12 out2hex _H12ADR3H ...

Page 12: ...can not be written to by the user Port T is used as I O pins for the timer input capture and timer output compare Each pin can serve as either an input capture or output compare pin The function of the pin is selected by the state of the _H12TIOS register Each bit in _H12TIOS corresponds to a pin of Port T When the bit is set to 0 the pin is used as an input capture when the bit is set to a one th...

Page 13: ...Timer disconnected from output logic 0 1 toggle Ocn output line 1 0 clear Ocn output line to 0 1 1 set Ocn output line to 1 _H12TCTL1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 OM7 OL7 OM6 OL6 OM5 OL5 OM4 OL4 _H12TCTL2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 OM3 OL3 OM2 OL2 OM1 OL1 OM0 OL0 Having determined the action taken on a successful match the next step is to make sure timer int...

Page 14: ... to a bit in _H12OC7M assigns control of the corresponding channel to OC7 The data that is output by the channel is stored in _H12OC7D When OC7 is triggered for each bit that is set in _H12OC7M the corresponding data bit in _H12OC7D is written to the output compare pin A successful OC7 event can be used to cause the free running counter to be reset This is done by writing a one to TCRE in _H12TMSK...

Page 15: ...rmine which edge triggers the input capture The different configurations of these bits are in Table 5 Table 5 Input Capture selects EDGxB EDGxA Configuration__________ 0 0 Capture disabled 0 1 Capture on rising edge 1 0 Capture on falling edge 1 1 Capture on any edge _H12TCTL3 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 EDG7B EDG7A EDG6B EDG6A EDG5B EDG5A EDG4B EDG4A _H12TCTL4 bit 7 bit 6 bit ...

Page 16: ...s stored in the D Bug12 header file When assigning the interrupt SetUserVector is called and the name of the interrupt as well as the ISR name are passed as parameters This will store the address of the ISR in the vector table For example If you are using the Real Time Interrupt RTI and have it call an ISR called RTIInt when it is triggered the code would look like DB12 SetUserVector RTI RTIInt Th...

Page 17: ...1 23 AtoD 24 PortJKey 25 PortHKey The priority of these can be changed by using _H12HPRIO register The first six interrupts are unmaskable and can not have their priority changed The other interrupts are all maskable and may have their priority changed An interrupt may be made the highest priority interrupt by writing its address value to _H12HPRIO The address values are listed below in hex for ea...

Page 18: ...768ms 1 1 1 65 536ms _H12RTICTL bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 RTIE RSWAI RSBCK unused RTBYP RTR2 RTR1 RTR0 After the interrupt is triggered the ISR must clear the flag This is done by writing a one to the Real Time Interrupt Flag RTIF in _H12RTIFLG register _H12RTIFLG bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 RTIF unused unused unused unused unused unused unused Sample Code...

Page 19: ...uted The ISR must clear the flag by writing a one to the Timer Overflow Flag in the _H12TFLG2 register _H12TMSK2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 TOIE unused TPE TDRB TCRE PR2 PR1 PR0 _H12TFLG2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 TOF unused unused unused unused unused unused unused Sample Code This code calls an interrupt every time the Timer Overflow Interrupt occurs _ ...

Page 20: ...ternal clock used to increment the pulse accumulator is 8MHz 64 If PEDGE equals one when the pulse accumulator input pin goes low it enables an internal clock which is connected to the pulse accumulator and the trailing rising edge on the pulse accumulator input sets the PAIF flag The internal clock used to increment the pulse accumulator is 8MHz 64 The timer must be enable to use these since the ...

Page 21: ...ored in _H12PACNT Sample Code This code detects the edge and triggers an interrupt _ _mod2_ _ void PAEdgeInt function prototype void _ _main DB12 SetUserVector PAEdge PAEdgeInt _H12PACTL 0x55 set the pulse accumulator rising edge while 1 wait _ _mod2_ _ void PAEdgeInt Pulse Accumulator ISR DB12 printf Pulse Accum triggered n _H12PAFLG 0x01 clear the flag ...

Page 22: ...ing PAI to one for Overflow operation PAOVI is set to one The user must clear the flag in the ISR by writing a 1 to PAOVIF in the _H12PAFLG register _H12PACTL bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 unused PAEN PAMOD PEDGE CLK1 CLK0 PAOVI PAI _H12PAFLG bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 unused unused Unused unused unused unused PAOVIF PAIF Sample Code This code simply displays...

Page 23: ...ed The flag must be cleared by writing a one to the bit _H12TFLG1 register that corresponds to the channel which triggered the interrupt _H12TMSK1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 C7I C6I C5I C4I C3I C2I C1I C0I _H12FLG1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 C7F C6F C5F C4F C3F C2F C1F C0F Sample Code This code calls the ISR when the Output Compare 0 generates an interrupt...

Page 24: ...in the _H12TFLG1 register that corresponds to the channel which triggered the interrupt _H12TMSK1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 C7I C6I C5I C4I C3I C2I C1I C0I _H12FLG1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 C7F C6F C5F C4F C3F C2F C1F C0F Sample Code This code calls the ISR when the input capture generates an interrupt _ _mod2_ _ void Timer0Int function prototype void _...

Page 25: ...TCTL2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ADPU AFFC AWAI unused unused unused ASCIE ASCIF Sample Code This sample code calls the A D interrupt when the A D cycle is completed _ _mod2_ _ void AtoDInt Function prototype void _ _main main program DB12 setUserVector AtoD AtoDInt set the vector address _H12ADTCTL2 0x82 turn on ATD and on the interrupt _H12ADTCTL3 0x00 don t stop at breakpoi...

Page 26: ...e in the 68HC12 There are a few differences between the IRQ on the HC11 and the HC12 Unlike the HC11 the IRQ is not time protected IRQEN may be written to and read from at any time The value of IRQE however may only be written once in the program _H12INTCR bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 IRQE IRQEN DLY unused unused unused unused unused Sample Code This is sample code that triggers...

Page 27: ...Key Wakeup interrupt are located in _H12KWIFH Multiple flags can be set at the same time although software must be written in order to determine which flags have been set The flags are cleared by writing a one to the flag bits that have been set It is a good idea to clear the flags before the Key Wakeup Interrupt is enabled to prevent any false triggers _H12KWIEH bit 7 bit 6 bit 5 bit 4 bit 3 bit ...

Page 28: ...zero to a bit of _H12KPOLJ makes that channel falling edge triggered Writing a one makes the channel rising edge triggered _H12KPOLJ bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 The pull up and pulldown resisters are controlled by _H12PUPSJ and _H12PULEJ _H12PUPSJ selects between using pull up resisters and pulldown resisters When a bit in _H12PUP...

Page 29: ...LJ 0x00 falling edge sets flag _H12KWIFJ 0xFF clear any flags that may be set _H12PUPSJ 0xFF pull up _H12PULEJ 0xFF pull up enabled all bits _H12KWIEJ 0xFF Enable all bits of J for keypad while 1 Infinite loop _ _mod2_ _ void KeyJ void function prototype _H12KWIFJ _H12KWIFJ clear the flag ...

Page 30: ...res Pins normally grounded held low Pins normally pulled high through pull up resistors in 6812 switch closure will temporally pull bit low Keypad wiring diagram The keypad is a passive device with only switches that connect wires on the crosspoint matrix of 4 x 4 wires ...

Page 31: ...31 ...

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