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Mitsubishi MELSEC-Q/L, Programming Manual

The Mitsubishi Electric MELSEC-Q/L is an advanced programmable logic controller (PLC) system. Access its comprehensive Programming Manual for free download on our website, offering detailed instructions and guidance. Enhance your understanding of this high-performance product and elevate your programming skills with ease. Get the manual at manualshive.com.

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510

ASIN, ASINP

F

unct

i

on

(1) Returns the SIN

-1

 angle of the SIN value designated by  , and stores operation results at word device designated by  .

(2) The SIN value designated by   can be in the range from -1.0 to 1.0.

(3) The angle (operation result) stored at   is stored in radian units.

For more information on the conversion between radian and angle data, see description of RAD and DEG instructions.

Operat

i

on

 E

rror

(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into 

SD0.

*2:

There are CPU modules that will not result in an operation error if -0 is specified.
For details, refer to Page 88, Section 3.2.4.

Program

 E

xamp

l

e

(1) The following program seeks the inverse sine of the 32-bit floating decimal point real number at D0 and D1, and outputs 

the angle to the 4 BCD digits at Y40 to Y4F.

[Ladder Mode]

[List Mode]

Error 

code

Error details

Q00J/

Q00/

Q01

QnH

 QnPH  QnPRH

QnU

LCPU

4100

The value specified by   is not within the range between -1.0 and 1.0.

––

The specified device value is -0.

*2

––

––

––

4140

The specified device value is not within the following range:

    0, 2

-126

 

 | Specified device value | < 2

128

The specified device value is -0, unnormalized number, nonnumeric, 
and ±

.

––

––

––

––

4141

The result exceeds the following range (when an overflow occurs):

    2

128

 

 | Operation result |

––

––

––

––

S

D

+1

+1

S

D

S

D

32-bit floating-point
real number

SIN   (

)

32-bit floating-point
real number

-1

S

D

S

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Summary of Contents for MELSEC-Q/L

Page 1: ......

Page 2: ......

Page 3: ...ng this product please read this manual and the related manuals introduced in this manual and pay full attention to safety to handle the product correctly Please store this manual in a safe place and make it accessible when required Always forward a copy of the manual to the end user ...

Page 4: ...NDED OR EXCLUDED BY INSTRUCTIONS PRECAUTIONS OR WARNING CONTAINED IN MITSUBISHI S USER INSTRUCTION AND OR SAFETY MANUALS TECHNICAL BULLETINS AND GUIDELINES FOR the PRODUCT Prohibited Application Prohibited Applications include but not limited to the use of the PRODUCT in Nuclear Power Plants and any other power plants operated by Power companies and or any other cases in which the public could be ...

Page 5: ...7 18 17 Section 9 9 7 18 18 Section 9 10 7 18 19 Section 9 11 9 1 Section 9 11 1 9 1 1 Section 9 11 2 9 1 2 Section 9 12 9 2 Section 9 12 1 9 2 1 Chapter 10 11 Chapter 11 10 Jan 2010 SH NA 080809ENG D L02CPU L26CPU BT SAFETY PRECAUTIONS INTRODUCTION MANUALS Chapter 1 Section 2 3 2 2 4 1 2 4 2 2 4 3 2 4 4 2 5 1 2 5 6 2 5 18 3 2 4 3 3 3 4 3 5 1 3 5 2 3 6 3 8 3 10 Chapter 4 5 6 7 8 9 10 11 12 APPENDI...

Page 6: ...the LCPU having a serial number 13012 or later Jul 2011 SH NA 080809ENG I L02CPU P L26CPU PBT INTRODUCTION Section 1 2 5 2 1 5 2 4 5 2 5 7 18 9 9 1 Appendix 1 5 1 Appendix 1 5 2 Appendix 2 1 1 Oct 2011 SH NA 080809ENG J INTRODUCTION MANUALS Section 1 2 2 1 2 4 3 2 6 2 3 3 3 6 6 4 4 6 6 1 6 8 1 6 8 2 6 8 7 7 6 10 7 6 13 7 8 1 7 8 2 7 9 1 7 9 2 7 10 1 7 14 1 7 14 2 7 18 4 to 7 18 14 7 18 16 7 18 18 ...

Page 7: ...liarize yourself with the functions and performance of the Q series and L series sequencers in order to handle this product correctly When applying the program examples introduced in this manual to the actual system ensure the applicability and confirm that it will not cause system control problems Relevant CPU module INTRODUCTION CPU module Model Basic model QCPU Q00JCPU Q00CPU Q01CPU High Perfom...

Page 8: ...c operation instructions 39 2 4 3 Data conversion instructions 44 2 4 4 Data transfer instructions 47 2 4 5 Program branch instructions 49 2 4 6 Program execution control instructions 49 2 4 7 I O refresh instructions 49 2 4 8 Other convenient instructions 50 2 5 Application Instructions 51 2 5 1 Logical operation instructions 51 2 5 2 Rotation instructions 53 2 5 3 Shift instructions 54 2 5 4 Bit...

Page 9: ...gnating Data 83 3 2 1 Using bit data 83 3 2 2 Using word 16 bits data 84 3 2 3 Using double word data 32 bits 85 3 2 4 Using real number data 88 3 2 5 Using character string data 90 3 3 Indexing 91 3 4 Indirect Specification 100 3 5 Reducing Instruction Processing Time 102 3 5 1 Subset Processing 102 3 5 2 Operation processing with standard device registers Z Universal model QCPU and LCPU only 103...

Page 10: ...UT C Counter 144 5 3 4 OUT F Annunciator output 146 5 3 5 SET Setting devices excluding annunciators 147 5 3 6 RST Resetting devices excluding annunciators 148 5 3 7 SET F Setting annunciators 150 RST F Resetting annunciators 150 5 3 8 PLS Leading edge output 152 PLF Trailing edge output 152 5 3 9 FF Bit device output inversion 154 5 3 10 DELTA DELTAP Pulse conversion of direct output 155 5 4 Shif...

Page 11: ...oating point data Double precision 212 6 2 11 E E P E E P Multiplication and division of floating point data Single precision 216 6 2 12 ED ED P ED ED P Multiplication and division of floating point data Double precision 218 6 2 13 BK BK P BK BK P BIN 16 bit data block addition and subtraction operations 220 6 2 14 DBK DBK P DBK BIN 32 bit data block addition and subtraction operations 222 DBK P 6...

Page 12: ...a to BCD 4 digit data 250 6 3 15 BKBIN BKBINP Conversion from block BCD 4 digit data to block BIN 16 bit data 251 6 3 16 ECON ECONP Conversion from Single precision to Double precision 253 6 3 17 EDCON EDCONP Conversion from Double precision to Single precision 254 6 4 Data Transfer Instructions 256 6 4 1 MOV MOVP 16 bit data transfer 256 DMOV DMOVP 32 bit data transfer 256 6 4 2 EMOV EMOVP Floati...

Page 13: ...erations 318 DXOR DXORP 32 bit exclusive OR operations 318 7 1 6 BKXOR BKXORP Block exclusive OR operations 322 7 1 7 WXNR WXNRP 16 bit data exclusive NOR operations 324 DXNR DXNRP 32 bit data exclusive NOR operations 324 7 1 8 BKXNR BKXNRP Block exclusive NOR operations 328 7 2 Rotation instruction 330 7 2 1 ROR RORP RCR RCRPRight rotation of 16 bit data 330 7 2 2 ROL ROLP RCL RCLP Left rotation ...

Page 14: ...P Minimum value search for 32 bit data 373 7 5 12 SORT BIN 16 bit data sort operations 375 DSORT BIN 32 bit data sort operations 375 7 5 13 WSUM WSUMP Calculation of totals for 16 bit data 378 7 5 14 DWSUM DWSUMP Calculation of totals for 32 bit data 379 7 5 15 MEAN MEANP Calculation of averages for 16 bit data 381 DMEAN DMEANP Calculation of averages for 32 bit data 381 7 6 Structure creation ins...

Page 15: ...BINP Conversion from decimal ASCII to BIN 16 bit data 455 DDABIN DDABINP Conversion from decimal ASCII to BIN 32 bit data 455 7 11 5 HABIN HABINP Conversion from hexadecimal ASCII to BIN 16 bit data 457 DHABIN DHABINP Conversion from hexadecimal ASCII to BIN 32 bit data 457 7 11 6 DABCD DABCDP Conversion from decimal ASCII to BCD 4 digit data 459 DDABCD DDABCDP Conversion from decimal ASCII to BCD...

Page 16: ...RADP Conversion from floating point angle to radian Single precision 519 7 12 14 RADD RADDP Conversion from floating point angle to radian Double precision 521 7 12 15 DEG DEGP Conversion from floating point radian to angle Single precision 522 7 12 16 DEGD DEGDP Conversion from floating point radian to angle Double precision 523 7 12 17 POW POWP Exponentiation operation on floating point data Sin...

Page 17: ... 1 RSET RSETP Switching file register block numbers 566 7 14 2 QDRSET QDRSETP File setting for file register 567 7 14 3 QCDSET QCDSETP File setting for comments 569 7 15 Clock instructions 572 7 15 1 DATERD DATERDP Reading clock data 572 7 15 2 DATEWR DATEWRP Writing clock data 573 7 15 3 DATE DATE P Clock data addition operation 575 7 15 4 DATE DATE P Clock data subtraction operation 577 7 15 5 S...

Page 18: ...gram from memory card 652 7 18 17 PUNLOADP Unloading program from program memory 654 7 18 18 PSWAPP Loading and unloading 656 7 18 19 RBMOV RBMOVP High speed block transfer of file register 658 7 18 20 UMSG User Message 662 CHAPTER 8 INSTRUCTIONS FOR DATA LINK 665 8 1 Network refresh instructions 665 8 1 1 S ZCOM SP ZCOM Refresh for the designated module 665 8 2 Reading Writing Routing Information...

Page 19: ...rocessing time 802 Appendix 1 5 2 Processing time of instructions other than subset instruction 808 Appendix 2 CPU PERFORMANCE COMPARISON 826 Appendix 2 1 Comparison of Q LCPU with AnNCPU AnACPU and AnUCPU 826 Appendix 2 1 1 Usable devices 826 Appendix 2 1 2 I O control mode 827 Appendix 2 1 3 Data that can be used by instructions 828 Appendix 2 1 4 Timer comparison 829 Appendix 2 1 5 Comparison o...

Page 20: ...ices for programming Qn H QnPH QnPRHCPU User s Manual Function Explanation Program Fundamentals SH 080808ENG 13JZ28 Functions methods and devices for programming QnUCPU User s Manual Communication via Built in Ethernet Port SH 080811ENG 13JZ29 Functions for the communication via built in Ethernet port of the CPU module MELSEC L CPU Module User s Manual Hardware design Maintenance and Inspection SH...

Page 21: ...917ENG 13JZ47 Specifications procedures and settings before system operation parameter settings programming and troubleshooting of the CC Link IE field network module MELSEC L CC Link IE Field Network Master Local Module User s Manual SH 080972ENG 13JZ54 Specifications procedures and settings before system operation parameter settings programming and troubleshooting of the CC Link IE field network...

Page 22: ...h the CPU in the manuals below QnUCPU User s Manual Function Explanation Program Fundamentals Qn H QnPH QnPRHCPU User s Manual Function Explanation Program Fundamentals MELSEC L CPU Module User s Manual Function Explanation Program Fundamentals 1 Basic model QCPU This manual Describes SFC Qn H QnPH QnPRHCPU User s Manual Function Explanation Program Fundamentals MELSEC Q L Programming Manual Commo...

Page 23: ...L MELSEC Q L Programming Manual Structured Text Describes the ST language Describes the functions and devices of the CPU module and programming Qn H QnPH QnPRHCPU User s Manual Describes the functions and devices of the CPU module and programming MELSEC Q L Programming Manual Common Instructions MELSEC Q L QnA Programming Manual SFC MELSEC Q L Programming Manual MELSAP L MELSEC Q L Programming Man...

Page 24: ...anuals on the right Describes SFC Describes MELSAP L Describes the ST language Describes the instructions to perform PID control MELSEC Q L QnA Programming Manual PID Control Instructions This manual Describes SFC QnUCPU User s Manual Function Explanation Program Fundamentals MELSEC Q L Programming Manual Common Instructions Describes the instructions other than those described in the manuals on t...

Page 25: ...20UDEHCPU Q26UDEHCPU Q50UDEHCPU and Q100UDEHCPU QnU D H CPU Generic temr for Q02UCPU Q03UDCPU Q04UDHCPU Q06UDHCPU Q10UDHCPU Q13UDHCPU Q20UDHCPU and Q26UDHCPU QnUD H CPU Generic name for Q03UDCPU Q04UDHCPU Q06UDHCPU Q10UDHCPU Q13UDHCPU Q20UDHCPU and Q26UDHCPU QnUDE H CPU Generic name for Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q10UDEHCPU Q13UDEHCPU Q20UDEHCPU Q26UDEHCPU Q50UDEHCPU and Q100UDEHCPU LCPU Gene...

Page 26: ...n be mounted Q5 B Generic term for Q52B and Q55B extension base unit on which the Q Series I O and intelligent function module can be mounted Q6 B Generic term for Q63B Q65B Q68B and Q612B extension base unit on which Q Series power supply module I O module intelligent function module can be mounted Q6 RB Other name for Q68RB redundant power supply extension base unit on whichredundant power suppl...

Page 27: ...pt programs I O refresh Executes partial refresh Other convenient instruction Instructions for Counter increment decrement teaching timer special function timer rotary table shortest direction control etc Application instruction Logical operation instruction Logical operations such as logical sum logical product etc Page 305 CHAPTER 7 Rotation instruction Rotation of designated data Shift instruct...

Page 28: ...Program control instruction Instructions to switch program execution conditions Other instruction Instructions that do not fit in the above categories such as watchdog timer reset instructions and timing clock instructions Instruction for Data Link Link refresh instruction Designated network refresh Page 665 CHAPTER 8 Routing information read write instruction Reads writes and registers routing in...

Page 29: ...only at the leading edge of OFF to ON real number instructions and character string instructions 32 bit instruction The letter D is added to the first line of the instruction Instructions executed only at the leading edge of OFF to ON The letter P is added to the end of the instruction Real number instructions The letter E is added to the first line of the instruction Character string instructions...

Page 30: ... the instruction If the precondition is OFF the instruction will conduct OFF processing Executed during ON instruction is executed only while the precondition is ON If the preconditions is OFF the instruction is not executed and no processing is conducted Executed once at ON instruction executed only at leading edge when precondition goes from OFF to ON Following execution instruction will not be ...

Page 31: ...ontact parallel connection ORI Logical sum NOT b contact parallel connection LDP Starts leading edge pulse operation 1 Page 126 LDF Starts trailing edge pulse operation ANDP Leading edge pulse series connection ANDF Trailing edge pulse series connection ORP Leading edge pulse parallel connection ORF Trailing edge pulse parallel connection LDPI Starts leading edge pulse NOT operation 3 2 Page 128 L...

Page 32: ...gory Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Connection ANB AND between logical blocks Series connection between logical blocks 1 Page 131 ORB OR between logical blocks Series connection between logical blocks MPS Memory storage of operation results 1 Page 132 MRD Read of operation results stored with MPS instruction MPP Rea...

Page 33: ... for Description Output OUT Device output 1 Page 139 Page 141 Page 144 Page 146 SET Sets device 1 Page 147 Page 150 RST Resets device 1 Page 148 Page 150 PLS Generates 1 cycle program pulse at leading edge of input signal 2 Page 152 PLF Generates 1 cycle program pulse at trailing edge of input signal FF Reversal of device output 2 Page 154 DELTA Pulse conversion of direct output 2 Page 155 DELTAP ...

Page 34: ...Termination FEND Termination of main program 1 Page 163 END Termination of sequence program Page 165 Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Stop STOP Terminates sequence operation after input condition has been met Sequence program is executed by placing the RUN STOP key switch back in the RUN position 1 Page 167 I...

Page 35: ...Non conductive status when S1 S2 3 Page 172 AND OR LD Conductive status when S1 S2 Non conductive status when S1 S2 3 AND OR LD Conductive status when S1 S2 Non conductive status when S1 S2 3 AND OR LD Conductive status when S1 S2 Non conductive status when S1 S2 3 AND OR LD Conductive status when S1 S2 Non conductive status when S1 S2 3 AND OR LD Conductive status when S1 S2 Non conductive status...

Page 36: ...when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 1 ANDD ORD LDD Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 1 ANDD ORD LDD Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 1 ANDD ORD LDD Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 1 ANDD ORD Component Device Number of Steps H...

Page 37: ...1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 3 ANDE ORE LDE Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 3 ANDE ORE LDE Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 3 ANDE ORE LDE Conductive status when S1 1 S1 S2 1 S2 Non Conductive status when S1 1 S1 S2 1 S2 3 ANDE ORE LDE Conductive status when S1 1 S1 S2 1 S2...

Page 38: ...hen S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 Non Conductive status when S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 3 ANDED ORED LDED Conductive status when S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 Non Conductive status when S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 3 ANDED ORED LDED Conductive status when S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 Non Conductive status when S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 3 ANDED ORED LDED...

Page 39: ... AND OR LD Compares character string S1 and character string S2 one character at a time 2 Conductive status when character string S1 character string S2 Non Conductive status when character string S1 character string S2 3 AND OR LD Compares character string S1 and character string S2 one character at a time 2 Conductive status when character string S1 character string S2 Non Conductive status when...

Page 40: ...ompares BIN 32 bit data stored in n point devices starting from the device specified by S1 with BIN 32 bit data stored in n point devices starting from the device specified by a constant and S2 and then stores the result into the nth device specified by D and up 5 Page 184 DBKCMP DBKCMP DBKCMP DBKCMP DBKCMP DBKCMP P DBKCMP P DBKCMP P DBKCMP P DBKCMP P DBKCMP P BKCMP n S1 S2 D BKCMP n S1 S2 D BKCMP...

Page 41: ... D D 1 D S 1 S D 1 D 1 Page 191 D P D S1 1 S1 S2 1 S2 D 1 D 2 Page 192 D P D D 1 D S 1 S D 1 D 1 Page 191 D P D S1 1 S1 S2 1 S2 D 1 D 2 Page 192 D P BIN 16 bit multiplication and division operations S1 S2 D 1 D 3 Page 194 P S1 S2 Quotient D Remainder D 1 4 4 P BIN 32 bit multiplication and division operations D S1 1 S1 S2 1 S2 D 3 D 2 D 1 D 4 4 Page 196 D P D S1 1 S1 S2 1 S2 Quotient D 1 D Remaind...

Page 42: ...odel QCPU and LCPU only Component Device Number of Steps High Performance model QCPU Process CPU Redundant CPU Word device Internal device except for file register ZR Bit device Devices whose device Nos are multiples of 16 whose digit designation is K8 and which use no indexing Constant No limitations 5 Note 1 Devices other than above 3 Note 2 Basic model QCPU Universal model QCPU LCPU All devices...

Page 43: ...S1 1 S1 S2 1 S2 D 1 D 4 Page 203 DB P DB D 1 D S 1 S D 1 D 3 Page 201 DB P DB S1 1 S1 S2 1 S2 D 1 D 4 Page 203 DB P BCD 4 digit multiplication and division operations B S1 S2 D 1 D 4 Page 204 B P B S1 S2 Quotient D Remainder D 1 4 B P BCD 8 digit multiplication and division operations DB S1 1 S1 S2 1 S2 D 3 D 2 D 1 D 4 Page 206 DB P DB S1 1 S1 S2 1 S2 Quotient D 1 D Remainder D 3 D 2 4 DB P B D S ...

Page 44: ...Page 212 ED P ED S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 D 3 D 2 D 1 D 4 Page 214 ED P ED D 3 D 2 D 1 D S 3 S 2 S 1 S D 3 D 2 D 1 D 3 Page 212 ED P ED S1 3 S1 2 S1 1 S1 S2 3 S2 2 S2 1 S2 D 3 D 2 D 1 D 4 Page 214 ED P Floating decimal point data multiplication and division operations Single precision E S1 1 S1 S2 1 S2 D 1 D 3 6 Page 216 E P E S1 1 S1 S2 1 S2 Quotient D 1 D 4 6 E P Floating decimal poin...

Page 45: ... bit data stored in the n point devices starting from the device specified by S2 and stores the result into the nth device specified by D and up 5 Page 222 DBK P DBK Subtracts BIN 32 bit data stored in the n point devices starting from the device specified by S2 or a constant from BIN 32 bit data stored in n point devices starting from the device specified by S1 and stores the operation result int...

Page 46: ...odel QCPU Universal model QCPU LCPU All devices that can be used 2 Note 2 Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description BCD conversions BCD 3 1 Page 231 BCDP DBCD 3 1 DBCDP BIN conversions BIN 3 1 Page 233 BINP DBIN 3 1 DBINP BIN Floating point conversions Single precision FLT 3 1 2 Page 235 FLTP DFLT 3 1 2 DFLTP BIN Floa...

Page 47: ...GRYP DGRY 3 DGRYP Gray code BIN conversions GBIN 3 Page 245 GBINP DGBIN 3 DGBINP INT S D S 1 S D Real number 32768 to 32767 Conversion to BIN INTP S D DINT S D S 1 S D 1 D Real number 2147483648 to 2147483647 Conversion to BIN DINTP S D INTD S D S 3 S 2 S 1 S Conversion to BIN D Real number 32768 to 32767 INTDP S D DINTD S D S 3 S 2 S 1 S Conversion to BIN D 1 D Real number 2147483648 to 214748364...

Page 48: ...es the result from D onward 4 Page 251 BKBINP Floating point Single precision Double precision ECON 3 Page 253 ECONP Floating point Double precision Single precision EDCON 3 Page 254 EDCONP NEG D D D BIN data NEGP D DNEG D D 1 D D 1 D BIN data DNEGP D ENEG D Real number data D 1 D D 1 D ENEGP D EDNEG D D 3 D 2 D 1 D D 3 D 2 D 1 D Real number data EDNEGP D BKBCD n S D BKBCDP n S D BKBIN n S D BKBIN...

Page 49: ...esignated by D onward 3 Page 259 MOVP 16 bit data negation transfer CML 1 Page 261 CMLP 32 bit data negation transfer DCML 2 DCMLP Block transfer BMOV 4 Page 263 BMOVP Identical 16 bit data block transfers FMOV 4 Page 266 FMOVP Identical 32 bit data block transfers DFMOV 4 DFMOVP 16 bit data exchange XCH 3 Page 268 XCHP 32 bit data exchange DXCH 3 DXCHP MOV S D S D MOVP S D DMOV S D S 1 S D 1 D DM...

Page 50: ...K4 and which use no indexing Constant No limitations 2 Devices other than above 3 Note 1 Component Device Number of Steps High Performance model QCPU Process CPU Redundant CPU Word device Internal device except for file register ZR Bit device Devices whose device Nos are multiples of 16 whose digit designation is K8 and which use no indexing Constant No limitations 3 Devices other than above 3 Not...

Page 51: ...s met 1 Page 277 Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Disable interrupts DI Prohibits the running of an interrupt program 1 Page 278 Enable interrupts EI Resets interrupt program execution prohibition 1 Interrupt disable enable setting IMASK Inhibits or permits interrupts for each interrupt program 2 Return IRET ...

Page 52: ... shortest direction 5 Page 294 Ramp signal RAMP Changes device data designated by D1 from n1 to n2 in n3 scans 6 Page 296 Pulse density SPD Counts the pulse input from the device designated by S for the duration of time designated by n and stores the count in the device designated by D 4 Page 298 Pulse output PLSY 4 Page 300 Pulse width modulation PWM 4 Page 301 Matrix input MTR Reads data of 16 p...

Page 53: ...RP WOR 4 1 Page 314 WORP DOR 2 Page 312 DORP DOR 3 Page 314 DORP BKOR 5 Page 316 BKORP Exclusive OR WXOR 3 Page 318 WXORP WXOR 4 1 Page 320 WXORP DXOR 2 Page 318 DXORP WAND S D D S D WANDP S D WAND S1 S2 D S1 S2 D WANDP S1 S2 D DAND S D D 1 D S 1 S D 1 D DANDP S D DAND S1 S2 D S1 1 S1 S2 1 S2 D 1 D DANDP S1 S2 D BKAND n S1 S2 D S1 S2 D n BKANDP n S1 S2 D WOR S D D S D WORP S D WOR S1 S2 D S1 S2 D ...

Page 54: ...e logical sum WXNR 3 Page 324 WXNRP WXNR 4 1 Page 326 WXNRP DXNR 2 Page 324 DXNRP DXNR 3 Page 326 DXNRP BKXNR 5 Page 328 BKXNRP Component Device Number of Steps High Performance model QCPU Process CPU Redundant CPU Word device Internal device except for file register ZR Bit device Devices whose device Nos are multiples of 16 whose digit designation is K8 and which use no indexing Constant No limit...

Page 55: ...no indexing Constant No limitations 6 Note 1 Devices other than above 4 Note 2 Basic model QCPU All devices that can be used 4 Note 2 Universal model QCPU 3 Note 2 LCPU Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Right rotation ROR 3 Page 330 RORP RCR 3 RCRP Left rotation ROL 3 Page 333 ROLP RCL 3 RCLP Right rotation DR...

Page 56: ...for Description n bit shift of 16 bit data SFR 3 Page 339 SFRP SFL 3 SFLP 1 bit shift of n bit data BSFR 3 Page 341 BSFRP BSFL 3 BSFLP DROL n D b0 b31 SM700 b16 to b15 to D 1 D Left rotation by n bits Carry flag DROLP n D DRCL n D D 1 D b0 b31 SM700 b16 to b15 to Left rotation by n bits Carry flag DRCLP n D SFR n D b0 bn b15 0 to 0 b0 SM700 b15 Carry flag SFRP n D SFL n D b15 bn b0 0 to 0 b15 SM70...

Page 57: ... 4 Page 343 SFTBRP SFTBL 4 SFTBLP 1 word shift of n words data DSFR 3 Page 345 DSFRP DSFL 3 DSFLP n words shift of n words data SFTWR 4 Page 346 SFTWRP SFTWL 4 SFTWLP SFTBR D n1 n2 SFTBR D n1 n2 D n1 n2 SM700 0 0 Carry flag SFTRP D n1 n2 SFTBL D n1 n2 D SM700 0 0 n1 n2 Carry flag SFTBLP D n1 n2 DSFR n D D n 0 DSFRP n D DSFL n D D n 0 DSFLP n D SFTWR D n1 n2 D n1 n2 0 0 SFTWRP D n1 n2 SFTWL D n1 n2...

Page 58: ...tion Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Data searches SER 5 Page 354 SERP DSER 5 DSERP BSET n D b0 bn b15 D 1 BSETP n D BRST n D b0 bn b15 D 0 BRSTP n D TEST S1 S2 D D b0 b15 S1 to Bit designated by S2 TESTP S1 S2 D DTEST S1 S2 D D b0 b31 S1 to Bit designated by S2 DTESTP S1 S2 D BKRST n D OFF OFF OFF OFF D Reset n ON OFF ON ON D B...

Page 59: ... to the devices starting from the one specified by D 4 Page 365 NDISP NUNI Links the data in the devices starting from the one specified by S1 with bits specified by the devices from S2 and stores them to the devices starting from the one specified by D NUNIP WTOB Breaks n points of 16 bit data from the device designated by S into 8 bit units and stores in sequence at the device designated by D 4 ...

Page 60: ...ts n x n 1 2 scans required Total value calculations WSUM Adds 16 bit BIN data of n points from the device specified by S and stores it in the device specified by D 4 Page 378 WSUMP DWSUM Adds 32 bit BIN data of n points from the device specified by S and stores it in the device specified by D Page 379 DWSUMP Calculation of averages MEAN Calculates the mean of n point devices in 16 bit units start...

Page 61: ...XT 1 BREAK Forcibly ends the execution of the to cycle and jumps pointer Pn 3 Page 385 BREAKP Subroutine program calls CALL Executes subroutine program Pn when input condition is met S1 to Sn are arguments sent to subroutine program n 5 1 2 n 3 Page 386 CALLP RET Returns from subroutine program 1 Page 390 FCALL Performs non execution processing of subroutine program Pn if input conditions have not...

Page 62: ...sing of subroutine program Pn if input conditions have not been met S1 to Sn are arguments sent to subroutine program N 5 1 2 n Page 404 Select refresh COM Performs auto refresh of intelligent function modules link refresh auto refresh of CPU shared memory and communications with peripherals 1 Page 407 CCOM Performs auto refresh of intelligent function modules auto refresh of CPU shared memory and...

Page 63: ...t See for Description Data table processing FIFW 3 Page 418 FIFWP FIFR 3 Page 419 FIFRP FPOP 3 Page 421 FPOPP FDEL 4 Page 423 FDELP FINS 4 FINSP FIFW S D S Pointer D Pointer 1 Device at pointer 1 FIFWP S D FIFR S D S Pointer D Pointer 1 FIFRP S D FPOP S D S Pointer D Pointer 1 Device at pointer 1 FPOPP S D FDEL n S D S Pointer D Pointer 1 Designated by n FDELP n S D FINS n S D S Pointer D Designat...

Page 64: ...ligent function module 5 DTOP Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description ASCII print PR Outputs ASCII code of 8 points 16 characters from device designated by S to output module 3 Page 432 PR Outputs ASCII code from device designated by S to 00H to output module PRC Converts comments from device designated by S to ASCI...

Page 65: ...nstruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description BIN Decimal ASCII BINDA Converts 1 word BIN value designated by S to a 5 digit decimal ASCII value and stores it at the word device designated by D 3 Page 447 BINDAP DBINDA Converts 2 word BIN value designated by S to a 10 digit decimal ASCII value and stores it at word devices followin...

Page 66: ...lue designated by S to a 1 word BIN value and stores it at a word device number designated by D 3 Page 457 HABINP DHABIN Converts an 8 digit hexadecimal ASCII designated by S value to a 2 word BIN value and stores it at a word device number designated by D 3 DHABINP Decimal ASCII BCD DABCD Converts a 4 digit decimal ASCII value designated by S to a 1 word BCD value and stores it at a word device n...

Page 67: ...cter string including decimal point designated by S to a 2 word BIN value and the number of decimal fraction digits and stores them into devices designated by D1 and D2 4 DVALP Floating decimal point Character string ESTR Converts the 32 bit floating decimal point data designated by S to a character string and stores it in devices designated by D 4 Page 472 ESTRP Character string Floating decimal ...

Page 68: ...ition from the initial character string data specified by D 4 Page 492 STRINSP STRDEL Deletes the n2 characters data specified by D starting from the device insert position specified by n1 4 Page 494 STRDELP Floating decimal point BCD EMOD Converts 32 bit floating decimal point data S1 to BCD data with number of decimal fraction digits designated by S2 and stores at device designated by D 4 Page 4...

Page 69: ...recision SIND 3 Page 501 SINDP COSD 3 Page 504 COSDP TAND 3 Page 508 TANDP ASIND 3 Page 511 ASINDP ACOSD 3 Page 514 ACOSDP ATAND 3 Page 518 ATANDP SIN S D Sin S 1 S D 1 D SINP S D COS S D Cos S 1 S D 1 D COSP S D TAN S D Tan S 1 S D 1 D TANP S D ASIN S D Sin 1 S 1 S D 1 D ASINP S D ACOS S D Cos 1 S 1 S D 1 D ACOSP S D ATAN S D Tan 1 S 1 S D 1 D ATANP S D SIND S D Sin S 3 S 2 S 1 S D 3 D 2 D 1 D SI...

Page 70: ...S 1 S D 1 D Conversion from angles to radians RADP S D RADD S D S 3 S 2 S 1 S D 3 D 2 D 1 D Conversion from angle to radian RADDP S D DEG S D S 1 S Conversion from radians to angles D 1 D DEGP S D DEGD S D S 3 S 2 S 1 S D 3 D 2 D 1 D Conversion from radian to angle DEGDP S D SQR S D D 1 D S 1 S SQRP S D SQRD S D D 3 D 2 D 1 D S 3 S 2 S 1 S SQRDP S D EXP S D e S 1 S D 1 D EXPP S D EXPD S D e S 3 S ...

Page 71: ...ctions BSIN 3 Page 542 BSINP BCOS 3 Page 544 BCOSP BTAN 3 Page 546 BTANP BASIN 3 Page 547 BASINP BACOS 3 Page 549 BACOSP BATAN 3 Page 551 BATANP RND D RNDP D SRND D SRNDP D BSQR S D D 0 S 1 Integer part Decimal fraction part BSQRP S D BDSQR S D D 0 S 1 S 1 Integer part Decimal fraction part BDSQRP S D BSIN S D Sin S D 0 1 Integer part Decimal fraction part 2 Sign BSINP S D BCOS S D Cos S D 0 1 Sig...

Page 72: ...alue of S2 1 S2 at D 1 D 5 DLIMITP Dead band controls BAND When S1 S3 S2 0 D When S3 S1 S3 S1 D When S2 S3 S3 S2 D 5 Page 555 BANDP DBAND When S1 1 S1 S3 1 S3 S2 1 S2 0 D 1 D When S3 1 S3 S1 1 S1 S3 1 S3 S1 1 S1 D 1 D When S2 1 S2 S3 1 S3 S3 1 S3 S2 1 S2 D 1 D 5 DBANDP Zone controls ZONE When S3 0 0 D When S3 0 S3 S2 D When S3 0 S3 S1 D 5 Page 558 ZONEP DZONE When S3 1 S3 0 0 D 1 D When S3 1 S3 0 ...

Page 73: ...the device specified by D The scaling conversion is executed based on the scaling conversion data stored in the device specified by S2 and up 4 DSCLP X or Y coordinate data SCL2 Executes scaling for the scaling conversion data 16 bit data units specified by S2 with the input value specified by S1 and then stores the result into the device specified by D The scaling conversion is executed based on ...

Page 74: ...TP Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Read write clock data DATERD 2 Page 572 DATERDP DATEWR 2 Page 573 DATEWRP Clock data addition subtraction DATE 4 Page 575 DATE P DATE 4 Page 577 DATE P RSET S RSETP S QDRSET File name QDRSETP File name QCDSET File name QCDSETP File name DATERD D Clock elements D 0 Year Mont...

Page 75: ...ec Upper 16 bits HOURP S D DT S1 S2 n 2 S1 S1 S1 1 Year Year Day Month 2 S2 S2 S2 1 Day Month Comparison operation result S1 S2 DT n S1 S2 DT n DT S1 S2 n 2 S1 S1 S1 1 2 S2 S2 S2 1 Year Year Day Month Day Month Comparison operation result DT S1 S2 n S1 S2 n DT S1 S2 n DT 2 S1 S1 S1 1 2 S2 S2 S2 1 Year Year Day Month Day Month Comparison operation result S1 S2 DT n S1 S2 n DT DT S1 S2 n 2 S1 S1 S1 ...

Page 76: ...S1 1 2 S2 S2 S2 1 Comparison operation result Hour Hour Second Minute Second Minute TM S1 S2 n S1 S2 n TM TM S1 S2 n 2 S1 S1 S1 1 2 S2 S2 S2 1 Comparison operation result Hour Hour Second Minute Second Minute TM S1 S2 n TM S1 S2 n TM S1 S2 n 2 S1 S1 S1 1 2 S2 S2 S2 1 Comparison operation result Hour Hour Second Minute Second Minute TM S1 S2 n S1 S2 n TM S1 S2 n TM 2 S1 S1 S1 1 2 S2 S2 S2 1 Compari...

Page 77: ...RD 6 Page 589 SP DATERD Adding or subtracting datavalues of the expansion clock S DATE 8 Page 591 SP DATE S DATE 8 Page 594 SP DATE S DATERD D Clock elements D 0 Year Month Day Hour Sec Day of the week 1 2 3 4 5 6 1 1000 sec 7 Minute SP DATERD D S DATE S1 S2 D S1 Hour Sec S2 D 1 1000 sec Hour Sec 1 1000 sec Hour Sec 1 1000 sec Minute Minute Minute SP DATE S1 S2 D S DATE S1 S2 D S1 Hour Minute Sec ...

Page 78: ...n type 1 2 n Page 601 PLOWP LDPCHK In conduction when program of specified file name is being executed In non conduction when program of specified file name is not executed 1 2 n Page 603 ANDPCHK ORPCHK Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description WDT reset WDT Resets watchdog timer during sequence program 1 Page 605 WDT...

Page 79: ...e designated by D 4 Page 618 UNIRDP Module model name read TYPERD Reads the module model name of the head I O No designated by n and stores it in the area starting from the device designated by D 3 Page 622 TYPERDP Trace set TRACE Stores the trace data set with peripheral device by the number of times set when SM800 SM801 and SM802 turn on to the sampling trace file 1 Page 626 Trace reset TRACER R...

Page 80: ...stored in standard memory drive 0 3 Page 654 Load Unload PSWAPP Deletes standby program stored in standard memory drive 0 designated by S1 Then transfers the program stored in a memory card or standard memory other than drive 0 designated by S2 to drive 0 and places it in standby status 4 Page 656 High speed block transfer of file register RBMOV Transfers n points of 16 bit data from the device de...

Page 81: ...ruction Network refresh S ZCOM Refreshes the designated network 5 Page 665 SP ZCOM S ZCOM SP ZCOM Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Reading routing information S RTREAD Reads data set at routing parameters 7 Page 669 SP RTREAD Registering routing information S RTWRITE Writes routing information to the area des...

Page 82: ...PU shared memory 5 Page 676 TOP DTO Writes device data of the host station to the host CPU shared memory in 32 bit units 5 DTOP Category Instruction Symbol Symbol Processing Details Execution Condition Number of Basic Steps Subset See for Description Read from other CPU shared memory FROM Reads device data from the other CPU shared memories and stores the data in the host station 5 Page 681 FROMP ...

Page 83: ...st CPU or later is stored by the number of write points specified by 1 into a device specified by another CPU n or later 10 Page 696 DP DDWR 10 Reading Devices from Another CPU D DDRD In multiple CPU system data stored in a device specified by another CPU n or lrater is stored by the number of read points specified by 1 into a device specified by host CPU or late 10 Page 699 DP DDRD 10 Category In...

Page 84: ...designated device until the operation is executed By changing the data stored in a designated device during program execution the data to be used in the instruction can be changed 2 Destination D a The destination stores the data after the operation has been conducted However some instructions require storing the data to be used in an operation at the destination prior to the operation execution A...

Page 85: ...However there can be no bit designation for timers T retentive timers ST counters C or index register Z Example Z0 0 is not available Word data Data that can be handled by CPU module Bit data Numeric data Character string data Integer data Real number floating point data Single precision floating point data Double precision floating point data Double word data Page 84 Section 3 2 2 Page 83 Section...

Page 86: ...s designated for digit designation the following points would be designated K1X0 The 4 points X0 to X3 are designated K2X0 The 8 points X0 to X7 are designated K3X0 The 12 points X0 to XB are designated K4X0 The 16 points X0 to XF are designated Fig 3 1 Digit Designation Setting Range for 16 Bit Instruction b In cases where digit designation has been made at the source S the numeric values shown i...

Page 87: ...sic instructions and application instructions The two types of double word data that can be dealt with by CPU module are as follows Decimal constants K 2147483648 to K2147483647 Hexadecimal constants H00000000 to HFFFFFFFF Word devices and bit devices designated by digit designation can be used as double word data For direct access input DX and direct access output DY designation of double word da...

Page 88: ...ated K2X0 The 8 points X0 to X7 are designated K6X0 The 24 points X0 to X17 are designated K3X0 The 12 points X0 to XB are designated K7X0 The 28 points X0 to X1B are designated K4X0 The 16 points X0 to XF are designated K8X0 The 32 points X0 to X1F are designated Number of Digits Designated With 32 Bit Instructions Number of Digits Designated With 32 Bit Instructions K1 4 points 0 to 15 K5 20 poi...

Page 89: ...ices used by the lower 16 bits of data A 32 bit instruction uses designation device number and designation device number 1 Ladder Example Processing When source S data is a numerical value When source S data is a word device 1 0 0 1 0 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 M19 M16 Not changed 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 1 0 0 0 0 0 1 1 1 0 0 1 1 1 0 0 3 4 5 6 7 8 1 2 H78123456 K5M0 M15 M8M7 M0 M31 M20 ...

Page 90: ...Negative Exponent part The n of 2n is represented from b23 to b30 Depending on the BIN value of b23 to b30 the value of n is as follows Variable part The 23 bits from b0 to b22 represents the XXXXXX at binary 1 XXXXXX 2 Double precision floating point data Instructions which deal with double precision floating point datadesignate devices which are used for the lower 16 bits of data Double precisio...

Page 91: ...med with 0 When 0 is specified the following CPU module internally converts the value to 0 to perform a floating point operation Therefore an operation error does not occur The High Performance model QCPU with the internal processing set to double precision 2 Double precision is set by default for the floating point operation processing When 0 is specified the following CPU module performs a float...

Page 92: ... NULL code is stored as the last one word 3 When number of characters is odd Uses number of characters 2 words rounds up decimal fractions and stores the character string and NULL code For example if ABCDE is transferred to devices starting from D0 the character string ABCDE and the NULL code are stored from D0 to D2 The NULL code is stored into the upper 8 bits of the last one word Designation of...

Page 93: ...e used With the exception of the restrictions noted below Indexing can be used with devices used with contacts coils basic instructions and application instructions 1 Devices to which indexing can not be used 1 SFC transfer devices and SFC block devices are devices for SFC use Refer to the manual below for how to use these devices MELSEC Q L QnA Programming Manual SFC 2 Devices with limits for use...

Page 94: ... indexing with the ZZ specification is only available for the following CPU modules See the programming tool operating manual for the available programming tools The first five digits of the serial No for QnU D H CPU is 10042 or higher excluding Q00UJCPU QnUDE H CPU LCPU Ladder Example Actual Process Device SM400 Present value of timer X0 Value set for timer T0 K100 T0Z4 K4Y30 BCD SM400 Present va...

Page 95: ...T EXE PRG occurs Error code 2500 3 Device that indexing can be used Indexing can be used only for the device shown below 4 Usable range of index registers The following table shows the usable range of index registers for indexing with 32 bit index registers For indexing with 32 bit index registers the specified index register Zn and the next index register of the specified register Zn 1 are used B...

Page 96: ...lect Use of ZZ in Indexing Setting for ZR Device in PC parameter Fig 3 10 Setting window for indexing setting parameter for ZR device 3 Device that indexing can be used The following device is available for indexing Ladder Example Actual Process Device Device Meaning ZR Serial number access format file register D Extended data register D W Extended link register W X0 DMOV K100000 Z0 MOV ZR1000Z0 D...

Page 97: ...fication set the value of Zn Z0 Z19 ZZn alone cannot be input to each function ZZ specification 1 Index Registers Used ZZ specification 1 Index Registers Used ZZ0 Z0 Z1 ZZ10 Z10 Z11 ZZ1 Z1 Z2 ZZ11 Z11 Z12 ZZ2 Z2 Z3 ZZ12 Z12 Z13 ZZ3 Z3 Z4 ZZ13 Z13 Z14 ZZ4 Z4 Z5 ZZ14 Z14 Z15 ZZ5 Z5 Z6 ZZ15 Z15 Z16 ZZ6 Z6 Z7 ZZ16 Z16 Z17 ZZ7 Z7 Z8 ZZ17 Z17 Z18 ZZ8 Z8 Z9 ZZ18 Z18 Z19 ZZ9 Z9 Z10 ZZ19 Not available 1 Re...

Page 98: ...r crosses over the boundary between the internal user device and the extended data register D or extended link register W cannot be made If doing so an error occurs when the device range check is enabled at index modification error code 4101 MOV K1234 MOV K1234 User Program Z0 0 Z0 1000 Z1 0 Z1 2000 Index modification in internal user device D100 D20000 D1100 D22000 Index modification in extended ...

Page 99: ...rs and buffer memory number can be performed indexing with intelligent function module devices 1 MOV K1234 User Program Z0 0 Z0 10000 Index modification where the device number crosses over the boundary among the file register ZR extended data register D will not cause an error ZR100 D14196 File register files File register 8k MOV K1234 Z20000Z1 Z1 0 Z1 4000 D20000 W2DC0 Extended data register D 8...

Page 100: ... be performed by the following two methods Specifing the index registers range used for indexing with 32 bit Specifing the 32 bit indexing using ZZ specification 32 bit indexing with the ZZ specification is only available for the following CPU modules See the programming tool operating manual for the available programming tools The first five digits of the serial No for QnU D H CPU is 10042 or hig...

Page 101: ... index modification is written to the device for system use exceeding the user specified device range an error occurs Error code 1103 Take extra precaution when using indexing in programming 2 Universal model QCPU and LCPU The device range is checked for indexing With changing the settings of the PLC parameter the device range is not checked d Changing indexing with 16 bit index register for index...

Page 102: ...xplanation Program Fundamentals 2 Indicates when index modification by an index register is performed 3 Indirect specification is possible but the address can not be written with the ADRSET instruction Device Type Availability of Indirect Specification Example of Indirect Specification Internal user device Bit device 1 N A Word device 1 Available D100 D100Z2 2 Link direct device Bit device 1 N A W...

Page 103: ...er W Note that when indirect specification is performed to the extended data register D and data register D in internal device or to the extended link register W and link register W in internal device the areas of the internal user device and extended data register D or extended link register W are not treated as a sequence DINCP D0 32 bit instruction Device used for indirect specification DDECP D...

Page 104: ... model QCPU and LCPU 4 Applies only to Universal model QCPU excluding Q00UJCPU and LCPU Device Condition Bit device Designates a bit device number in a factor of 16 Only K4 can be designated for digit designation Does not perform indexing Word device Internal user device File register R ZR 4 Multiple CPU shared device 1 2 Index register Z Standard device register Z 3 Constants No limitations Devic...

Page 105: ...gisters Types of Instructions Instruction Symbols Contact instructions LD LDI AND ANI OR ORI LDP LDF ANDP ANDF ORP ORF LDPI ANDPI ANDFI ORPI ORFI Output instructions OUT SET RST Comparison operation instruction D D D D D D Arithmetic operation INC DEC D D D D DINC DDEC B B B B E E E E Data conversion instructions BCD BIN DBCD DBIN FLT DFLT INT DINT Data transfer instruction MOV DMOV CML DCML XCH D...

Page 106: ...found the following occurs 1 For the High Performance model QCPU Process CPU and Redundant CPU An error does not occur even when writing reading to from file register is performed However 0H is stored when reading from file register is performed 2 For the Universal model QCPU and LCPU The OPERATION ERROR error code 4101 occurs when writing reading to from file register is performed 1 Device range ...

Page 107: ...ducted when indexing is performed However if indexing has been conducted there will be no error returned if the initial device number exceeds the relevant device range 2 Universal model QCPU and LCPU The device range is checked When the device number is outside the device range an operation error occurs For example when12 k points are assigned to a data register an error occurs if the device numbe...

Page 108: ...range no error occurs and the other devices are accessed When performing the following access in Universal model QCPU or LCPU an error error code 4101 occurs 1 Access crossing the boundary of devices caused by indexing range of A area The allocation order of individual devices is shown below 2 Access crossing the boundary of file registers caused by indexing 3 Access to file registers R ZR without...

Page 109: ...egister W for the Universal model QCPU except the Q00UJCPU and LCPU With the following specification methods data cannot be specified crossing over the boundary of the internal user device and extended data register D or extended link register W Doing so causes OPERATION ERROR error code 4101 Index modification Indirect specification Specification with the instructions that handle data blocks 1 1 ...

Page 110: ...re returned with the single precision floating point operation instruction When the absolute value of the floating decimal point data is 1 0 2 127 or lower When absolute value of floating decimal point data is 1 0 2128 or higher 2 An operation error occurs when the following operation results are returned with the double precision floating point operation instruction When the absolute value of the...

Page 111: ...ition when it goes from OFF to ON Example PLS instruction MOVP instruction Executed at trailing edge Instructions executed only at the trailing edge of the input condition when it goes from ON to OFF Example PLF instruction For coil or equivalent basic instructions or application instructions where the same instruction can be designated for either execution at ON or leading edge execution a P is a...

Page 112: ... High Performance model QCPU Process CPU and Redundant CPU c Devices with additional steps Universal model QCPU except Q00UJCPU and LCPU 1 Instructions applicable to subset processing The following table shows steps depending on the devices Devices with Additional Steps Added Steps Example Intelligent function module device 1 MOV U4 G10 D0 Multiple CPU shared device MOV U3E1 G0 D0 Link direct devi...

Page 113: ...r D Extended link register W 1 Multiple CPU shared device 3 LDD LDD LDD LDD LDD LDD ANDD ANDD ANDD ANDD ANDD AND ORD ORD ORD ORD ORD ORD Standard device register 2 1 3 Serial number access format file register Extended data register D Extended link register W 1 Multiple CPU shared device 3 Decimal constant hexadecimal constant real constant P P WAND WOR WXOR WXNR WANDP WORP WXORP WXNRP 2 devices S...

Page 114: ... 2 Serial number access format file register Extended data register D Extended link register W 3 Multiple CPU shared device 3 MOV MOVP Serial number access format file register Extended data register D Extended link register W 1 2 Multiple CPU shared device 3 DMOV DMOVP EMOV EMOVP Serial number access format file register Extended data register D Extended link register W 1 2 Multiple CPU shared de...

Page 115: ...NDP WORP WXORP WXNRP DANDP DORP DXORP DXNRP 2 devices and 2 1 3 P P D D D P D P WAND WOR WXOR WXNR DAND DOR DXOR DXNR WANDP WORP WXORP WXNRP DANDP DORP DXORP DXNRP 3 devices 1 and 2 1 3 or and 1 2 and only when that device that the number of steps does not increase is specified for 0 3 and only when a serial number access format file register is specified for 2 5 P P and 2 1 3 or and 1 2 D D P D D...

Page 116: ...vice 1 MOV U4 G10 D0 Multiple CPU shared device MOV U3E1 G10000 D0 Link direct device MOV J3 B20 D0 Index register standard device register MOV Z0 D0 Serial number access format file register MOV ZR123 D0 Extended data register D MOV D123 Extended link register W MOV W123 32 bit constant DMOV K123 D0 Real constant EMOV E0 1 D0 Character string constant For even number number of characters 2 For od...

Page 117: ...lay M0 with inputs X0 and X1 ON and OFF Ladder Timing Chart With the refresh type CPU module when the output Y is specified by the OUT instruction the ON OFF status of the last OUT instruction of the scan will be output 2 SET RST instructions using the same device a The SET instruction turns ON the specified device when the execution command is ON and performs nothing when the execution command is...

Page 118: ...truction turns ON the specified device when the execution command is turned ON from OFF It turns OFF the device at any other time OFF to OFF ON to ON or ON to OFF If two or more PLS instructions using the same device are executed in one scan each instruction turns ON the device when the corresponding execution command is turned ON from OFF and turns OFF the device in other cases For this reason if...

Page 119: ...device are executed in one scan each instruction turns ON the device when the corresponding execution command is turned OFF from ON and turns OFF the device in other cases For this reason if multiple PLF instructions using the same device are executed in a single scan a device that has been turned ON by the PLF instruction may not be turn ON during one scan M0 OFF ON END END END X0 X1 M0 OFF OFF O...

Page 120: ... M0 OFF ON END END END X0 X1 M0 OFF OFF ON PLF X0 X1 M0 PLF M0 PLF M0 PLF X0 X1 ON M0 turns ON because X0 goes OFF ON OFF M0 turns OFF because X1 status is other than ON OFF M0 turns OFF because X1 status is other than ON OFF M0 remains OFF M0 turns OFF because X0 status is other than ON OFF M0 remains OFF M0 OFF ON END END END X0 X1 M0 OFF OFF PLF X0 X1 M0 PLF M0 PLF M0 PLF X0 X1 ON ON M0 turns O...

Page 121: ...ter the file registers to the standard RAM memory card to secure the file register area b Basic Model QCPU except Q00JCPU The file register area has been secured in the standard RAM beforehand The user need not secure the file register area c LCPU To use the file register secure a file register area by registering the file register in standard RAM The following table indicates the memories that ca...

Page 122: ...file registers a Settings The settings of refresh devices are as follows Refresh settings for CC Link IE Controller Network Cannot be set on LCPU Refresh settings for CC Link IE Field Network Cannot be set on Basic model QCPU High Performance model QCPU Process CPU Redundant CPU Universal model QCPU whose serial number first five digits is 12011 or earlier and LCPU whose serial number first five d...

Page 123: ...file register of the setting file at the time of the END instruction execution If the drive number is changed by the QDRSET instruction when ZR is specified for the device in the CPU modules other than the Universal model QCPU an error LINK PARA ERROR 3101 occurs Note that an error does not occur when R is specified for the device 3 When a block number is switched by the RSET instruction refresh i...

Page 124: ... High Performance model QCPU Process CPU Redundant CPU Universal model QCPU LCPU A normal icon means the corresponding instruction can be used The icon with Ver means the instruction can be used with some restrictions e g function version software version The icon with cross means the corresponding instruction cannot be used 1 2 3 4 5 6 7 8 9 Basic High performance Process Redundant Universal LCPU...

Page 125: ...stant and the Other columns 7 Indicates the function of the instruction 8 Indicates conditions under which error is returned and error number See Page 104 Section 3 6 for errors not included here 9 Indicates both ladder and list for simple program example Also indicates the types of individual devices used when the program is executed Execution Condition Non conditional Execution Executed while ON...

Page 126: ...ration result 1 When a bit designation is made for a word device the device turns ON or OFF depending on the 1 0 status of the designated bit 5 1 1 LD LDI Operation start AND ANI Series connection OR ORI Parallel connection 5 1 1 LD LDI AND ANI OR ORI Setting Data Internal Devices R ZR J U G Zn Constants Other DX BL Bit Word Bit Word Basic Process High performance Redundant Universal LCPU X1 D0 1 ...

Page 127: ... connection instruction and ORI is the B contact single parallel connection instruction They read ON OFF information from the designated device 3 and perform an OR operation with the operation results to that point and use the resulting value as the operation result 3 When a bit designation is made for a word device the device turns ON or OFF depending on the 1 0 status of the designated bit 2 The...

Page 128: ...ulse series connection ORP ORF Pulse parallel connection 5 1 2 LDP LDF ANDP ANDF ORP ORF Setting Data Internal Devices R ZR J U G Zn Constants Other DX Bit Word Bit Word b0 D6 b4 b15 b1 1 0 1 0 ORB ANB Step Instruction Device Bit designated for word device Step Instruction Device Basic Process High performance Redundant Universal LCPU X1 D0 1 X1 D0 1 Bit device number Word device bit designation X...

Page 129: ...on instruction and ANDF is a trailing edge pulse series connection instruction They perform an AND operation with the operation result to that point and take the resulting value as the operation result The ON OFF data used by ANDP and ANDF are indicated in the table below ORP ORF 2 ORP is a leading edge pulse parallel connection instruction and ORF is a trailing edge pulse serial connection instru...

Page 130: ...D0 A Devices used as contacts bits 5 1 3 LDPI LDFI Pulse NOT operation start ANDPI ANDFI Pulse NOT series connection ORPI ORFI Pulse NOT parallel connection 5 1 3 LDPI LDFI ANDPI ANDFI ORPI ORFI QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants Other DX Bit Word Bit Word 1 Step Instruction Device Basic High performan...

Page 131: ... AND operation with the previous operation result and take the resulting value as the operation result The on or off data used by ANDPI and ANDFI are indicated in the table below ORPI ORFI 1 ORPI is a leading edge pulse NOT parallel connection and ORFI is a trailing pulse NOT parallel connection ORPI and ORFI execute an OR operation with the previous operation result and take the resulting value a...

Page 132: ...to D0 when X0 is on off or turns from on to off or M0 is on off or turns from off to on Ladder Mode List Mode 2 The following program stores 0 into D0 when X0 is on and b10 bit 11 of D0 is on off or turns from on to off Ladder Mode List Mode Step Instruction Device Step Instruction Device ...

Page 133: ...dder blocks with two or more contacts For ladder blocks with only one contact use OR or ORI there is no need for ORB in such cases 3 The ORB symbol is not the contact symbol but rather is the connection symbol 4 When programming in the list mode it is possible to use up to 15 ORB instructions successively 16 blocks 5 2 1 ANB Ladder block series connection ORB Ladder block parallel connection 5 2 1...

Page 134: ...stored for the MPS instruction and uses that result to perform the operation in the next step MPP 1 Reads the operation result stored for the MPS instruction and uses that result to perform the operation in the next step 2 Clears the operation results stored by the MPS instruction 3 Subtracts 1 from the number of MPS instruction times of use 5 2 2 MPS Operation results push MRD Operation results r...

Page 135: ...correctly display the ladder in the ladder mode of the peripheral device Operation Error 1 There is no operation error in the MPS MRD or MPP instruction Program Example 1 A program using the MPS MRD and MPP instructions Ladder Mode List Mode Ladder Using the MPS MRD and MPP Instructions Ladder not Using MPS MRD and MPP Instructions Y10 X0 X1 X2 X3 X4 Y11 X5 Y12 Y10 X0 X1 X2 X4 Y11 Y12 X0 X1 X3 X0 ...

Page 136: ...134 MPS MRD MPP 2 A program using the MPS and MPP instructions successively Ladder Mode List Mode Step Instruction Device ...

Page 137: ...e LD and OR positions 2 When a ladder block is used the operation result is inverted within the range of the ladder block To operate a ladder using the INV instruction in combination with the ANB instruction pay attention to the range that will be inverted For details of the ANB instruction refer to Page 131 Section 5 2 1 5 2 3 INV Operation results inversion 5 2 3 INV Setting Data Internal Device...

Page 138: ...pulse conversion to the operation results of X0 and X1 Ladder Mode List Mode 1 The MEP and MEF instructions will occasionally not function properly when pulse conversion is conducted for a contact that has been indexed by a subroutine program or by the FOR to NEXT instructions If pulse conversion is to be conducted for a contact that has been indexed by a subroutine program or by the FOR to NEXT i...

Page 139: ...ND instruction EGF 1 Operation results up to the EGF instruction are stored in memory by the edge relay V 2 Goes ON at the trailing edge from ON to OFF of the operation result up to the EGF instruction If the operation result up to the EGF instruction is other than a trailing edge i e from OFF to ON ON to ON or OFF to OFF it goes OFF non continuity status 3 The EGF instruction is used for subrouti...

Page 140: ...struction Therefore use them at the same position as that of the AND instruction Refer to Page 124 Section 5 1 1 The EGP and EGF instruction cannot be used at the position of the LD or OR instruction 2 EGP and EGF instructions cannot be used at the ladder block positions shown below Step Instruction Device END processing X0 ON OFF X1 ON OFF 1 2 1 2 1 2 V0 ON OFF V1 OFF ON D0 1 D1 1 1 2 1 2 2 OFF O...

Page 141: ...ere is no operation error in the OUT instruction Program Example 1 When using bit devices Ladder Mode List Mode 5 3 1 OUT Out excluding timers counters and annunciators 5 3 1 OUT Setting Data Internal Devices R ZR J U G Zn Constants Other DY Bit Word Bit Word Other than T C or F Operation Results Coil OFF OFF ON ON Operation Results Bit Designated OFF 0 ON 1 Basic Process High performance Redundan...

Page 142: ...s is as follows When using internal device or file register R 1 When using direct access output DY 2 When using serial number access format file register Only for Universal model QCPU and LCPU 2 Basic Model QCPU High Performance model QCPU Process CPU and Redundant CPU 3 Devices other than above 3 b0 D0 b5 b15 b6 b7 Step Instruction Device ...

Page 143: ... OUT T OUTH T OUT ST OUTH ST Setting Data Internal Devices R ZR J U G Zn Constants K Other Bit Word Bit Word Only T Set value Other than T C 2 A Contact Continuity B Contact Non continuity Basic Process High performance Redundant Universal LCPU T0 Set value Setting in the range from 1 to 32767 is valid K50 T0 Set value Data register value in the range from 1 to 32767 is valid D10 T0 Set value Sett...

Page 144: ...f the number of repetitions executed will be updated 6 Indexing for timer coils or contacts can be conducted only by Z0 or Z1 Timer setting value has no limitation for indexing Remark 1 Timer s time limit Time limit of the timer is set in the PLC system of the PLC parameter dialog box 2 For information on timer counting methods refer to the User s Manual Functions Explanation Program Fundamentals ...

Page 145: ...ter For timers T0 to T2 the program is created in the order of timer operation Program Example 1 The following program turns Y10 and Y14 ON 10 seconds after X0 has gone ON Ladder Mode List Mode 3 The setting value of the low speed timer indicates its default time limit 100 ms Example T2 timer starts measurement from the next scan after turning ON of the contact of T1 timer T2 K1 T1 T1 K1 T0 T0 K1 ...

Page 146: ...imal constant H or a real number cannot be used for the counter value setting 5 3 3 OUT C Counter 5 3 3 OUT C Setting Data Internal Devices R ZR J U G Zn Constants K Other Bit Word Bit Word Only C Set value Other than T C 2 Converts the BCD data at X10 to X1F to BIN and stores the converted value at D10 When X2 is turned ON T2 starts measurement using the data stored in D10 as the set value Y15 go...

Page 147: ...lace for 1 5 Indexing for the counter coil and contact can use only Z0 and Z1 Counter setting value has no limitation for indexing Remark 1 For counter counting methods refer to the User s Manual Functions Explanation Program Fundamentals for the CPU module used 2 The number of basic steps of the OUT C instruction is 4 Operation Error 1 There is no operation error in the OUT instruction Program Ex...

Page 148: ...in SD63 to SD79 Use the RST F instruction to make the USER ERR LED go OFF as well as to delete the annunciator which was turned OFF by the OUT F instruction from SD63 to SD79 Operation Error 1 There is no operation error in the OUT instruction Remark 1 For details of annunciators refer to the User s Manual Functions Explanation Program Fundamentals for the CPU module used 2 The number of basic ste...

Page 149: ...instruction can be turned OFF by the RST instruction 3 When the execution command is OFF the status of devices does not change 5 3 5 SET Setting devices excluding annunciators 5 3 5 SET Setting Data Internal Devices R ZR J U G Zn Constants Other BL DY Bit Word Bit Word Other than T C Device Device Status Bit device Coils and contacts turned ON When Bit Designation has been Made for Word Device Des...

Page 150: ... LCPU 2 Basic Model QCPU High Performance model QCPU Process CPU and Redundant CPU 3 When some other device is in use 3 2 When using X as a device use the device numbers that are not used for the actual input If the same number is used for the actual input device and input X the data of the actual input will be written over the input X specified in the SET instruction Bit device number to be reset...

Page 151: ...odel QCPU High Performance model QCPU Process CPU and Redundant CPU 3 Other than above 3 b For word processing Internal device 2 Index resister 2 When using serial number access format file register Only for Universal model QCPU and LCPU 2 Basic Model QCPU High Performance model QCPU Process CPU and Redundant CPU 3 Other than above 3 Program Example 1 The following program sets the value of the da...

Page 152: ...is turned ON its number will not be stored at SD64 to SD79 RST 1 The annunciator designated by is turned OFF when the execution command is turned ON 2 The annunciator numbers F numbers of annunciators that have gone OFF are deleted from the special registers SD64 to SD79 and the value of SD63 is decremented by 1 5 3 7 SET F Setting annunciators RST F Resetting annunciators 5 3 7 SET F RST F Settin...

Page 153: ...hich take place when SD63 is 16 Operation Error 1 There is no operation error in the SET F or RST F instruction Program Example 1 The following program turns annunciator F11 ON when X1 goes ON and stores the value 11 at the special register SD64 to SD79 Further the program resets annunciator F11 if X2 goes ON and deletes the value 11 from the special registers SD64 to SD79 Ladder Mode List Mode Op...

Page 154: ...xecution command and turning the power supply OFF to ON with the latch relay ON the execution command turns OFF to ON at the first scan executing the PLS instruction and turning ON the designated device The device turned ON at the first scan after power ON turns OFF at the next PLS instruction 5 3 8 PLS Leading edge output PLF Trailing edge output 5 3 8 PLS PLF Setting Data Internal Devices R ZR J...

Page 155: ...h is changed from RUN to STOP after the execution of the PLF instruction the PLF instruction will not be executed again even if the switch is set back to RUN Note that the device designated by may remain ON for more than one scan if the PLS or PLF instruction is jumped by the CJ instruction or if the executed subroutine program was not called by the CALL instruction Operation Error 1 There is no o...

Page 156: ...ram reverses the output of Y10 when X9 goes ON Ladder Mode List Mode Timing Chart 5 3 9 FF Bit device output inversion 5 3 9 FF Setting Data Internal Devices R ZR J U G Zn Constants Other DY Bit Word Bit Word Device Device Status Prior to FF Execution After FF Execution Bit device OFF ON ON OFF Bit designated for word device 0 1 1 0 X9 OFF M9 OFF ON ON 1 scan Basic Process High performance Redunda...

Page 157: ...e SET RST instructions Ladder using the DELTA instruction Ladder using the SET RST instructions Operation 2 The DELTA P instruction is used by commands for leading edge execution for an intelligent function module 5 3 10 DELTA DELTAP Pulse conversion of direct output 5 3 10 DELTA DELTAP Setting Data Internal Devices R ZR J U G Zn Constants Other DY Bit Word Bit Word Step Instruction Device ON X0 D...

Page 158: ...ng program presets CH1 of the AD61 mounted at slot 0 of the main base unit when X20 goes ON Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The specified direct access output number exceeds the CPU module output range Stores preset value 0 at addresses 1 and 2 of the AD61 buffer memory Outputs the preset command Step Instruction Device ...

Page 159: ... example if D0 5 bit 5 b5 of D0 has been designated by the SFT instruction when the SFT instruction is executed it will shift the 1 0 status of b4 of D0 to b5 and turn b4 to 0 5 4 1 SFT SFTP Bit device shift 5 4 1 SFT SFTP Setting Data Internal Devices R ZR J U G Zn Constants Other DY Bit Word Bit Word Other than T C Basic Process High performance Redundant Universal LCPU Command Command SFTP SFT ...

Page 160: ...es ON Ladder Mode Timing Chart List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points of the specified device exceed those of the corresponding device Executes shift for Y57 to Y5B when X8 goes ON Start programming from the device having a large number Turns Y57 ON when X7 goes ON ON OFF X8 ON OFF X7 ON OFF Y57 ON OFF Y58 OFF Y59 ON OFF Y5A ON OFF Y5B ON Step Instr...

Page 161: ...ming in the write mode of a peripheral device These will be automatically displayed when the conversion operation is conducted after the creation of the ladder and then read mode is set 5 5 1 MC Setting the master control MCR Resetting the master control 5 5 1 MC MCR Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word N DY n Basic Process High performance Redundant Univer...

Page 162: ...ON when the MC instruction is ON Further using these same devices with the OUT instruction or other instructions will cause them to become double coils so devices designated by should not be used within other instructions MCR 1 This is the instruction for recovery from the master control and indicates the end of the master control range of operation 2 Do not place contact instructions before the M...

Page 163: ...successively limit the execution condition of the program A ladder using nesting would appear as shown below Ladder as displayed in the GPP ladder mode Ladder as it actually operates MC N0 M15 MC N1 M16 MC N2 M17 MCR N2 MCR N1 MCR N0 NO M15 N1 M16 N2 M17 A B C MC N0 M15 MC N1 M16 MC N2 M17 MCR N2 MCR N1 MCR N0 NO M15 N1 M16 N2 M17 A B C Not related to the status of A B or C Executed when A is ON E...

Page 164: ... by the MC instruction and also designated in the N1 to N0 order by the MCR instruction the vertical bus will intersect and a correct master control ladder will not be produced Ladder as displayed in the GPP ladder mode Ladder as it actually operates 2 If the nesting architecture results in MCR instructions concentrated in one location all master controls can be terminated by use of just the lowes...

Page 165: ...e displayed in ladder display at a peripheral device Peripheral devices continue to display ladders until encountering the END instruction 5 6 1 FEND Main routine program end 5 6 1 FEND Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU FEND FEND CJ FEND FEND END 0 P a When the CJ instruction is used CALL FEND Inter...

Page 166: ...1 The FEND instruction was executed after the execution of the CALL FCALL ECALL or EFCALL instruction and before the execution of the RET instruction 4221 The FEND instruction was executed before the execution of the IRET instruction in an interrupt program 4230 The FEND instruction was executed between the CHKCIR and CHKEND instructions 4231 The FEND instruction was executed between the IX and IX...

Page 167: ...of a program use the FEND instruction 3 When programming in the ladder mode of a peripheral device it is not necessary to input the END instruction 4 The use of the END and FEND instructions is broken down as follows for main routine programs subroutine programs and interrupt programs 5 6 2 END Sequence program end 5 6 2 END Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit ...

Page 168: ...NEXT instruction and after the execution of the FOR instruction 4211 The END instruction was executed before the execution of the RET instruction and after the execution of the CALL FCALL ECALL or EFCALL instruction 4221 The END instruction was executed before the execution of the IRET instruction in an interrupt program 4230 The END instruction was executed between the CHKCIR to CHKEND instructio...

Page 169: ... STOP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4200 The STOP instruction was executed before the execution of the NEXT instruction and after the execution of the FOR instruction 4211 The STOP instruction was executed before the execution of the RET instruction and after the execution of the CALL FCAL...

Page 170: ...ugging b To delete an instruction without having to change the number of steps Replace the instruction with NOP c To temporarily delete an instruction 5 7 2 NOP NOPLF PAGE n No operations 5 7 2 NOP NOPLF PAGE n Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Stops the programmable controller when X8 goes ON Sequence program Step Instruction Device Basic Process High p...

Page 171: ...ck Do not insert an NOPLF instruction in the midst of a ladder block b When printing instruction lists The page will be changed after the printing of the NOPLF instruction 3 Refer to the Operating Manual for the peripheral device in use for details of printouts from peripheral devices PAGE n 1 This is a no operation instruction that has no impact on any operations up to that point 2 No processing ...

Page 172: ...the nature of the ladder Ladder Mode List Mode Ladder Mode List Mode NOPLF Ladder Mode List Mode Before change After change Changing to NOP Step Instruction Device Step Instruction Device Step Instruction Device Before change After change Changing to NOP Changing to LD T3 Step Instruction Device Step Instruction Device Step Instruction Device ...

Page 173: ... NOPLF instruction will result in the following PAGE n Ladder Mode List Mode 6 Y40 X1 END 8 0 X0 D30 MOV K1 D40 MOV K2 NOPLF 5 NOPLF instruction inserted as a delimiter of ladder blocks causes print out page to be changed forcibly LD MOV 0 1 X0 K1 D30 MOV NOPLF 3 5 K2 D40 LD OUT END 6 7 8 X1 Y40 Changes print output page after printing NOPLF NOP Step Instruction Device ...

Page 174: ... F whose most significant bit b15 is 1 is designated as a constant the value is considered as a negative BIN value in comparison operation Operation Error 1 There is no operation error in the or instruction 6 1 1 BIN 16 bit data comparisons 6 1 1 Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Instruction Symbol in Condition Comparison Operation Result Instruction...

Page 175: ...a is less than 100 Ladder Mode List Mode 4 The following program compares the data in D0 and D3 and if the data in D0 is equal to or less than the data in D3 establishes continuity Ladder Mode List Mode Data for comparison or head number of the devices where the data for comparison is stored BIN 32 bits 6 1 2 D D D D D BIN 32 bit data comparisons D 6 1 2 D D D D D D Setting Data Internal Devices R...

Page 176: ...rror 1 There is no operation error in the D D D D D or D instruction Program Example 1 The following program compares the data at X0 to X1F with the data at D3 and D4 and turns Y33 ON if the data at X0 to X1F and the data at D3 and D4 match Ladder Mode List Mode 2 The following program compares BIN value K38000 to the data at D3 and D4 and establishes continuity if the data in D3 and D4 is somethi...

Page 177: ...ons are as follows Note that use of the E instruction can on occasion result in situations where errors cause the two values not to be equal 6 1 3 E E E E E Floating point data comparisons Single precision E 6 1 3 E E E E E E Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Instruction Symbol ...

Page 178: ...loating decimal point real number data at D3 and D4 Ladder Mode List Mode 3 The following program compares 32 bit floating decimal point real number data at D0 and D1 to 32 bit floating decimal point real number data at D3 and D4 Ladder Mode List Mode 4 The following program compares the 32 bit floating decimal point data at D0 and D1 to the floating decimal point real number 1 23 Ladder Mode List...

Page 179: ...e is stored into SD0 6 1 4 ED ED ED ED Floating point data comparisons Double precision ED ED 6 1 4 ED ED ED ED ED ED Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Instruction Symbol in Condition Comparison Operation Result Instruction Symbol in Condition Comparison Operation Result ED Continuity ED Non continuity ED ED ED ED ED ED ED ED ED ED Error code Error det...

Page 180: ...number 1 23 Ladder Mode List Mode Caution 1 Since the number of digits of the real number that can be input by Programing Tool is up to 15 digits the comparison with the real number whose number of significant digits is 16 or more cannot be made by the instruction shown in this section When judging match mismatch with the real number whose significant digits is 16 or more by the instruction in thi...

Page 181: ...ice number to the device number where 00H code is stored a If all character strings match the comparison result will be matched 6 1 5 Character string data comparisons 6 1 5 Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Instruction Symbol in Comparison Operation Result Instruction Symbol in Comparison Operation Result Continuity Continuity Non continuity Non continu...

Page 182: ...ymbol in Comparison Operation Result Non continuity Continuity Continuity Continuity Non continuity Non continuity Instruction Symbol in Comparison Operation Result Instruction Symbol in Comparison Operation Result Non continuity Non continuity Continuity Non continuity Continuity Continuity Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The code 00H does not exist within the r...

Page 183: ...is returned because the no match is detected at D12287 which is within the device range Program Example 1 The following program compares character strings stored following D0 and characters following D10 Ladder Mode List Mode 2 The following program compares the character string ABCDEF with the character string stored following D10 Ladder Mode List Mode 3 The following program compares the charact...

Page 184: ...nstructions are as follows 5 If all comparison results stored n points from are ON 1 SM704 block comparison signal goes ON 6 1 6 BKCMPooo BKCMPoooPBIN 16 bit block data comparisons 6 1 6 BKCMP BKCMP P Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Instruction Symbols Condition Comparison Operation Result Instruction Symbols Condition Comparison Operation Result...

Page 185: ...peration result at b4 to b7 in D0 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceeds those of each device specified in or The ranges of devices starting from the one specified in and overlap by n points The ranges of devices starting from the one specified in and overlap by n points S1 S2 D S1 D S2 D Step Instruction...

Page 186: ...the devices where the comparison operation result will be stored bits n Number of comparison data blocks BIN 16 bits 6 1 7 DBKCMPooo BIN 32 bit block data comparisons DBKCMPoooP 6 1 7 DBKCMP DBKCMP P QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step Instruction Device b15 b0 b15 b0 ...

Page 187: ...s will be on or off in accordance with the conditions as follows In a standby program a special relay depending on the caller program turns on or off 7 If the value specified by n is 0 the instruction will be not processed Instruction Symbols Condition Comparison Operation Result Instruction Symbols Condition Comparison Operation Result DBKCMP ON 1 DBKCMP OFF 0 DBKCMP DBKCMP DBKCMP DBKCMP DBKCMP D...

Page 188: ...0 9 when M0 is turned on Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 A negative value is specified for n 4101 The points specified in n exceeds those of each device specified in or The ranges of devices starting from the one specified in and overlap by n points The ranges of devices starting from the one specified in and overlap by n points S1...

Page 189: ...00 and up when all devices from M20 to M22 have reached the on status Ladder Mode List Mode Operation D10 F 0 Before execution 0 1 0 1 1 1 1 1 0 0 1 1 0 0 0 D10 0 D10 F 0 0 1 0 1 1 0 0 0 0 1 1 1 0 0 0 D10 0 After execution No change No change Step Instruction Device 1 ON 1 ON 1 ON M21 M22 M20 1 ON SM704 1 ON SM717 SM718 SM716 b31 b0 2147483000 60001 899999 b31 b0 2147483000 60000 900000 D3 D2 D5 D...

Page 190: ... Subtracts 16 bit BIN data designated by from 16 bit BIN data designated by and stores the result of the subtraction at the device designated by 2 Values for and can be designated between 32768 and 32767 BIN 16 bits 3 The judgment of whether data is positive or negative is made by the most significant bit b15 0 Positive 1 Negative 6 2 1 P P BIN 16 bit addition and subtraction operations 6 2 1 P P ...

Page 191: ... by 2 Values for and can be designated between 32768 and 32767 BIN 16 bits 3 The judgment of whether data is positive or negative is made by the most significant bit b15 0 Positive 1 Negative 4 The following will happen when an underflow or overflow is generated in an operation result The carry flag in this case does not go ON Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Wor...

Page 192: ...ror 1 There is no operation error in the P or P instruction Program Example 1 The following program adds when X5 is turned ON the data at D3 and D0 and outputs the operation result at Y38 to Y3F Ladder Mode List Mode 2 The following program outputs the difference between the set value for timer T3 and its present value in BCD to Y40 to Y53 Ladder Mode List Mode S1 S2 D b0 5678 BIN b15 b0 4444 BIN ...

Page 193: ... data designated by and stores the result of the subtraction at the device designated by 2 The values for and can be designated at between 2147483648 and 2147483647 BIN 32 bits 3 Judgment of whether the data is positive or negative is made on the basis of the most significant bit b31 0 Positive 1 Negative 6 2 2 D D P D D P BIN 32 bit addition and subtraction operations 6 2 2 D D P D D P Setting Da...

Page 194: ...r the data is positive or negative is made on the basis of the most significant bit b31 0 Positive 1 Negative 4 The following will happen when an underflow or overflow is generated in an operation result The carry flag in this case does not go ON Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Since bit 31 value is 0 result of operation takes a positive value Sinc...

Page 195: ...s no operation error in the D P or D P instruction Program Example 1 The following program adds 28 bit data from X10 to X2B to the data at D9 and D10 when X0 goes ON and outputs the result of the operation to Y30 to Y4B Ladder Mode List Mode 2 The following program subtracts the data from M0 to M23 from the data at D0 and D1 when XB goes ON and stores the result at D10 and D11 Ladder Mode List Mod...

Page 196: ...on is made from the lower bits K1 Lower 4 bits b0 to b3 K4 Lower 16 bits b0 to b15 K8 32 bits b0 to b31 3 Values for and can be designated between 32768 and 32767 BIN 16 bits 4 Judgments whether and are positive or negative are made on the basis of the most significant bit b15 for and for and b31 0 Positive 1 Negative 6 2 3 P P BIN 16 bit multiplication and division operations 6 2 3 P P Setting Da...

Page 197: ...ched to both the quotient and remainder 0 Positive 1 Negative Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program multiplies 5678 by 1234 in BIN and stores the result at D3 and D4 when X5 turns ON Ladder Mode List Mode 2 The following program multiplies BIN data at X8 to XF by BIN...

Page 198: ...2 bits of the bit device are required for the result of the multiplication operation first temporarily store the data in a word device then transfer the word device data to the bit device by designating 2 and 3 data 3 The values for and can be designated at between 2147483648 and 2147483647 BIN 32 bits 4 Judgments whether and are positive or negative are made on the basis of the most significant b...

Page 199: ...e on the basis of the most significant bit b31 Sign is attached to both the quotient and remainder 0 Positive 1 Negative Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 is turned ON and the corresponding error code is stored into SD0 Program Example 1 The following program multiplies the BIN data at D7 and D8 by the BIN data at D18 and D19 when X5 is ON...

Page 200: ... 2 0 to 9999 BCD 4 digits can be assigned to and 3 The following will result if an underflow is generated by the subtraction operation The carry flag in this case does not go ON Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 6 2 5 B B P B B P BCD 4 digit addition and subtraction operations 6 2 5 B B P B B P Setting...

Page 201: ...D 4 digits Data for adding subtracting or head number of the devices where the data for adding subtracting is stored BCD 4 digits Head number of the devices where the addition subtraction operation result will be stored BCD 4 digits Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Stores 5678 in BCD to D993 Adds 1234 in BCD to the value at D993 and stores the resul...

Page 202: ...rry flag in this case does not go ON Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program adds the D3 BCD data and the Z1 BCD data when X20 goes ON and outputs the result to Y8 to Y17 Ladder Mode List Mode 2 The following program subtracts the BCD data at D20 from the BCD data at D...

Page 203: ... 8 digits can be assigned to and 3 The following will result if an underflow is generated by the subtraction operation The carry flag in this case does not go ON 6 2 6 DB DB P DB DB P BCD 8 digit addition and subtraction operations 6 2 6 DB DB P DB DB P Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU D D S S ...

Page 204: ...esult at D100 and D101 and at the same time outputs it from Y30 to Y4F Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The or BCD data is outside the 0 to 99999999 range S D Stores 12345600 in BCD to D887 and D888 Adds 34567000 in BCD to the value in D887 and D888 and stores the result to D887 and D888 Outputs the data in D887 and D888 to Y30 to Y4F Step In...

Page 205: ...CD 8 digit data designated by and stores the result of the subtraction at the device designated by 2 0 to 99999999 BCD 8 digits can be assigned to and 3 The following will result if an underflow is generated by the subtraction operation The carry flag in this case does not go ON Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word S1 S1 S2 S2 D D S1 S1 S2 S2 D D Comman...

Page 206: ...e multiplication division operation result will be stored BCD 8 digits Function B 1 Multiplies BCD data designated by and BCD data designated by and stores the result in the device designated by 2 0 to 9999 BCD 4 digits can be assigned to and Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The or BCD data is outside the 0 to 99999999 range 6 2 7 B B P B B P BCD 4 digit multiplic...

Page 207: ...hen X20 is turned ON the BCD data at X0 to XF by the BCD data at D8 and stores the operation result at D0 to D1 Ladder Mode List Mode Operation 2 The following program divides 5678 by the BCD data 1234 stores the result at D502 and D503 and at the same time outputs the quotient to Y30 to Y3F Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The or B...

Page 208: ... BCD data designated by and stores the result in the device designated by 2 64 bits are used for the result of the division operation and stored as quotient and remainder Quotient BCD 8 digits Stored at the lower 32 bits Remainder BCD 8 digits Stored at the upper 32 bits 3 If has been designated as a bit device the remainder of the operation will not be stored 6 2 8 DB DB P DB DB P BCD 8 digit mul...

Page 209: ... BCD data from X20 to X3F by the BCD data at D8 and D9 when X0B goes ON and stores the result from D765 to D768 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The or BCD data is outside the 0 to 9999 range The divisor is 0 S1 S2 Step Instruction Device Y30 Y4F 8 6 3 4 7 1 2 5 Multiplicand Multiplier 0 0 5 7 3 6 8 2 0 0 3 9 2 0 9 5 0 D505 0 3 9 0 ...

Page 210: ...and a 32 bit floating decimal point type real number designated by and stores the result at a device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 126 Designated value stored value 2128 6 2 9 E E P E E P Addition and subtraction of floating point data Single precision 6 2 9 E E P E E P Basic model QCPU The serial number first five digits is 04122 ...

Page 211: ...t floating decimal point type real number at D10 and D11 from the 32 bit floating decimal point type real numbers at D20 and D21 and stores the result of the subtraction at D20 and D21 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified devic...

Page 212: ...nd and which can be stored are as follows 0 2 126 Designated value stored value 2128 E 1 Subtracts a 32 bit floating decimal point type real number designated by and a 32 bit floating decimal point type real number designated by and stores the result at a device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 126 Designated value stored value 2128 S...

Page 213: ...cts the 32 bit floating decimal point type real numbers at D20 and D21 from the 32 bit floating decimal point type real numbers at D11 and D10 and stores the result at D30 and D31 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device val...

Page 214: ...ng decimal point type real number designated by and stores the result at a device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 1022 Designated value stored value 21024 6 2 10 ED ED P ED ED P Addition and subtraction of floating point data Double precision 6 2 10 ED ED P ED ED P Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Wor...

Page 215: ...cts the 64 bit floating decimal point type real number at D10 to D13 from the 64 bit floating decimal point type real numbers at D20 to D23 and stores the result of the subtraction at D20 to D23 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The val...

Page 216: ... value stored value 21024 ED 1 Subtracts a 64 bit floating decimal point type real number designated by and a 64 bit floating decimal point type real number designated by and stores the result at a device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 1022 Designated value stored value 21024 Setting Data Internal Devices R ZR J U G Zn Constants E O...

Page 217: ...rograms subtracts the 64 bit floating decimal point type real numbers at D20 to D23 from the 64 bit floating decimal point type real numbers at D10 to D13 and stores the result at D30 to D33 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specifi...

Page 218: ...ecimal point real number designated by by the 32 bit floating decimal point real number designated by and stores the operation result at the device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 126 Designated value stored value 2128 6 2 11 E E P E E P Multiplication and division of floating point data Single precision 6 2 11 E E P E E P Basic mode...

Page 219: ... floating decimal point real numbers at D10 and D11 by the 32 bit floating decimal point real numbers at D20 and D21 and stores the result at D30 and D31 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 The divisor is 0 4...

Page 220: ...ber designated by by the 64 bit floating decimal point real number designated by and stores the operation result at the device designated by 2 Values which can be designated at and and which can be stored are as follows 0 2 1022 Designated value stored value 21024 3 When the operation results in 0 or an underflow the result is processed as 0 6 2 12 ED ED P ED ED P Multiplication and division of fl...

Page 221: ...des the 64 bit floating decimal point real numbers at D10 to D13 by the 64 bit floating decimal point real numbers at D20 to D23 and stores the result at D30 to D33 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specified device value is 0 4100 ...

Page 222: ...flow is generated in an operation result The carry flag in this case does not go ON 6 2 13 BK BK P BK BK P BIN 16 bit data block addition and subtraction operations 6 2 13 BK BK P BK BK P Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant Universal LCPU indicates an instruction symbol of BK BK BK BK BK P BK P Command Command...

Page 223: ...s Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in or The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and S1 S2 D BIN BIN...

Page 224: ... and subtraction operation result will be stored BIN 32 bits n Number of addition and subtraction data blocks BIN 16 bits 6 2 14 DBK DBK P DBK BIN 32 bit data block addition and subtraction operations DBK P 6 2 14 DBK DBK P DBK DBK P QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step...

Page 225: ...a constant is specified for 2 Block subtraction is executed in 32 bit units 3 The constant in the device specified by can be between 2147483648 to 2147483647 BIN 32 bit data 4 If the value specified by n is 0 the instruction will be not processed S1 S2 D S2 b31 b0 BIN BIN BIN 2 4 D S2 n 2 n 2 S2 S2 S2 D D D n BIN BIN BIN b31 b0 3 5 S1 S2 S1 S1 S1 n 1 S1 S1 S1 S1 n 1 S2 1 b31 b0 BIN BIN BIN 2 4 n 2...

Page 226: ...he value data stored at D100 to D109 and then stores the operation result into R100 to R109 when M0 is turned on Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 A negative value is specified for n 4101 The points specified in n exceed those of the corresponding device specified in or The ranges of devices starting from the one specified in and overlap by n ...

Page 227: ... character string data designated at is ignored and the character string designated at is appended to the last character of the string 6 2 15 P Linking character strings 6 2 15 P Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word b31 b0 12345 54321 12345 54321 99999 D103 D102 D105 D104 D101 D100 D107 D106 D109 D108 b31 b0 11111 11111 22222 22222 33333 D53 D52 D55 D54 D51...

Page 228: ...Head number of the devices where the linking result will be stored character string Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The number of device points starting from the device specified in is insufficient to store all character strings The storage device numbers for the character strings specified by and overlap The number of characters of and exceeds 16383 Setting Data...

Page 229: ... ABCD when X0 is ON and stores them in D100 onwards Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The number of device points starting from the device specified in is insufficient to store all character strings The storage device numbers for the character strings specified by and overlap The storage device numbers for the character strings speci...

Page 230: ...NC P or DEC P instruction Program Example 1 The following program outputs the present value at the counter C0 to C20 to the area Y30 to Y3F in BCD every time X8 is turned ON When present value is less than 9999 Ladder Mode 6 2 16 INC INCP 16 bit BIN data increment DEC DECP 16 bit BIN data decrement 6 2 16 INC INCP DEC DECP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Wo...

Page 231: ... is stored at the device designated by 6 2 17 DINC DINCP 32 bit BIN data increment DDEC DDECP 32 bit BIN data decrement 6 2 17 DINC DINCP DDEC DDECP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device Transfers 100 to D8 when X7 goes ON In the state M38 OFF decrement at D8 D8 1 is executed when X8 goes from OFF to ON At D8 0 M38 goes ON Step Instru...

Page 232: ...1 when X0 is ON Ladder Mode List Mode 2 The following program adds 1 to the data set at X10 to X27 when X0 goes ON and stores the result at D3 and D4 Ladder Mode List Mode 3 The following program subtracts 1 from the data at D0 and D1 when X0 goes ON Ladder Mode List Mode 4 The following program subtracts 1 from the data set at X10 to X27 when X0 goes ON and stores the result at D3 and D4 Ladder M...

Page 233: ...CDP DBCDP S D S D indicates an instruction symbol of BCD DBCD S D S D S D 32768 0 16384 0 8192 1 4096 0 2048 0 1024 1 512 1 256 1 128 0 64 0 32 0 16 0 8 1 4 1 2 1 1 1 BIN 9999 8000 1 4000 0 2000 0 1000 1 800 1 400 0 200 0 100 1 80 1 40 0 20 0 10 1 8 1 4 0 2 0 1 1 BCD 9999 BCD conversion Thousands digits Hundreds digits Tens digits Ones digits Must always be 0 S D S D BCD conversion 1 Upper 4 digit...

Page 234: ...LCPU 4100 The data of is other than 0 to 9999 when the BCD instruction is executed 4100 The data of or 1 is other than 0 to 99999999 when the DBCD instruction is executed S S S Programmable Controller Output Module 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 Output power supply 7 segment display unit 8000 4000 2000 1000 800 400 200 100 80 40 20 10 8 4 2 1 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20 Y2B Y2A Y29 Y28 Y2F Y2...

Page 235: ...N DBIN BINP DBINP S D S D indicates an instruction symbol of BIN DBIN S D S D S D BIN conversion 8000 1 4000 0 2000 0 1000 1 800 1 400 0 200 0 100 1 80 1 40 0 20 0 10 1 8 1 4 0 2 0 1 1 BCD 9999 Thousands digits Hundreds digits Tens digits Ones digits 32768 0 16384 0 8192 1 4096 0 2048 0 1024 1 512 1 256 1 128 0 64 0 32 0 16 0 8 1 4 1 2 1 1 1 BIN 9999 Always filled with 0s S D S D 0 BCD 99999999 Te...

Page 236: ...es it at D0 and D1 Addition of the BIN data converted from BCD at X20 to X37 and the BIN data converted from BCD at X10 to X1F Ladder Mode List Mode If the data set at X10 to X37 is a BCD value which exceeds 2147483647 the value at D0 and D1 will be a negative value because it exceeds the range of numerical values that can be handled by a 32 bit device Error code Error details Q00J Q00 Q01 QnH QnP...

Page 237: ...ta designated by to 32 bit floating decimal point type real number and stores at device number designated by 2 BIN values between 2147483648 to 2147483647 can be designated by 1 and 6 3 3 FLT FLTP Conversion from BIN 16 bit data to floating point data Single precision DFLT DFLTP Conversion from BIN 32 bit data to floating point data Single precision 6 3 3 FLT FLTP DFLT DFLTP Basic model QCPU The s...

Page 238: ...der Mode List Mode Operation 2 The following program converts the BIN 32 bit data at D20 and D21 to a 32 bit floating decimal point type real number and stores the result at D0 and D1 Ladder Mode List Mode Operation Integer b31 b24 b23 b16 222030030 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 b15 b8 b7 b0 1 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 Result of operation is 222030032 Truncation Always filled with 1 After co...

Page 239: ...47483647 can be designated by 1 and Operation Error 1 There is no operation error in the FLT P or DFLT P instruction Program Example 1 The following program converts the BIN 16 bit data at D20 to a 64 bit floating decimal point type real number and stores the result at D0 to D3 Ladder Mode List Mode 6 3 4 FLTD FLTDP Conversion from BIN 16 bit data to floating point data Double precision DFLTD DFLT...

Page 240: ...is from 32768 to 32767 3 Stores integer values stored at as BIN 16 bit values 4 After conversion the first digit after the decimal point of the real number is rounded off 6 3 5 INT INTP Conversion from floating point data to BIN 16 bit data Single precision DINT DINTP Conversion from floating point data to BIN 32 bit data Single precision 6 3 5 INT INTP DINT DINTP Basic model QCPU The serial numbe...

Page 241: ...ecimal point type real number at D20 and D21 to BIN 16 bit data and stores the result at D0 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 unnormalized number nonnumeric and 4100 The 32 bit floating point data specified...

Page 242: ...res integer values stored at as BIN 16 bit values 4 The converted data is the value rounded 64 bit floating point real number to the first digit after the decimal point 6 3 6 INTD INTDP Conversion from floating point data to BIN 16 bit data Double precision DINTD DINTDP Conversion from floating point data to BIN 32 bit data Double precision 6 3 6 INTD INTDP DINTD DINTDP Setting Data Internal Devic...

Page 243: ...ode Operation 2 The following program converts the 64 bit floating decimal point type real number at D20 to D23 with BIN 32 bit data and stores the result at D0 and D1 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specified device value is 0 unnormalized...

Page 244: ... and stores at R100 and R101 Ladder Mode List Mode Operation 6 3 7 DBL DBLP Conversion from BIN 16 bit to BIN 32 bit data 6 3 7 DBL DBLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word D1 574968 D0 D21 574968 321 D20 D23 D22 D21 2147483649 22 D20 D23 D22 Conversion to integer BIN value Conversion to integer An operation erroe occurs because the specified data is l...

Page 245: ...an error code is stored into SD0 Program Example 1 The following program converts the BIN 32 bit data at R100 and R101 to BIN 16 bit data when X20 is ON and stores it at D100 Ladder Mode List Mode Operation 6 3 8 WORD WORDP Conversion from BIN 32 bit to BIN 16 bit data 6 3 8 WORD WORDP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Error code Error details Q00J Q...

Page 246: ...bit data to Gray code DGRY DGRYP Conversion from BIN 32 bit data to Gray code 6 3 9 GRY GRYP DGRY DGRYP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The data at is a negative value Basic Process High performance Redundant Universal LCPU Command Command S D D S GRYP DGRYP GRY DGRY P indicates an ...

Page 247: ...e converted BIN data will be stored BIN 16 32 bits Function GBIN Converts Gray code data at device designated by to BIN 16 bit data and stores at device designated by 6 3 10 GBIN GBINP Conversion from Gray code to BIN 16 bit data DGBIN DGBINP Conversion from Gray code to BIN 32 bit data 6 3 10 GBIN GBINP DGBIN DGBINP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word...

Page 248: ...code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The data of is other than 0 to 32767 when the GBIN instruction is executed 4100 The data of is other than 0 to 2147483647 when the DGBIN instruction is executed 6 3 11 NEG NEGP Complement of 2 of BIN 16 bit data sign inversion DNEG DNEGP Complement of 2 of BIN 32 bit data sign inversion 6 3 11 NEG NEGP DNEG DNEGP Setting Data Internal De...

Page 249: ...lowing program calculates a total for the data at D10 through D20 when XA goes ON and seeks an absolute value if the result is negative Ladder Mode List Mode D D 16 bit Before execution Sign conversion b15 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 b0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 b15 1 1 1 1 1 1 1 b0 21846 0 0 0 0 0 0 0 1 D D 0 After execution 21846 D D 32 bit b31 1 Befor...

Page 250: ...the 32 bit floating decimal point type real number data at D100 and D101 when X20 goes ON and stores result at D100 and D101 Ladder Mode List Mode Operation 6 3 12 ENEG ENEGP Floating point sign inversion Single precision 6 3 12 ENEG ENEGP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word 1 Error cod...

Page 251: ...0 Program Example 1 The following program inverts the sign of the 64 bit floating decimal point type real number data at D0 to D3 when X20 goes ON and stores result at D0 to D3 Ladder Mode List Mode Operation 6 3 13 EDNEG EDNEGP Floating point sign inversion Double precision 6 3 13 EDNEG EDNEGP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Error code Error details Q...

Page 252: ...ord n Basic Process High performance Redundant Universal LCPU Command Command BKBCDP BKBCD n n S D S D BKBCDP BKBCD S D S D S D BCD conversion 0 BIN 1234 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0 0 BIN 5678 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 0 BIN 1545 0 0 0 0 1 1 0 0 0 0 0 1 0 0 1 1 n Must always be 0 0 BIN 4321 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 0 BIN 5555 0 0 1 0 1 0 1 1 0 1 1 0 0 1 1 n 1 2 n 2 0 BCD 1234 0 0 1 0 0 ...

Page 253: ... device specified by is outside the 0 to 9999 range 4101 The points specified in n exceed those of the corresponding device specified in or The same device is specified in and 6 3 15 BKBIN BKBINP Conversion from block BCD 4 digit data to block BIN 16 bit data 6 3 15 BKBIN BKBINP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n S S D S D Step Instruction Device BC...

Page 254: ...ce specified by is outside the 0 to 9999 range 4101 The points specified in n exceed those of the corresponding device specified in or The same device is specified in and S D BIN conversion 0 BIN 1234 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0 0 BIN 5678 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 0 BIN 1545 0 0 0 0 1 1 0 0 0 0 0 1 0 0 1 1 n 0 BIN 4321 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 0 BIN 5555 0 0 1 0 1 0 1 1 0 1 1 0 0 1 1 n...

Page 255: ...a Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 unnormalized number nonnumeric and 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0 0 0 0 1 1 1 0 1 1 1 1 0 0 1 1 0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 0 0 1 1 1 ...

Page 256: ...ration Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 6 3 17 EDCON EDCONP Conversion from Double precision to Single precision 6 3 17 EDCON EDCONP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device val...

Page 257: ...CON EDCONP Program Example 1 The program which converts 64 bit floating point real number of the devices D10 to D13 into 32 bit floating point real number when X0 turns ON and outputs the conversion result to the devices D0 to D1 Ladder Mode List Mode Step Instruction Device ...

Page 258: ... 1 The following program stores input data from X0 to XB at D8 Ladder Mode List Mode 6 4 1 MOV MOVP 16 bit data transfer DMOV DMOVP 32 bit data transfer 6 4 1 MOV MOVP DMOV DMOVP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU P Command Command MOV DMOV MOVP DMOVP S D S D indicates an instruction symbol of MO...

Page 259: ... Function Transfers 32 bit floating decimal point type real number data being stored at the device designated by to a device designated by Operation Error 1 There is no operation error in the EMOV P instruction 6 4 2 EMOV EMOVP Floating point data transfer Single precision 6 4 2 EMOV EMOVP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U...

Page 260: ...ng decimal point type real number data being stored at the device designated by to a device designated by Operation Error 1 There is no operation error in the EDMOV P instruction 6 4 3 EDMOV EDMOVP Floating point data transfer Double precision 6 4 3 EDMOV EDMOVP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Step Instruction Device D11 36 475 D10 D1 36 475 D0 Step ...

Page 261: ...designated by to the devices from the device designated by and onward The character string data enclosed in double quotes or devices from the number specified by to the device number storing 00H are transferred all at once 6 4 4 MOV MOVP Character string transfer 6 4 4 MOV MOVP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device D11 36 475 D10 D13 ...

Page 262: ...acter string ABCD is transferred to D20 and D21 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 There is no 00H code stored in the devices between the device number specified by and the corresponding device number The entire character string cannot be stored in the points between the device number specified by and the last device number of the corresponding...

Page 263: ...Error 1 There is no operation error in the CML P or DCML P instruction 6 4 5 CML CMLP 16 bit data negation transfer DCML DCMLP 32 bit data negation transfer 6 4 5 CML CMLP DCML DCMLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU Command Command P CML DCML CMLP DCMLP S D S D indicates an instruction symbol o...

Page 264: ...ration 4 The following program inverts the data at X0 to X1F and transfers results to D0 and D1 Ladder Mode List Mode Step Instruction Device These bits are all regarded as 0 D0 If Number of bits of Number of bits of 1 1 0 1 0 0 0 0 X7 X0 0 0 1 0 1 1 1 1 b7 b0 1 1 1 1 1 1 1 1 b15 b8 S D Step Instruction Device These bits are all regarded as 0 If Number of bits of Number of bits of 1 0 1 0 0 0 1 1 ...

Page 265: ... BMOVP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n These bits are all regarded as 0 0 1 0 0 0 1 1 1 0 0 1 0 1 1 0 0 X1B X8 X7 X0 1 0 1 1 1 0 0 0 1 1 0 1 0 0 1 1 b7 b0 1 1 1 1 b8 D0 1 b31 b28 b27 b24 If Number of bits of Number of bits of S D Step Instruction Device These bits are all regarded as 0 0 1 0 0 0 1 1 1 0 0 1 0 1 1 0 0 M35 M24 M23 M16 1 0 1 1 1 0 0...

Page 266: ... of data from ZR30000 source to R10 block No 1 of the destination ZR transfer range 30000 to 30000 10000 1 30000 to 39999 R transfer range 10 1 32768 to 10 1 32768 10000 1 32778 to 42777 Therefore the range 32778 to 39999 overlaps and the data is not correctly transferred 3 When is a word device and is a bit device the object for the word device will be the number of bits designated by the bit dev...

Page 267: ...ission area device is not available only for the QCPU 1 Refer to the DFMOV instruction SM237 can be used only for the Universal model QCPU whose first 5 digits of serial number is 10012 or later and LCPU Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program outputs the lower...

Page 268: ...e object 3 If bit device has been designated for and then and should always have the same number of digits 6 4 7 FMOV FMOVP Identical 16 bit data block transfer 6 4 7 FMOV FMOVP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step Instruction Device 0 1 1 1 0 1 0 0 0 0 0 1 X20 X23 X2B X28 X2F X2C 0 1 1 0 X27 X24 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 Before execution D...

Page 269: ...ed transmission area device is not available only for the QCPU 1 Refer to the DFMOV instruction SM237 can be used only for the Universal model QCPU whose first 5 digits of serial number is 10012 or later and LCPU Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program outputs ...

Page 270: ...al number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n 0 1 1 1 1 1 1 0 1 1 0 1 X20 X23 X2B X28 X2F X2C 0 0 1 0 X27 X24 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 Before execution D100 After execution destination of transfer 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 D101 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 D102 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 D103 4...

Page 271: ...check a device range during the execution of the FMOV instruction can be selected with the device range check inhibit flag SM237 Only when the conditions of the subset processing are established Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns on and an error code is stored into SD0 Program Example 1 The following program stores the value data stor...

Page 272: ... 1 0 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 b31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 b20 b19 b0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Basic Process High performance Redundant Universal LCPU Command Command P D1 D2 D1 D2 XCH DXCH XCHP DXCHP indicates an instruction symbol of XCH DXCH D1 D2 D1 D2 D1 D2 b7 b0 b15 b8 Before ex...

Page 273: ...with the data at M16 to M47 when X10 goes ON Ladder Mode List Mode 4 The following program exchanges the contents of D0 and D1 with those of D9 and D10 when M0 goes ON Ladder Mode List Mode Head number of the devices where the data to be exchanged is stored BIN 16 bits n Number of exchanges BIN 16 bits 6 4 10 BXCH BXCHP Block 16 bit data exchanges 6 4 10 BXCH BXCHP Setting Data Internal Devices R ...

Page 274: ...1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 b7 b0 b15 b8 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1...

Page 275: ... of R10 when X10 goes ON Ladder Mode List Mode Operation 6 4 11 SWAP SWAPP Upper and lower byte exchanges 6 4 11 SWAP SWAPP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU Command Command SWAP SWAPP D D SWAP SWAPP D D D 0 1 0 1 1 0 1 0 0 1 1 0 b11 b8 b15 b12 1 0 1 0 b7 b4 b0 b3 1 1 1 1 1 1 b11 b8 b15 b12 1 1 b7 b...

Page 276: ...number within the same program file starting with the scan immediately after OFF ON of the execution command 2 When the execution command is OFF or turned ON OFF the program at the next step is executed 6 5 1 CJ SCJ JMP Pointer branch 6 5 1 CJ SCJ JMP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word P Basic Process High performance Redundant Universal LCPU Command Comm...

Page 277: ...ently being executed However it is necessary to consider methods to get out of the loop so that the watchdog timer does not time out in the process 5 The device to which a jump has been made with the CJ SCJ or JMP does not change 6 The label P occupies step 1 7 The jump instructions can be used only for pointer numbers within the same program file 8 If a jump is made to a pointer number inside the...

Page 278: ...tion inserting AND SM400 or the NOP instruction in immediately before the SCJ instruction is required Program example 1 Ladder Mode List Mode Program example 2 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4210 The specified pointer number is not set before the END instruction A pointer number which is not in use as a label in the same program has been specifi...

Page 279: ...ts Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4200 After the FOR instruction was executed the GOEND instruction was executed prior to the NEXT instruction 4211 After the CALL ECALL instruction was executed the GOEND instruction was executed prior to the the RET instruction 4221 During an interrupt program the GOEND instruction was executed prior to the IR...

Page 280: ...e a state in which the interrupt program designated by the interrupt pointer number certified by the IMASK instruction can be executed When the IMASK instruction is not executed I32 to I47 are disabled 6 6 1 DI Interrupt disable EI Interrupt enable IMASK Interrupt program mask 6 6 1 DI EI IMASK Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Basic Process High perform...

Page 281: ...ogram Fundamentals or Qn H QnPH QnPRHCPU User s Manual Function Explanation Program Fundamentals 3 The DI state interrupt disabled is active during the execution of an interrupt program Do not insert the EI instructions in interrupt programs to attempt the execution of multiple interrupts with interrupt programs running inside interrupt programs 4 If there are the EI and DI instructions within a m...

Page 282: ...QCPU or LCPU is used Head number of the devices where the interrupt mask data is stored BIN 16 bits Function DI 1 Disables the execution of an interrupt program until the EI instruction has been executed even if a start cause for the interrupt program occurs 2 A DI state is entered when power is turned ON or when the CPU module is reset Setting Data Internal Devices R ZR J U G Zn Constants Other B...

Page 283: ...781 to SD793 device numbers should be designated as to 15 successively Sequence program DI Sequence program EI In FEDN Interrupt programs Even if a cause of interrupt occurs during the execution of the sequence program between the DI and EI instructions execution of the interrupt program is suspended until the processing of the sequence program is completed S b15 I15 I14 b0 I13 I12 I11 I10 I9 I8 I...

Page 284: ...t programs to attempt the execution of multiple interrupts with interrupt programs running inside interrupt programs 4 If there are the EI and DI instructions within a master control these instructions will be executed regardless of the execution non execution status of the MC instruction Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error cod...

Page 285: ...ecution Control Instructions 6 6 1 DI EI IMASK Program Example 1 The following program creates an execution enabled state for the interrupt program marked by the interrupt pointer number when X0 is ON Ladder Mode List Mode Step Instruction Device ...

Page 286: ...de 6 6 2 IRET Recovery from interrupt programs 6 6 2 IRET Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4220 There is no pointer corresponding to the interrupt number 4221 After an interrupt occurred the END FEND GOEND or STOP instruction was executed prior to the IRET instruction 4223 The IRET instructio...

Page 287: ...fresh instruction is executed the inputs X or outputs Y of the corresponding device numbers are refreshed forcibly midway through program execution Therefore a pulse signal can be output to an external source during a scan 3 Use direct access inputs DX or direct access outputs DY to refresh inputs X or outputs Y in 1 point units 6 7 1 RFS RFSP I O refresh 6 7 1 RFS RFSP Setting Data Internal Devic...

Page 288: ...N and an error code is stored into SD0 Program Example 1 The following program refreshes X100 to X11F and Y200 to Y23F when M0 goes ON Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the proximate I O Step Instruction Device ...

Page 289: ...ith the setting value designated by n However the present value count will continue even when the contact of the counter designated at goes ON See Program Example 1 When the count is going down the counter for the contact designated at goes OFF when the present value reaches the set value 1 See Program Example 1 The counter designated at is a ring counter If it is counting up when the present valu...

Page 290: ...other instruction If they are used by other instructions they will not be capable of returning an accurate count 4 The UDCNT1 instruction can be used as many as 6 times within all the programs being executed The seventh and the subsequent UDCNT1 instructions are not processed Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored i...

Page 291: ...ted at goes ON when the present value becomes identical with the setting value designated by n However the present value count will continue even when the contact of the counter designated at goes ON See Program Example 1 When the count is going down the counter for the contact designated at goes OFF when the present value reaches the set value 1 See Program Example 1 The counter designated at is ...

Page 292: ...y other instruction If they are used by other instructions they will not be capable of returning an accurate count 4 The UDCNT2 instruction can be used as many as 5 times within all the programs being executed The sixth and the subsequent UDCNT2 instructions are not processed Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored i...

Page 293: ...hile the TTMR instruction is being executed Changing this multiplier will result in an inaccurate value being returned 3 The TTMR instruction can also be used in low speed execution type programs 4 The device designated by 1 is used by the system of the CPU module so users should not change its value If users do change this value the value stored in the device designated by will no longer be accur...

Page 294: ... when the amount of time designated by n has passed or when the command for the STMR instruction goes OFF ON delay timer output 3 Goes ON at the trailing edge of the timer coil and after the trailing edge of the command for the STMR instruction goes OFF when the amount of time designated by n has passed 2 The timer coil designated by turns ON at the leading edge and trailing edge of the command fo...

Page 295: ...timer designated by is identical to the low speed timer 6 A value between 0 to 32767 can be set for n No operation if n is other than 0 to 32767 7 The timer designated by cannot be used by the OUT instruction If the STMR instruction and the OUT instruction use the same timer number accurate operation will not be conducted Operation Error 1 In the following case an operation error occurs the error ...

Page 296: ...input signal bits 2 0 point detection input signal bits 3 High speed forward rotation output signal for system use bits 4 Low speed forward rotation output signal for system use bits 5 Stop output signal for system use bits 6 Low speed reverse rotation output signal for system use bits 7 High speed reverse rotation output signal for system use bits 6 8 5 ROTC Rotary table shortest direction contro...

Page 297: ...ockwise rotation When the B phase is at the trailing edge Reverse rotation counterclockwise rotation 6 2 is the 0 point detection output signal that goes ON when item number 0 has arrived at the No 0 station When the device designated by 2 goes ON while the ROTC instruction is being executed 0 is cleared It is best to perform this clear operation first then to begin shortest direction control with...

Page 298: ...ts 0 Present value BIN 16 bits 1 Number of executions BIN 16 bits n3 Number of shifts BIN 16 bits 0 Completion device bits 1 Bit for selecting data retaining at completion bit 6 8 6 RAMP Ramp signal 6 8 6 RAMP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n1 n2 n3 Step Instruction Device Station No 0 Station No 1 Detection switch X000 X001 Part Forward rotation ...

Page 299: ... at 0 When 1 is ON 0 will remain ON and the contents of 0 will not change 3 When the command is turned OFF during the execution of this instruction the contents of 0 will not change following this When the command goes ON again the RAMP instruction will begin a new move from the present value at 0 4 Do not change the specified values in n1 and n2 before the completion device specified in 0 turns O...

Page 300: ...ere the measurement result will be stored BIN 16 bits 1 Local devices and the file registers set for individual programs cannot be used 6 8 7 SPD Pulse density measurement 6 8 7 SPD Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Only X n 1 1 1 Step Instruction Device 1scan 1scan 1scan 1scan 1scan 1scan X0 10 0 25 1 40 2 55 3 70 4 85 5 100 6 OFF ON ON ON D0 D1 M0 ...

Page 301: ...Performance model QCPU or Process CPU is used The instruction is not processed when n 0 3 The SPD instruction can be used as many as 6 times within all the programs being executed The seventh and the subsequent SPD instructions are not processed 4 While the measurement is in execution while the command input is ON by the SPD instruction the setting value cannot be changed Turn OFF the command inpu...

Page 302: ...interrupt The device data registered in the work area is cleared by turning the execution command OFF or turning the STOP RUN switch STOP RUN For this reason the pulses that can be output must have longer ON and OFF times than the interrupt interval of the CPU module The interrupt interval of individual modules is shown below 2 Do not change the argument for the PLSY instruction during pulse outpu...

Page 303: ...tputs the pulse of the cycle set by n2 for the amount of time ON designated by n1 to the output module designated by 2 The setting ranges for n1 and n2 are shown below 2 The value specified by n1 should be less than the value specified by n2 6 8 9 PWM Pulse width modulation 6 8 9 PWM Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n1 n2 1 CPU Module Type Name Sett...

Page 304: ...nge the argument turn OFF the execution command Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program outputs a 100 ms pulse once each second to Y20 when X0 is ON Ladder Mode List Mode Head input device bits Head output device bits Head number of the devices where matrix input data ...

Page 305: ... can be designated for and 7 For n a value in the range from 2 to 8 can be assigned 8 No processing is performed in the following cases The device number designated by or is not divisible by 16 The device designated by is outside the actual input range The device designated by is outside the actual output range The space 16 n points following the device designated by exceeds the relevant device ra...

Page 306: ...above an input cannot be read correctly If the scan time in a sequence program is short select the constant scan and set the scan time longer than the total of response time M32 X012 M33 X011 M34 M35 X013 M36 X014 M37 X015 M38 X016 M39 X017 M40 X018 M41 X019 M42 X01A M43 X01B M44 X01C M45 X01D M46 X01E M47 X01F M16 X012 M17 X011 M18 M19 X013 M20 X014 M21 X015 M22 X016 M23 X017 M24 X018 M25 X019 M2...

Page 307: ... Operation Example A B Y Logical product AND Becomes 1 only when both input A and input B are 1 otherwise is 0 Y A B 0 0 0 0 1 0 1 0 0 1 1 1 Logical sum OR Becomes 0 only when both input A and input B are 0 otherwise is 1 Y A B 0 0 0 0 1 1 1 0 1 1 1 1 Exclusive OR XOR Becomes 0 if input A and input B are equal otherwise is 1 Y A B A B 0 0 0 0 1 1 1 0 1 1 1 0 NON exclusive logical sum XNR Becomes 1...

Page 308: ...d by and stores the results at the device designated by 2 When bit devices are designated the bit devices below the points designated as digits are regarded as 0 in the operation See Program Example 2 Operation Error 1 There is no operation error in the WAND P or DAND P instruction 7 1 1 WAND WANDP Logical products with 16 bit data DAND DANDP Logical products with 32 bit data 7 1 1 WAND WANDP DAND...

Page 309: ... data is stored BIN 16 32 bits Head number of the devices where the logical product operation result will be stored BIN 16 32 bits Function Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Step Instruction Device 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 b15 b8 b0 b7 b0 b7 b15 b8 AND 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 b0 b7 b15 b8 D10 BCD1234 HFF...

Page 310: ...ion are regarded as 0 in the operation See Program Example 3 Operation Error 1 There is no operation error in the WAND P or DAND P instruction Program Example 1 The following program performs a logical product operation on the data from X10 to X1B and the data at D33 when XA is ON and stores the results at D40 Ladder Mode List Mode Operation S1 S2 D 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 1 0 0 1 0 ...

Page 311: ...and outputs the results to from Y10 to Y2B Ladder Mode List Mode Operation Step Instruction Device 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 M15 M8 M0 M7 b0 b7 b15 b8 b8 AND 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 b0 b7 b15 D10 D20 M3 M4 M11 M12 Not changed Step Instruction Device 1 H FF0FFFFF 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 b31 b16 b0 b15 1 Y2B to Y10 1...

Page 312: ...KAND BKANDP Block logical products 7 1 2 BKAND BKANDP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 1 1 n Basic Process High performance Redundant Universal LCPU Command Command BKANDP n n BKAND BKAND BKANDP D S 1 S2 D S2 S 1 S1 S2 D S1 S2 D S1 D S2 D S1 S2 D AND b15 b8 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 b7 b0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1...

Page 313: ...specified in and The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and S2 b15 b8 0 0 1 1 0 0 1 1 0 0 0 0 0 0 1 1 b7 b0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 2 0 1 0 1 0 1 0 1 0 0 0 0 0 1 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 b15 b8 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 b7 b0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1...

Page 314: ...by and stores the results at the device designated by 2 For bit devices the bit devices after the points designated by digit specification are regarded as 0 in the operation Operation Error 1 There is no operation error in the WOR P or DOR P instruction 7 1 3 WOR WORP Logical sums of 16 bit data DOR DORP Logical sums of 32 bit data 7 1 3 WOR WORP DOR DORP Setting Data Internal Devices R ZR J U G Z...

Page 315: ... the 32 bit data from X0 to X1F and on the hexadecimal value FF00FF00H when XB is turned ON and stores the results at D66 and D67 Ladder Mode List Mode Operation Step Instruction Device 0 0 0 0 1 0 1 1 1 0 0 1 0 0 0 1 1 1 0 0 1 1 1 1 1 1 1 1 0 0 0 1 b15 b8 b0 b7 b0 b7 b15 b8 OR 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 b0 b7 b15 b8 D10 D20 D10 Step Instruction Device 1 1 1 1 0 0 0 1 1 1 0 0 0 0 b0 b15 b31 b...

Page 316: ...e designated by and the 32 bit data of the device designated by and stores the results at the device designated by 2 When bit devices are designated the bit devices below the points designated as digits are regarded as 0 in the operation See Program Example 2 Operation Error 1 There is no operation error in the WOR P or DOR P instruction Setting Data Internal Devices R ZR J U G Zn Constants K H Ot...

Page 317: ...e 24 bit data from X20 to X37 and stores the results at D23 and D24 when M8 is ON Ladder Mode List Mode Operation Step Instruction Device 1 1 1 1 1 0 0 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 1 0 0 1 1 Y38 Y30 Y37 b0 B7 b15 b8 OR D33 Y3B to Y30 Regarded as 0s 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 X10 X17 X1B to X10 X13 X18 X1B Y3B Y34Y33 X14 Not changed Step Instruction Device 0 0 0 0 0 0 0 1 0 0 1 0 0 ...

Page 318: ...R BKORP Block logical sum operations 7 1 4 BKOR BKORP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 1 1 n Basic Process High performance Redundant Universal LCPU Command Command BKORP n n BKOR BKOR BKORP D S 1 S2 D S2 S 1 S1 S2 D S1 S2 D S1 D S2 D S1 S2 D b15 b8 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 b7 b0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0...

Page 319: ...ecified in and The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and S2 1 2 1 2 D S1 S1 S1 D D D D S1 S1 S2 n b15 b8 0 0 0 0 1 1 b7 b0 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 0 0 1 1 1 1 1 1 1 1 1 1 b15 b8 0 0 1 1 1 1 0 0 1 1 0 0 0 0 1 1 b7 b0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 0 1 0 0 0 0 1 1 0...

Page 320: ...d stores the results at the device designated by 2 For bit devices the bit devices after the points designated by digit specification are regarded as 0 in the operation Operation Error 1 There is no operation error in the WXOR P or DXOR P instruction 7 1 5 WXOR WXORP 16 bit exclusive OR operations DXOR DXORP 32 bit exclusive OR operations 7 1 5 WXOR WXORP DXOR DXORP Setting Data Internal Devices R...

Page 321: ...g bits at D16 Ladder Mode List Mode Operation Remark See Page 356 Section 7 5 2 for more information on the DSUMP instruction Step Instruction Device 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0 b15 b8 b0 b7 b0 b7 b15 b8 XOR 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 b0 b7 b15 b8 D10 D20 D10 Step Instruction Device 0 D10 D9 1 1 1 1 0 0 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 0 1 1 0 1 0 1 1 0 1 b31 ...

Page 322: ...a of the device designated by and the 32 bit data of the device designated by and stores the results at the device designated by 2 For bit devices the bit devices after the points designated by digit specification are regarded as 0 in the operation Operation Error 1 There is no operation error in the WXOR P or DXOR P instruction Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit W...

Page 323: ...data at D20 and D21 and the data at D30 and D31 when X10 is turned ON and stores the results at D40 and D41 Ladder Mode List Mode Operation Step Instruction Device 1 1 1 1 0 0 1 1 0 0 1 1 1 0 0 1 0 1 1 0 0 1 1 0 0 1 1 0 1 1 0 0 Y38 Y30 Y37 b0 b7 b15 b8 XOR D33 Y3B to Y30 Regarded as 0s 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 X10 X17 X1B to X10 X13 X18 X1B Y3B Y34Y33 X14 Not changed Step Instruction Device...

Page 324: ...BKXORP Block exclusive OR operations 7 1 6 BKXOR BKXORP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 1 1 n Basic Process High performance Redundant Universal LCPU BKXOR Command Command BKXORP n n BKXOR BKXORP D S 1 S2 D S2 S 1 S1 S2 D S1 S2 D S1 D S2 D S1 S2 D b15 b8 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 b7 b0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1...

Page 325: ...pecified in n exceed those of the corresponding device specified in or The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and S2 n 1 2 1 2 D S1 S1 S1 D D D D S1 S1 S2 b15 b8 0 1 0 1 0 1 0 1 1 0 1 0...

Page 326: ...RP 32 bit data exclusive NOR operations 7 1 7 WXNR WXNRP DXNR DXNRP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word XOR b15 b8 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 b7 b0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 1 D201 D202 D200 b15 b8 0 0 0 0 0 0 0 0 b7 b0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1 D101 D102 D100 b15 b8 1 1 1 1 1 1 1 1 0 0 0 0...

Page 327: ...d from X30 to X3F with the bit patterns of the 16 bit data at D99 when XC is ON and stores the number of identical bit patterns at D7 Ladder Mode List Mode Operation 2 The following program compares the bit patterns of the 32 bit data located from X20 to X3F with the bit patterns of the data at D16 and D17 when X6 is ON and stores the number of identical bit patterns at D18 Ladder Mode List Mode D...

Page 328: ...e points designated by digit specification are regarded as 0 in the operation Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 D17 D16 1 0 0 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 1 1 0 0 1 0 0 1 1 0 1 1 b31 b16 b0 b15 1 D17 D16 0 1 0 1 1 0 0 1 1 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 1 X3F X30 X20 X2F 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X...

Page 329: ...lusive NOR operation on the 16 bit data from X30 to X3F and the data at D99 when X0 is turned ON and stores the results to D7 Ladder Mode List Mode Operation 2 The following program performs an exclusive NOR operation on the 32 bit data at D20 and D21 and the data at D10 and D11 when X10 is turned ON and stores the result to D40 and D41 Ladder Mode List Mode S1 S2 D S1 S2 0 1 0 1 0 1 0 1 0 1 0 1 0...

Page 330: ...ices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 1 1 n 0 1 1 0 0 1 0 1 1 0 1 1 0 0 b0 b15 b31 b16 XNR 0 1 0 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 0 0 0 1 1 0 1 1 0 b31 b16 b0 b15 1 1 1 D21 D20 D11 D10 D41 D40 b0 b15 b31 b16 D S S D S S Basic Process High performance Redundant Universal LCPU BKXNRP BKXNR Command Command BKXNRP n n BKXNR D S 1 S2 D S2 S 1 S1 S2 D S1 S2 D S1 D S2 D S1 S2 D XNR b1...

Page 331: ...s specified in and The ranges of devices starting from the one specified in and overlap by n points except when the same device is specified in and S2 1 2 S1 S1 S1 S1 S1 S2 n b15 b8 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 b7 b0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 1 1 b15 b8 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 b7 b0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0...

Page 332: ...f n 16 is used for rotation For example when n 18 the contents are rotated two bits to the right since the remainder of 18 16 1 is 2 7 2 1 ROR RORP RCR RCRPRight rotation of 16 bit data 7 2 1 ROR RORP RCR RCRP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant Universal LCPU Command Command P D n D n ROR RCR RORP RCRP indica...

Page 333: ...P or RCR P instruction Program Example 1 The following program rotates the contents of D0 not including the carry flag 3 bits to the right when XC is turned ON Ladder Mode List Mode Operation D b7 b15 b8 b14 b13 b12 b11 b10 b9 b6 b5 b4 b3 b2 b1 b0 b7 b15 b8 b14 b13 b12 b11 b10 b9 b6 b5 b4 b3 b2 b1 b0 b7 b15 b8 b14 b13 b12 b11 b10 b9 b6 b5 b4 b3 b2 b1 b0 b7 b15 b8 b14 b13 b12 b11 b10 b9 b6 b5 b4 b3...

Page 334: ...1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 b15 b8 b0 b7 b0 b7 b15 b8 1 b14b13b12b11b10 b9 b6 b5 b4 b3 b2 b1 b14b13b12b11b10 b9 b6 b5 b4 b3 b2 b1 Carry flag SM700 Carry flag SM700 Contents of b1 and b0 before execution Contents of b15 to b4 before execution Content of b3 before execution Content of b2 before execution D0 D0 Content of carry flag SM700 ON OFF status of the carry flag depends on its status be...

Page 335: ...reater the remainder of n 16 is used for rotation For example when n 18 the data is rotated 2 bits to the left since the remainder of 18 16 1 is 2 7 2 2 ROL ROLP RCL RCLPLeft rotation of 16 bit data 7 2 2 ROL ROLP RCL RCLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant Universal LCPU Command Command P D n D n ROL RCL ROL...

Page 336: ...e 1 The following program rotates the contents of D0 not including the carry flag 3 bits to the left when XC is turned ON Ladder Mode List Mode Operation D 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 Carry flag SM700 D 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 D Value of carry flag Value of carry flag 0 Carry flag SM700 Left rotation 1 bit Left rotation 1 bit 1 0 0 Value of b15 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D Carry flag ...

Page 337: ...of 0 to 31 as n If the value specified as n is 32 or greater the remainder of n 32 is used for rotation For example when n 34 the contents are rotated two bits to the right since the remainder of 34 32 1 is 2 7 2 3 DROR DRORP DRCR Right rotation of 32 bit data DRCRP 7 2 3 DROR DRORP DRCR DRCRP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step Instruction Devi...

Page 338: ...ode List Mode Operation 2 The following program rotates the contents of D0 and D1 including the carry flag 4 bits to the right when XC is ON Ladder Mode List Mode Operation D b2 b16 b31 b17 b30b29b28b27 b18 b15b14 b5 b4 b3 Carry flag SM700 b1 b0 D D n bit rotation 1 D Step Instruction Device 0 D0 D1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 D0 D1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0...

Page 339: ...y including the carry flag n bits to the left The carry flag turns ON or OFF depending on its status prior to the execution of the DRCL instruction 2 When a bit device is designated for a rotation is performed within the device range specified by digit specification The number of bits by which a rotation is executed is the remainder of n specified number of bits For example when n 31 and specified...

Page 340: ...0 b15 b28b27 b24b23 b20b19 b12b11 b8 b7 b4 b3 Contents of b31 to b28 before execution Contents of b27 to b0 before execution 0 1 Carry flag SM700 Carry flag SM700 Content of b28 before execution b31 b16 b0 b15 b28b27 b24b23 b20b19 b12b11 b8 b7 b4 b3 Step Instruction Device 1 D0 D1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 D0 D1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 ...

Page 341: ... 0 to 15 as n If the value specified as n is 16 or greater the remainder of n 16 is used for a shift to the right For example when n 18 the data is shifted 2 bits to the right since the remainder of 18 16 1 is 2 7 3 1 SFR SFRP n bit shift to right of 16 bit data SFL SFLP n bit shift to left of 16 bit data 7 3 1 SFR SFRP SFL SFLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit W...

Page 342: ...or 1 There is no operation error in the SFR P or SFL P instruction Program Example 1 The following program shifts the data of D0 to the right by the number of bits designated by D100 when X20 is turned ON Ladder Mode List Mode Operation 2 The following program shifts the contents of X10 to X17 3 bits to the left when X1C is ON Ladder Mode List Mode D 1 1 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1...

Page 343: ...BSFR BSFRP 1 bit shift to right of n bit data BSFL BSFLP 1 bit shift to left of n bit data 7 3 2 BSFR BSFRP BSFL BSFLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n 0 0 1 1 0 0 1 1 1 0 0 1 1 0 0 0 X14X13 X13 X14 1 X17 X10 X17 X10 Carry flag SM700 Filled with 0s X12 Basic Process High performance Redundant Universal LCPU Command Command P D n D n BSFR BSFL BSFR...

Page 344: ...ode Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in D Step Instruction Device Designation range for the BSFRP instruction 1 1 1 0 1 0 1 1 0 0 1 1 1 1 0 1 0 1 0 1 1 0 0 1 M672M671 M671 M672 1 M678M677M676M675M674M673 M670M669M668M667 M678M677M676M675M674M673 M670M669M668M667 Carry flag SM700 Filled with 0s Step ...

Page 345: ... be 0 5 If the value specified by n1 or n2 is 0 the instruction will be not processed SFTBL P 1 This instruction shifts the n1 bits data in the devices starting from the device specified by to the left by n2 bits n1 10 n2 4 7 3 3 SFTBR SFTBRP n bit shift to right of n bit data SFTBL SFTBLP n bit shift to left of n bit data 7 3 3 SFTBR SFTBRP SFTBL SFTBLP QnU D H CPU QnUDE H CPU The serial number f...

Page 346: ...ror code is stored into SD0 Program Example 1 The following program shifts the data of Y10 to Y17 8 bits specified by to the right by 2 bits n2 when M0 is turned on Ladder Mode List Mode Operation 2 The following program shifts the data of Y21 to Y2C 12 bits specified by to the left by 5 bits n2 when M0 is turned on Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnP...

Page 347: ...is stored into SD0 7 3 4 DSFR DSFRP 1 word shift to right of n word data DSFL DSFLP 1 word shift to left of n word data 7 3 4 DSFR DSFRP DSFL DSFLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in Basic Process High pe...

Page 348: ... QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n1 n2 Step Instruction Device D686 D686 D689 D688 D687 D685 D684 D683 D689 D688 D687 D685 D684 D683 503 600 3802 5003 0 503 600 3802 Filled with 0 Designation range for the DSFRP instruction 32765 336 100 100 336 32765 Step Instruction Dev...

Page 349: ...rting from the lowest device are filled with 0s 3 If the value specified by n1 or n2 is 0 the instruction will be not processed 4 If the value of n2 is equal to or greater than the value of n1 the n1 words devices starting from the device specified by will be filled with 0s Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns on and an error code is st...

Page 350: ...ecified by to the left by 5 words n2 when M0 is turned on Ladder Mode List Mode Operation D Step Instruction Device 1FF 0 2A 7FF 10 4E 1FF 0 2A 7FF 10 4E 5F FF D10 D11 D12 D13 D14 D15 D16 D17 0 0 D10 D11 D12 D13 D14 D15 D16 D17 H H H H H H H H H H H H H H H H Filled with 0H D Step Instruction Device FF E 5 0 2A FF 3A 1 0 0 10 7FF D21 D22 D23 D24 D25 D26 D27 D28 D29 D2A D2B D2C 0 0 0 0 0 D21 D22 D2...

Page 351: ...ta Operation Error 1 There is no operation error in the BSET P or BRST P instruction 7 4 1 BSET BSETP Bit set for word devices BRST BRSTP Bit reset for word devices 7 4 1 BSET BSETP BRST BRSTP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant Universal LCPU Command Command P D n D n BSET BRST BSETP BRSTP indicates an instru...

Page 352: ...here bit data to be extracted is stored BIN 16 bits Location of the bit data to be extracted 0 to 15 TEST 0 to 31 DTEST BIN 16 32 bits Number of the bit device where the extracted data will be stored bits 7 4 2 TEST TESTP DTEST Bit tests DTESTP 7 4 2 TEST TESTP DTEST DTESTP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Resets b8 of D8 Sets b3 of D8 Step Instruct...

Page 353: ...s it to the bit device designated by 2 The bit device designated by is OFF when the relevant bit is 0 and ON when it is 1 3 The position designated by indicates the position of an individual bit in a 2 word data block 0 to 31 When 32 or more is designated at the target is the bit data at the position indicated by the remainder of n 32 For example when n 34 the target is the data at b2 since the re...

Page 354: ... Word Bit Word n Device Status Annunciator F Turns device n points from annunciator F number designated by OFF Deletes annunciator number turned OFF from SD64 to SD79 and compresses remaining data forward Stores number of annunciators stored from SD64 to SD79 at SD63 Timer T Counter C Sets the current value n points from timer T or counter c designated by C to 0 and turns coil contact OFF Bit devi...

Page 355: ...b2 of D10 to 1st bit b1 of D11 to 0 when X20 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in D Step Instruction Device Not changed 1 1 0 0 0 0 M0 M3 0 0 0 0 M8 M9 M4 M7 1 1 1 1 0 0 M0 M3 1 0 0 1 M8 M9 M4 M7 Step Instruction Device b15 b8 1 1 1 0 0 0 0 1 1 ...

Page 356: ... by 1 and the first matched device number in the relative number from is stored at the device designated by 2 No processing is conducted if n is 0 or a negative value 3 If no matches are found in the search the devices designated at and 1 become 0 7 5 1 SER SERP 16 bit data search DSER DSERP 32 bit data search 7 5 1 SER SERP DSER DSERP Setting Data Internal Devices R ZR J U G Zn Constants K H Othe...

Page 357: ...ts from the beginning of the data to be searched SM702 ON Binary search method Obtains the center value of the sorted array and decides if the obtained value is larger or smaller than the search value then chooses the area for search between the larger and smaller value divisions By repeating this process the area for search is narrowed down Operation Error 1 In any of the following cases an opera...

Page 358: ...ts 7 5 2 SUM SUMP 16 bit data check DSUM DSUMP 32 bit data check 7 5 2 SUM SUMP DSUM DSUMP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Step Instruction Device Data to be searched 123 Search data D0 123 122 123 300 500 32000 D103 D105 D101 D102 D100 D104 2 2 W1 Search results Position of match Number of matches W0 Step Instruction Device Data to be searched 567...

Page 359: ...Operation 2 The following program stores the number of bits which are ON in D100 and D101 into D0 when X10 is turned ON Ladder Mode List Mode S D b15 b8 1 1 0 0 1 0 1 1 0 0 1 1 0 0 0 1 b0 b7 b15 b8 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 b0 b7 Total number of bits where 1 is set Stores the total number of bits where 1 is set in BIN There are 8 bits where 1 is set in the example S D S D S D 1 0 0 1 1 1 0 0...

Page 360: ...ation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 5 3 DECO DECOP Decoding from 8 to 256 bits 7 5 3 DECO DECOP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value of n is other than 0 to 8 4101 The range 2...

Page 361: ...signated at between 1 and 8 3 If n 0 there will be no operation and the contents of will not change 4 Bit devices are treated as 1 bit and word devices as 16 bits 5 If more than 1 bit is at 1 processing will be conducted at the upper bit location 7 5 4 ENCO ENCOP Encoding from 256 to 8 bits 7 5 4 ENCO ENCOP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step In...

Page 362: ...bits of to 7 segment display data and stores at Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The vaue of n is other than 0 to 8 All data 2n bits from is 0 4101 The range 2n bits from exceeds the range of the corresponding device 7 5 5 SEG SEGP 7 segment decode 7 5 5 SEG SEGP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word S S Step Instruction...

Page 363: ... 0 0 0 0 0 1 1 0 2 0010 0 1 0 1 1 0 1 1 3 0011 0 1 0 0 1 1 1 1 4 0100 0 1 1 0 0 1 1 0 5 0101 0 1 1 0 1 1 0 1 6 0110 0 1 1 1 1 1 0 1 7 0111 0 0 1 0 0 1 1 1 8 1000 0 1 1 1 1 1 1 1 9 1001 0 1 1 0 1 1 1 1 A 1010 0 1 1 1 0 1 1 1 B 1011 0 1 1 1 1 1 0 0 C 1100 0 0 1 1 1 0 0 1 D 1101 0 1 0 1 1 1 1 0 E 1110 0 1 1 1 1 0 0 1 F 1111 0 1 1 1 0 0 0 1 Head number of bit device Lowest bit of word device D Y4F 0 0...

Page 364: ...wer 4 bits n points from the device designated by 2 The upper 12 bits n points from the device designated by become 0 3 The value of n can be designated at between 1 and 4 4 If n 0 there will be no processing and the contents n points from will not change 7 5 6 DIS DISP 4 bit dissociation of 16 bit data 7 5 6 DIS DISP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Wor...

Page 365: ...nks 1 to 4 0 No processing BIN 16 bits Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value of n is other than 0 to 4 4101 The range n points from exceeds the range of the corresponding device 7 5 7 UNI UNIP 4 bit linking of 16 bit data 7 5 7 UNI UNIP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n D Step Instruction Device b15 0 0 0 0 0 ...

Page 366: ...or code is stored into SD0 Program Example 1 The following program links the lower 4 bits of D0 to D2 when X0 is ON and stores them at D10 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value of n is other than 0 to 4 4101 The range n points from exceeds the range of the corresponding device S D b0 b3 b7 b4 b11 b8 b12 b15 b4 b15 b0 b3 Ignored...

Page 367: ...ated data to end range of If overlapped the correct operation result may not be obtained 5 Do not specify the same device number for and If the same device is specified for and the operation does not work correctly 7 5 8 NDIS NDISP Dissociation of random data NUNI NUNIP Linking of random data 7 5 8 NDIS NDISP NUNI NUNIP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word ...

Page 368: ...lowing cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The number of bits dissociated or linked specified by has not been set within the range from 1 to 16 bits 4101 The device number of the device specified by or based on the number of bits dissociated or linked specified by is grea...

Page 369: ...lowing program links the lower 4 bits of data from D10 the lower 3 bits of data from D11 and the lower 6 bits of data from D12 and stores at D0 Ladder Mode List Mode Step Instruction Device 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 1 0 1 1 0 0 0 1 1 1 1 0 0 b4b3 b0 Filled with 0s b7 b12 b3 b0 D10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Filled with 0s b2 b0 D11 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 Filled with 0s D1...

Page 370: ...Other Bit Word Bit Word n 0 0 0 1 0 1 1 0 0 1 0 1 1 1 0 0 Filled with 0s D0 The data in these bits is ignored 6 bits 3 bits 4 bits 0 0 0 1 0 1 1 0 0 1 1 0 1 1 0 0 b3 b0 0 1 0 1 1 1 1 0 1 0 0 0 1 1 0 1 b7 b12 0 0 1 1 1 0 1 1 0 0 1 0 1 1 0 0 b5 b0 b2 b0 D12 D11 D10 b4 b6 b3 b0 Basic Process High performance Redundant Universal LCPU n n WTOB BTOW WTOBP BTOWP D D Command Command S S P indicates an ins...

Page 371: ...gnated by and the range of the devices to store the linked data designated by 3 No processing will be conducted when the number of bytes designated by n is 0 4 The upper 8 bits of the byte storage device designated by are ignored and the lower 8 bits are used 5 Linking is correctly processed even when the device range to n 1 where the data to be linked is stored overlaps with the device range to 1...

Page 372: ...lt at D10 to D12 when X0 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The range of the values in n exceeds that of the device specified by The range of the values in n exceeds that of the device specified by S D Step Instruction Device 58H FDH E2H 57H 44H 34H D11 D12 58H 00H FDH 00H E2H 00H 57H 00H 34H 00H 44H 00H D21 D22 D23 D25 D...

Page 373: ... for the maximum value and stores the searched maximum value at the device designated by and 1 Starts the search from the device designated by and stores the location specified in the number of points counted from of the device where the maximum value is found first at 2 and stores the number of the found minimum values at 3 7 5 10 MAX MAXP Maximum value search for 16 bit data DMAX DMAXP Maximum v...

Page 374: ...0 to D7 and stores it at D100 to D103 when X20 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in 4101 The device specified by in exceeds the range of the corresponding device S D Step Instruction Device 679 BIN 4321 BIN D100 5432 BIN 4444 BIN 5000 BIN D101 D...

Page 375: ...vice designated by for the minimum value and stores searched minimum value at the devices designated by and 1 Starts the search from the device designated by and stores the location specified in the number of points counted from of the device where the minimum value is found first at 2 and stores the number of the found minimum values at 3 7 5 11 MIN MINP Minimum value search for 16 bit data DMIN ...

Page 376: ... data contained from D0 to D7 and stores it from D100 to D103 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in 4101 The device specified in exceeds the range of the corresponding device S D Step Instruction Device 5542 BIN 5857 BIN 4590 BIN 4450 BIN R0 R1 R2 R3 D150 D15...

Page 377: ... the amount of time per scan is lengthened 3 The maximum number of executions until completion of the sort should be calculated according to the following equation The maximum number of executions until completion n n 1 2 times executed When n 10 the number of executions is obtained as 10 10 1 2 45 times executed If 2 then the number of scans until the completion of sort is calculated as 45 2 22 5...

Page 378: ...xecutions until completion of the sort should be calculated according to the following equation The maximum number of executions until completion n n 1 2 times executed When n 10 the number of executions is obtained as 10 10 1 2 45 times executed If S2 2 then the number of scans until the completion of sort is calculated as 45 2 22 5 23 scans 4 The device designated by the completion device is tur...

Page 379: ...ding descending order when X10 is turned ON Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 is 0 or a negative value 4101 The range from S1 to S1 n 2 n including S1 overlaps the range from D2 to D2 1 4101 For the SORT P instruction the range of the device specified by exceeds the range from S1 to S1 n including S1 4101 For the DSORT P instruction the range ...

Page 380: ...als for 16 bit data 7 5 13 WSUM WSUMP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in Data before sort 1 99999 1111 5000 456789 D3 D2 D5 D4 D7 D6 D9 D8 D1 D0 Data after sort 5000 456789 1111 1 99999 D3 D2 D5 D4 D7 D6 ...

Page 381: ...tored in n points of devices starting from the one designated by and stores the result to 4 points of devices 4 words starting from the one designated by 7 5 14 DWSUM DWSUMP Calculation of totals for 32 bit data 7 5 14 DWSUM DWSUMP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step Instruction Device 4500 BIN D10 2500 BIN 3276 BIN 6780 BIN 14948 BIN D11 D12 D1...

Page 382: ...es the result at D10 and D13 when X20 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The points specified in n exceed those of the corresponding device specified in 4101 The device specified in exceeds the range of the corresponding device S D Step Instruction Device 11245600 BIN D101 D100 27543200 BIN 558800 BIN 15675000 BIN 2367260...

Page 383: ...nto the device specified by 2 If the value calculated is not integer this instruction will drop the number of decimal places 3 If the value specified by n is 0 the instruction will be not processed Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns on and an error code is stored into SD0 7 5 15 MEAN MEANP Calculation of averages for 16 bit data DMEAN...

Page 384: ...d on Ladder Mode List Mode Operation 2 The following program stores the average value of 32 bit data stored from D0 to D5 into D10 and D11 when M0 is turned on Ladder Mode List Mode Operation Step Instruction Device BIN BIN BIN D1 D10 D0 D2 550 BIN 105 555 990 Step Instruction Device BIN BIN BIN D11 D10 D1 D0 D3 D2 D5 D4 2101176 BIN 623541 4753647 926342 ...

Page 385: ...If it is designated from 32768 to 0 the processing which is executed when n 1 will be performed 3 If you do not desire to execute the processing called for within the FOR to NEXT loop use the CJ or SCJ instruction to jump 4 FOR instructions can be nested up to 16 deep 7 6 1 FOR NEXT FOR to NEXT instruction loop 7 6 1 FOR NEXT Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word...

Page 386: ...m between the FOR and NEXT instructions Note however that rise and fall instructions are not available on the operation output side Refer to Page 137 Section 5 2 5 for details of the EGP EGF instruction The program samples are shown below 3 Branching into a FOR to NEXT loop using a JMP or other branch instruction from the outside of the FOR to NEXT loop is not possible Error code Error details Q00...

Page 387: ...e level of nesting When an end is forced to the multiple nesting levels execute the same number of BREAK instructions for the nesting levels Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 6 2 BREAK BREAKP Forced end of FOR to NEXT instruction loop 7 6 2 BREAK BREAKP Setting Data Internal Devices R ZR J U ...

Page 388: ... a subroutine program Device name to Number of the device to be passed as an argument to a subroutine program bits BIN 16 bits BIN 32 bits 7 6 3 CALL CALLP Subroutine program calls 7 6 3 CALL CALLP Setting Data Internal Devices R ZR J U G Zn Constants K H Other P Bit Word Bit Word Pn to Other than F Step Instruction Device Basic Process High performance Redundant Universal LCPU Command Command Com...

Page 389: ...fied in the argument The device specified as a function device should be secured for the data size An error will occur if it cannot be secured for the data size 1 An error will not occur even when the device number specified by to is not a multiple of 16 at the digit designation of the bit device Main routine program 3 to can be used with the CALL P instruction The CALL P instruction can execute s...

Page 390: ...the operation performed when D0 is specified for FD0 in the subroutine program and D1 is used in the subroutine program Program example Operation performed after subroutine program execution 1 Stores the execution result of the subroutine program 2 Replaced by the value of the function device 3 D1 does not reflect the value of the function device Correct operation example The following example sho...

Page 391: ...ed into SD0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The device specified for the argument cannot be secured for the data size 4210 There is no subroutine program for the pointer specified in the CALL P instruction 4211 After the CALL P instruction was executed the END FEND GOEND or STOP instruction was executed prior to the RET instruction 4212 The RET instruction was ex...

Page 392: ...is executed returns to the step following the CALL P FCALL P ECALL P EFCALL P or XCALL instruction which called the subroutine program 7 6 4 RET Return from subroutine programs 7 6 4 RET Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device Basic Process High performance Redundant Universal LCPU RET RET Main routine program CALL Pn END Subroutine pro...

Page 393: ...U 4211 After the CALL P FCALL P ECALL P EFCALL P or XCALL instruction was executed an END FEND GOEND or STOP instruction was excected prior to the RET instruction 4212 The RET instruction was executed prior to the CALL P FCALL P ECALL P EFCALL P or XCALL instruction 7 6 5 FCALL FCALLP Subroutine program output OFF calls 7 6 5 FCALL FCALLP Setting Data Internal Devices R ZR J U G Zn Constants Other...

Page 394: ...nction with the CALL P instruction non execution processing of a subroutine program is not performed even if the execution command is turned OFF Therefore output status of the individual coil instructions remains unchanged OUT instruction Forced OFF SET instruction Maintains status RST instruction SFT instruction Basic instructions Application instructions PLS instruction Processing identical to w...

Page 395: ...hould be secured for the data size An error will occur if it cannot be secured for the data size 1 An error will not occur if the device number specified by to is not a multiple of 16 at the digit designation of the bit device Main routine program 5 The FCALL P instruction can use from to 6 Up to 16 nesting levels are possible with the FCALL P instruction However this 16 levels is the total number...

Page 396: ...e Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The device specified for the argument cannot be secured for the data size 4210 The subroutine program of the pointer designated by the FCALL P instruction does not exist 4211 After the CALL P instruction was executed the END FEND GOEND or STOP instruction was executed prior to the RET instruction 4212 The RET instructio...

Page 397: ... from a different program file 2 Only the file name of a program file stored in the drive 0 program memory internal RAM can be designated for a file name 3 It is not necessary to designate the extension QPG with the file name Only QPG files will be acted on 7 6 6 ECALL ECALLP Subroutine calls between program files 7 6 6 ECALL ECALLP Setting Data Internal Devices R ZR J U G Zn Constants Other P Bit...

Page 398: ...ize An error will occur if it cannot be secured for the data size 1 An error will not occur even when the device number specified by to is not a multiple of 16 at the digit designation of the bit device Main routine program 5 From to can be used by the ECALL instruction 6 The device used in the argument of the ECALL instruction should not be used in a subroutine program If used it will not be poss...

Page 399: ...of the function device Correct operation example The following example shows the operation performed when D0 is specified for FD0 in the subroutine program and D4 is used in the subroutine program Program example D0 D3 D2 D1 0 Indefinite Indefinite Indefinite Indefinite 1000 100 10 D0 D3 D2 D1 0 1000 100 10 0 1000 100 10 Immediately after the execution of ECALL instruction Transfer D0 D3 D2 D1 33 ...

Page 400: ...D0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2410 The specified file does not exist 2411 The specified file cannot be executed 4101 The device specified for the argument cannot be secured for the data size 4210 The subroutine program of the pointer specified by the ECALL P instruction does not exist 4211 After the ECALL P instruction was executed the END FEND GOEND or STOP inst...

Page 401: ...o be passed as an argument to a subroutine program bits BIN 16 bits BIN 32 bits 7 6 7 EFCALL EFCALLP Subroutine output OFF calls between program files 7 6 7 EFCALL EFCALLP Setting Data Internal Devices R ZR J U G Zn Constants Other P Bit Word Bit Word K H File name Pn to Other than F MAIN Step Instruction Device A LINE Step Instruction Device Process High performance Redundant Universal LCPU Basic...

Page 402: ...uction is used in combination with the ECALL P instruction The EFCALL P can also be used to call a subroutine program that uses a local pointer from a different program file OUT instruction Forced OFF SET instruction Maintains status RST instruction SFT instruction Basic instructions Application instructions PLS instruction Processing identical to when condition contacts are OFF Pulse generation i...

Page 403: ...ion is not used in conjunction with the ECALL P instruction non execution processing of a subroutine program is not performed even if the execution command is turned OFF Therefore output status of the individual coil instructions remains unchanged 4 Only the file name of a program file stored in the drive 0 program memory internal RAM can be designated for a file name 5 It is not necessary to desi...

Page 404: ... be secured for the data size 1 An error will not occur even when the device number specified by to is not a multiple of 16 at the digit designation of the bit device Main routine program 7 to can be used with the EFCALL P instruction 8 The number of function devices used by subroutine programs must be identical to the number of arguments used by the EFCALL P instruction Further the function devic...

Page 405: ...cution processing when X20 is turned from ON to OFF Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2411 The specified file cannot be executed 4101 The device specified for the argument cannot be secured for the data size 4210 The subroutine program of the pointer specified by the ECALL P instruction does not exist 4211 After the EFCALL P instruction was execute...

Page 406: ...2 Operation of XCALL instruction varies according to the CPU module type The following program example shows the operation of XCALL instruction for each CPU module Program example 7 6 8 XCALL Subroutine program calls 7 6 8 XCALL Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other P Bit Word Bit Word P to Other than ...

Page 407: ...nce model QCPU serial No of first 5 digits 06081 or earlier 1 When X0 is turned ON Without process Do not execute subroutine program of P1 2 During X0 is ON Execute subroutine program of P1 3 When X0 is turned OFF Perform Non execution processing of subroutine program of P1 High performance model QCPU serial No of first 5 digits 06082 or later Process CPU serial No of first 5 digits 07032 or later...

Page 408: ... The processing to be executed when D1 is used in a subroutine program with D0 designated for FD0 in a subroutine program is shown below Program example Operation performed after subroutine program execution 1 Stores the execution result of the subroutine program 2 Replaced by the value of the function device D1 does not reflect the operation result in the subroutine program Occupies from D0 to D3...

Page 409: ... CPU of serial No 07032 or later Redundant CPU Universal model QCPU LCPU Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The device specified for the argument cannot be secured for the data size 4210 There is no subroutine program for the pointer specified in the XCALL P instruction 4211 After the XCALL P instruction was executed the END FEND GOEND or STOP instruction was execut...

Page 410: ...ding link refreshes at the END processing However the low speed cyclic refresh of MELSECNET 10 or MELSECNET H is not performed 4 The COM instruction can be used in a sequence program any number of times Note however that the scan time of the sequence program will increase by the time taken for communication with external devices and auto refresh including link refresh of intelligent function modul...

Page 411: ...rograms Interrupt programs Fixed scan execution type programs Operation Error 1 There is no operation error in the COM instruction Refer to Page 407 Section 7 6 9 for the COM instruction of the following CPU modules Basic model QCPU of serial No 04121 or later High Performance model QCPU of serial No 04011 or later Process CPU of serial No 07031 or later 7 6 10 COM Select refresh 7 6 10 COM Basic ...

Page 412: ...CPU system Reading input output data of all modules other than the multiple CPU system group Auto refresh using the multiple CPU high speed transmission area of multiple CPU system Communication with display unit Service processing communication with programming tool GOT or other external devices Processing item QCPU LCPU When SM775 is OFF When SM775 is ON When SM775 is OFF When SM775 is ON I O re...

Page 413: ... SD778 C000H Bit of SD778 Executed Not Executed b0 to b6 1 0 b15 0 1 Bit of SD778 Executed Not Executed b0 b1 b3 b6 b14 1 0 b15 0 1 b15 b0 b1 b2 b3 b4 b5 b6 b14 to CC Link IE Controller Network MELSECNET H refresh 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 SD778 Auto refresh of intelligent function module Auto refresh using QCPU standard area of multiple CPU system Reading inputs outputs from the outside of th...

Page 414: ... cannot be used are shown below Low speed execution type programs Interrupt programs Fixed scan execution type programs 2 For the redundant CPU there are restrictions on use of the COM instruction Refer to the manual below for details QnPRHCPU User s Manual Redundant System Operation Error 1 There is no operation error in the COM instruction Function See Page 409 Section 7 6 10 for details about f...

Page 415: ...ation of entire ladder 7 6 12 IX IXEND Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device Universal LCPU Basic Process High performance Redundant I XEND IX IX IXEND S Ladder where index modification is performed S S 2 3 4 5 6 7 1 8 9 10 11 Z8 Z9 Z10 Z11 Z12 Z13 Z14 Z15 12 13 14 15 S S S S S S S S S S S S S S S S Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z7 Device name...

Page 416: ... function software package The index register should be added to the index modification ladder established with the IX and IXEND instructions 2 2 The value of Zn is returned to the previous Zn value before the execution of the IX instruction after the IXEND instruction has been executed 1 When using the IX and IXEND instructions in both a normal sequence program and an interrupt sequence program e...

Page 417: ...fter the IX instruction was executed the END FEND GOEND or STOP instruction was executed prior to the IXEND instruction Sets modification value Changes modification value Ladder which executes index modification Step Instruction Device Modification value Modification value of Y Modification value of C Modification value of X Modification value of T Modification value of M Modification value of L M...

Page 418: ...model QCPU the devices R U G J ZR and P cannot be used 2 Devices following J designate B W X or Y and the offset value is also set in correspondence with this 3 When using a basic model QCPU specify a dummy device number is P 6 If two offsets for two identical types of device have been set in the offset designation area the last value set will be valid 7 The IXDEV and IXSET instructions should be ...

Page 419: ...ollowing program changes the modification values for input X output Y data register D and pointer P When using a basic model QCPU the devices R U G J ZR and P cannot be used Ladder Mode List Mode 4 Refer to Page 413 Section 7 6 12 for index modification using the IX to IXEND instructions Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4231 The IXDEV and IXSET instructions are not use...

Page 420: ...lled by the user See Program Example 2 Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 7 1 FIFW FIFWP Writing data to the data table 7 7 1 FIFW FIFWP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The data table r...

Page 421: ... from the table will be stored BIN 16 bits Head number of the table BIN 16 bits 7 7 2 FIFR FIFRP Reading oldest data from tables 7 7 2 FIFR FIFRP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device R1 R2 R3 R4 Table 123 55 4 4321 11 257 R5 R0 R1 R2 R3 R4 Table 123 55 5 4321 11 R5 R0 D0 Data table range 257 Number of stored data blocks 0 Step Instru...

Page 422: ...es the R1 data from the table R0 to R7 at D0 when X10 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The FIFR instruction was executed when the value of was 0 4101 The data table range exceeded the range of the corresponding device at the execution of the FIFR instruction D D S 1 2 Data table Number of stored data blocks 5432 1234 3 ...

Page 423: ...n the value stored at is 0 See Program Example 1 7 7 3 FPOP FPOPP Reading newest data from data tables 7 7 3 FPOP FPOPP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device 123 1000 0 1234 55 4 0 D42 D41 D43 D39 D40 D38 D44 0 D45 4444 D0 123 1000 4444 1234 55 5 0 D42 D41 D43 D39 D40 D38 D44 0 D45 0 55 4 0 D42 D41 D43 D39 D40 D38 D44 0 D45 1234 R0 10...

Page 424: ...J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The FPOP instruction was executed when the value of was 0 4101 The data table range exceeded the range of the corresponding device at the execution of the FPOP instruction D Step Instruction Device R1 R2 R3 R4 Data table 123 1400 5 1234 5432 0 3000 R5 0 R6 R7 R0 R1 R2 R3 R4 Data table 123 1400 4 1234 5432 0 R5 0 R6 R7 R0 D0 0 3000 Stores 0 Step Instruction De...

Page 425: ... the data table designated by After the execution of the FINS instruction the data in the table following the inserted block is all dropped one position 7 7 4 FDEL FDELP Deletion of data from data tables FINS FINSP Insertion of data in data tables 7 7 4 FDEL FDELP FINS FINSP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant...

Page 426: ...ction was executed when the value of was 0 4101 The Nth position from is larger than the number of data storage at the execution of the FDEL instruction The Nth position from is larger than the number of data storage 1 at the execution of the FINS instruction The value of n in the case of the FDEL FINS instruction exceeds the device range of the table The data table range exceededs the range of th...

Page 427: ...owing program inserts the data at D0 into the third position at the table R0 to R7 when X10 is turned ON Ladder Mode List Mode Operation Step Instruction Device R1 R2 R3 R4 Data table 1234 4444 4 123 5000 0 3210 R5 0 X10 ON 0 R6 R7 R0 R1 R2 R3 R4 Data table 1234 4444 5 3210 123 0 R5 0 R6 R7 R0 D0 Data table range 5000 ...

Page 428: ... data into the area starting from the device designated by Data read from intelligent function modules is also possible with the use of an intelligent function module device For the intelligent function module device refer to the QnUCPU User s Manual Function Explanation Program Fundamentals or Qn H QnPH QnPRHCPU User s Manual Function Explanation Program Fundamentals 7 8 1 FROM FROMP Reading 1 wo...

Page 429: ...QD75P4 at I O numbers 040 to 05F to D0 and D1 when X0 is turned on reads data by two words from the buffer memory address 800 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 1402 An error has been detected in an intelligent function module at the execution of the instruction 1412 There has been no exchange of signals with an intelligent function module at the ex...

Page 430: ...elligent function module DTO DTOP Writing 2 word data to the intelligent function module 7 8 2 TO TOP DTO DTOP Setting Data Internal Devices R ZR J U G Zn Constants K H Other U Bit Word Bit Word n1 n2 n3 Power supply module CPU QX10 QX10 QX10 QX10 Q68 ADV QY41 P QY10 QY10 0000H 0010H 0020H 0030H 0040H 0050H 0070H 0080H Specify K4 or H4 as the head I O number to be read Head I O number configured i...

Page 431: ...ated to to the area of n3 2 words starting from the specified buffer memory can be designated in the following range 2147483648 to 2147483647 or 0H to FFFFFFFFH Data write to intelligent function modules is also possible with the use of an intelligent function module device For the intelligent function module device refer to the QnUCPU User s Manual Function Explanation Program Fundamentals or Qn ...

Page 432: ...he QD75P4 at I O numbers 040 to 05F when X0 is turned on writes 0 to the buffer memory addresses 2006 and 2007 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 1402 An error has been detected in an intelligent function module at the execution of the instruction 1412 There has been no exchange of signals with an intelligent function module at the execution of the ...

Page 433: ...Power supply module CPU QX10 QX10 QX10 QX10 Q68 ADV QY41 P QY10 QY10 0000H 0010H 0020H 0030H 0040H 0050H 0070H 0080H Specify K4 or H4 as the head I O number to be written Head I O number configured in the I O assignment setting Power supply module CPU Built in I 0 Built in CC Link LX40 C6 LX40 C6 LX40 C6 L60 AD4 LY41 NT1P LY10 R2 LY10 R2 LY10 R2 0000H 0010H 0030H 0040H 0050H 0060H 0070H 0090H 00A0...

Page 434: ...haracters 8 points 16 characters from the device designated by will be the target of the operation 7 9 1 PR Print ASCII code 7 9 1 PR Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word 1 Only Y Basic Redundant Universal LCPU Process High performance PR D Command PR S S D S D S D S 1 41 H A 42 H B 43 H C 44 H D 2 45 H E 46 H F 47 H G 48 H H 3 4BH K 4CH L 4DH M 4EH N 4FH O...

Page 435: ...ructions can be used multiple times but it is preferable to establish an interlock with the PR instruction execution flag 9 device so that they will not be ON simultaneously 7 If the contents of the device in which ASCII codes are stored changes during the ASCII code output the modified data after change will be output Operation Error 1 In the following case an operation error occurs the error fla...

Page 436: ...al Devices R ZR J U G Zn Constants Other P I J U Bit Word Bit Word Only Y When X0 turns ON converts ABCDEFGHIJKLMOP to the ASCII code and stores it to D to D7 When X3 turns ON outputs the ASCII code in D0 to D7 to Y14 to Y1D Step Instruction Device Y14 Y1B PR instruction in execution flag Y1D Strobe signal Y1C ASCII code 10 ms 10 ms PR instruction 10 ms 41H 42H 50H A B P 10 ms OFF ON OFF PR instru...

Page 437: ... ASCII code output Strobe signal output Flag indicating PRC instruction in execution Output Y Head of output Y30 X1 PRC Comment at X1 Sequence program Y30 Y37 Y38 Y39 Used as interlock Printer or display device Y38 Strobe signal Y30 to Y37 10 ms 10 ms 41H 42H 4EH A B n OFF ON Y39 OFF 30ms x 16 480 ms 43H 4FH O C 10 ms 30 ms ON OFF ON PRC SM721 SM720 OFF OFF ON ON Preprocessing several scans Flag i...

Page 438: ...will not be performed 7 When a comment is read SM720 turns ON for one scan after the instruction is completed SM721 turns ON during the execution of the instruction The PRC instruction cannot be executed while SM721 is ON If the attempt is made no processing is performed 1 For device comments used with the PRC instruction use comment files stored in the standard ROM or memory card Comment files st...

Page 439: ...error is generated If the LEDR instruction is executed after the battery has been replaced the BAT ARM BAT LED at the front of the CPU module and the error display will be reset SM51 is also turned OFF at this time 2 Operations when an annunciator F is ON a When the CPU module has no LED display The following operations will be conducted when the LEDR instruction is executed 1 USER LED flickers an...

Page 440: ... are compressed forwards 4 The data newly stored at SD64 is transmitted to SD62 5 The data at SD63 is decremented by 1 However if SD63 is 0 it remains 0 6 The F number being stored at SD62 is displayed at the LED display However if the value of SD63 is 0 nothing will be displayed Decrements 1 Before execution 200 1 200 0 0 0 0 0 SD62 SD63 SD64 SD65 SD66 SD67 SD78 SD79 After execution 0 0 0 0 0 0 0...

Page 441: ...E PASS FAIL SNTP OPE ERROR Operation Errors Link parameter error QCPU only SFC instruction operation error QCPU only SFC program execution error QCPU only Remote password error LCPU only SNTP error LCPU only 4 4 ICM OPE ERROR FILE OPE ERROR EXTEND INST ERROR OPE MODE DIFF CAN T EXE MODE TRK TRANS ERR TRK SIZE ERROR TRK DISCONNECT FLASH ROM ERROR Memory card operation error File access error Extend...

Page 442: ...e The error code 9010 will be returned if a failure is detected The contact number where the failure was discovered is stored at the upper 3 digits of SD80 see Page 442 Section 7 10 1 3 and the coil number where the failure was detected see Page 442 Section 7 10 1 2 is stored at the lower 1 digit of SD80 7 10 1 CHKST CHK Special format failure check 7 10 1 CHKST CHK Setting Data Internal Devices R...

Page 443: ...ct edge 2 Controls for the advance edge detection sensor contact number X and output with the identical number Y 1 are as follows When advance operation is in progress turn ON When retract operation is in progress turn OFF 1 Output Y is treated as an internal relay and cannot be output to an external device Advance operation M Retract operation Y50 Y51 Advance command X4 Retract command X5 Advance...

Page 444: ...eing executed Can be used only one place in a single program file An error will be returned if the CHK instruction is used exceeding the number of uses specified above Error code 4235 SM80 SET MOV Failure No 6 SD80 Y X Coil No 6 CHK CHKST TO SM80 X X X 1 Y X 1 Y SM80 SET SET MOV Failure No 1 SD80 MOV Failure No 2 SD80 SM80 SET MOV Failure No 3 SD80 X Y Detection by both advance and retraction end ...

Page 445: ...1 The CHK instruction will be completed when a check has been made through contact No n of coil No 6 9 If more than one failure is detected the number of the first failure detected will be stored Failure numbers detected after this will be ignored 10 The CHK instruction cannot be used by a low speed execution type program If a low speed execution type program has been set in a program file contain...

Page 446: ...ex modification Z0 a The device numbers indicated at check conditions X2 and X8 in the figure below will assume index modification values for the individual device numbers with the exception of annunciators F described in the ladder patterns X10 in the in the figure below would be as follows However the order in which failure detection is executed differs depending on whether SM710 is ON or OFF 7 ...

Page 447: ...comparative operation instructions Coil OUT F d The following devices can be used for ladder pattern contacts Input X Output Y e Only annunciators F can be used in ladder pattern coils However since annunciators F are used as a dummy any value can be set for an annunciator F Further they can overlap with no difficulties f ON OFF controls can be performed without error if an annunciator F used duri...

Page 448: ...eed execution type program an operation error will occur and the High Performance model QCPU Process CPU Redundant CPU operation will be suspended Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4230 The CHKEND instruction is not executed after th...

Page 449: ...ored for the leading zeros of effective digits Zero suppression is conducted c The storage of data at devices specified by 3 differs depending on the ON OFF status of SM701 output number of characters conversion signal When SM701 is OFF Stores 0 When SM701 is ON Does not change 7 11 1 BINDA BINDAP Conversion from BIN 16 bit data to decimal ASCII DBINDA DBINDAP Conversion from BIN 32 bit data to de...

Page 450: ... 20H Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following example program uses the PR instruction to output the 16 bit BIN data W0 value by decimal to Y40 to Y48 as ASCII Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The range of the device specif...

Page 451: ...nverted to ASCII BIN 16 32 bits Head number of the devices where the conversion result will be stored character string 7 11 2 BINHA BINHAP Conversion from BIN 16 bit data to hexadecimal ASCII DBINHA DBINHAP Conversion from BIN 32 bit data to hexadecimal ASCII 7 11 2 BINHA BINHAP DBINHA DBINHAP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word D1 D2 D3 20H space 20H ...

Page 452: ...5EH has been designated by it would be stored following in the following manner 2 The BIN data designated by can be in the range from 0H to FFFFFFFFH 3 The operation results stored at are processed as 8 digit hexadecimal values For this reason zeros which are significant digits on the left side of the value are processed as 0 No zero suppression is conducted 4 The data to be stored at the device d...

Page 453: ...e until 00H is encountered 2 The following program uses the PR instruction to output the hexadecimal value of the 32 bit BIN data at W10 and W11 to Y40 to Y48 Ladder Mode List Mode Operation Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON Because SM701 is OFF The PR instruction will output ASCII code until 00H is encountered Error code Error details Q00J Q00 Q01 QnH...

Page 454: ... 2 differs depending on the ON OFF status of SM701 number of characters to output select signal When SM701 is OFF Stores 0 When SM701 is ON Does not change 7 11 3 BCDDA BCDDAP Conversion from BCD 4 digit data to decimal ASCII data DBCDDA DBCDDAP Conversion from BCD 8 digit data to decimal ASCII data 7 11 3 BCDDA BCDDAP DBCDDA DBCDDAP Setting Data Internal Devices R ZR J U G Zn Constants K H Other ...

Page 455: ...n error occurs the error flag SM0 turns ON and an error code is stored into SD0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 During the operation of the BCDDA instruction the data of is other than 0 to 9999 During the operation of the DBCDDA instruction the data of is other than 0 to 99999999 4101 The range of the device specified in exceeds the range of the corresponding dev...

Page 456: ...uses the PR instruction to convert BCD 8 digit data the values at W10 and W11 to decimal and outputs it in ASCII format to Y40 to 48 Ladder Mode List Mode Operation Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON Because SM701 is OFF The PR instruction will output ASCII code until 00H is encountered Step Instruction Device D1 D2 31H 1 32H 2 39H 9 35H 5 b15 b8b7 b0 0...

Page 457: ... decimal ASCII data stored into the area starting from the device number designated by into BIN 32 bit data and stores it in the device number designated by 7 11 4 DABIN DABINP Conversion from decimal ASCII to BIN 16 bit data DDABIN DDABINP Conversion from decimal ASCII to BIN 32 bit data 7 11 4 DABIN DABINP DDABIN DDABINP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Wo...

Page 458: ...n operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program converts the decimal 5 digit ASCII data and sign set at D20 through D22 to BIN values and stores the result at D0 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The ASCII codes specified in to 5 other than 30H to 39H 2...

Page 459: ...the following manner 2 The ASCII data designated by to 1 can be in the range of from 0000H to FFFFH 3 The ASCII codes can be in the range of 30H to 39H and from 41H to 46H 7 11 5 HABIN HABINP Conversion from hexadecimal ASCII to BIN 16 bit data DHABIN DHABINP Conversion from hexadecimal ASCII to BIN 32 bit data 7 11 5 HABIN HABINP DHABIN DHABINP Setting Data Internal Devices R ZR J U G Zn Constant...

Page 460: ...mal 4 digit ASCII data set at D20 and D21 to BIN data and stores the result at D0 Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The ASCII codes specified in to 3 are other than 30H to 39H and from 41H to 46H 4101 The range of the device specified in exceeds the range of the corresponding device S D 1 ASCII code for the 8th digit ASCII code for t...

Page 461: ...f from 0 to 9999 3 The ASCII code set at each digit can be in the range of from 30H to 39H 4 If ASCII code for individual digits is 20H or 00H it is processed as 30H 7 11 6 DABCD DABCDP Conversion from decimal ASCII to BCD 4 digit data DDABCD DDABCDP Conversion from decimal ASCII to BCD 8 digit data 7 11 6 DABCD DABCDP DDABCD DDABCDP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit ...

Page 462: ... to Y40 to Y4F Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 A character other than 0 to 9 is put in the data of 4101 The range of the device specified in exceeds the range of the corresponding device S D Ten milli ons place ASCII code for ten millions place ASCII code for millions place ASCII code for ten thousands place b8 b0 ASCII code for th...

Page 463: ...vices R ZR J U G Zn Constants Other BL S BL TR BL P I J U Bit Word Bit Word Outputs the converted BCD value to a display device Step Instruction Device D21 D22 D23 20H space 34H 4 39H 9 37H 7 b15 b8b7 b0 32H 2 39H 9 D20 34H 4 39H 9 BCD value 0 4 9 7 2 9 4 9 Regarded as 04972949 BCD value 0 4 9 7 2 9 4 9 D11 D10 Y5F Y50Y4F Y40 DMOV 4972949 Process High performance Redundant Universal LCPU Basic Com...

Page 464: ...gram memory cannot be used 2 Set the comment file used for the COMRD P instruction in PLC file setting in the PLC parameter dialog box If the comment file to be used is not set in the PLC file setting device comments cannot be output with the COMRD P instruction When a comment file is set in the PLC File tab of the PLC Parameter dialog box but the file does not exist at power on or reset FILESET E...

Page 465: ...M606 SD memory card forced disable instruction is ON Even if the instruction is attempted to beit executed the command will be ignored Character string or head number of the devices where the character string is stored character string Number of the device where the length of detected character string will be stored BIN 16 bits Instruction Name ON During Execution ON for One Scan After Completion ...

Page 466: ...r Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 There is no 00H set within the range of the corresponding device after the device number specified in S D S 1st character 2nd character 3rd character 4th character b15 b8b7 b0 5th character 6th character nth character 00H Indicates the end of character string b15 b0 Length of character string S D S S S S ...

Page 467: ...ace will be stored if the BIN data is positive and the sign 2DH minus sign will be stored if it is negative 7 11 9 STR STRP Conversion from BIN 16 bit data to character string DSTR DSTRP Conversion from BIN 32 bit data to character string 7 11 9 STR STRP DSTR DSTRP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other...

Page 468: ...mber of digits following the decimal point must be smaller than or equal to the total number of digits minus 3 4 The BIN data that can be designated by and 1 is within the range of from 2147483648 to 2147483647 6 2 Total number of digits Number of digits in decimal fraction BIN data 1 2 3 4 Number of digits in decimal fraction 1 2 3 4 Automatically added 6 3 0 1 2 Automatically added 1 2 0 Total n...

Page 469: ...flag SM0 turns ON and an error code is stored into SD0 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The total number of digits specified by is outside the following ranges When the STR instruction is in use 2 to 8 When the DSTR instruction is in use 2 to 13 The number of digits for a part of the decimal fraction specified by 1 is outside the following ranges When the STR inst...

Page 470: ...ion of D0 and D1 and stores the result at from D20 to D26 Ladder Mode List Mode Operation Sets the data Sets the total number of digits Sets the number of digits in decimal fraction Step Instruction Device D21 D22 D23 20H space 31H 1 32H 2 36H 6 b15 b8b7 b0 37H 7 2 2EH D20 00H 32H 12672 D10 7 1 D0 D1 1267 2 Sets the data Sets the total number of digits Sets the number of digits in decimal fraction...

Page 471: ...the numerical character string that can be converted to BIN value is from 32768 to 32767 ignoring a decimal point Numerical value character strings excluding the sign and the decimal point can be designated only within the range from 30H to 39H The value ignoring a decimal point means 12345 6 123456 7 11 10 VAL VALP Conversion from character string to BIN 16 bit data DVAL DVALP Conversion from cha...

Page 472: ... the decimal point Numerical value character strings excluding the sign and the decimal point can be designated only within the range from 30H to 39H 5 The sign 20H will be stored if the numerical value is positive and the sign 2DH will be stored if it is negative 6 2EH is set for the decimal point 7 The total number of digits stored at D1 amounts to all characters expressing numerical values incl...

Page 473: ...specified by is outside the following ranges When VAL instruction is in use 0 to 5 When DVAL instruction is in use 0 to 10 The total number of characters in the character string specified by and the number of characters in the decimal fraction part stand in a relationship that is outside the following ranges Total number of characters 3 Number of characters in the decimal fraction part An ASCII co...

Page 474: ...ffers depending on the display designation designated by 7 11 11 ESTR ESTRP Conversion from floating point data to character string data 7 11 11 ESTR ESTRP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 D21 D22 D23 2DH 31H 1 36H 6 2EH b15 b8b7 b0 35H 5 34H 4 D20 00H 1654 D0 6 2 D10 D11 Total n...

Page 475: ...n will be stored if it is negative 2 If the decimal fraction part of a 32 bit floating point real number data is out of the range of the digits of decimal fraction part the lower decimal values will be rounded off When using decimal point format ASCII code for the sign b15 b8b7 b0 Total number of digits Number of digits in decimal fraction 2 Sign 1 00H Automatically stored at the end of character ...

Page 476: ...2 3 4 5 6 Total number of digits S2 S1 S2 S2 S1 8 2 2 Number of digits in decimal fraction Filled with 20H space codes 0 1 1 1 2 3 1 2 3 4 5 6 Total number of digits S2 S2 S2 S1 S1 When using exponent format ASCII code for the sign b15 b8b7 b0 Total number of digits Number of digits in decimal fraction 2 Sign integer part 1 00H Automatically stored at the end of character sting 2 3 4 5 6 Sign expo...

Page 477: ... the lower decimal values will be rounded off 4 If the number of digits of the decimal fraction part has been set at any value other than 0 2EH will automatically be stored at the position before the first of the specified number of digits If the number of digits in the decimal fraction part of the number is 0 the ASCII code 2EH will not be stored 5 The ASCII code 2CH will be stored as the sign fo...

Page 478: ...t format When the number of decimal fraction digits is 0 Total number of digits 6 When the number of decimal fraction digits is not 0 Total number of digits Number of decimal fraction digits 7 The number of digits for the decimal fraction portion specified by 2 is outside the following ranges When using the decimal point format Number of decimal fraction digits Total number of digits 3 When using ...

Page 479: ...in the area starting from the device number designated by to 32 bit floating point type real number and stores result at device designated by 7 11 12 EVAL EVALP Conversion from character string to floating point data 7 11 12 EVAL EVALP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word 1 1 Available o...

Page 480: ...rdcharacter b15 b8 b7 b0 2 ASCIIcodeforthe5thcharacter ASCIIcodeforthe7thcharacter 3 00H 4 Indicates the end of character string 1 32 bit floating point real number S S S S S ASCIIcodeforthe2ndcharacter ASCIIcodeforthe4thcharacter ASCIIcodeforthe6thcharacter D D 1 2DH 31H 1 2EH 30H 0 2 37H 7 38H 8 31H 1 32H 2 3 00H 4 0 7 8 1 2 1 1 32 bit floating point real number 7 1 0 8 12 S D S S S S b15 b8b7 b...

Page 481: ...fied by it will be ignored when the conversion is done 7 In a case where the ASCII code 30H 0 exists between the character E and a number in an exponent format character string the 30H would be ignored when the conversion is performed 8 If the 20H space code is contained in the character string the code is ignored in the conversion 9 Up to 24 characters can be set for a character string The codes ...

Page 482: ... Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The integer portion or the decimal fraction portion contains a character other than one in the range from 30H 0 to 39H 9 There are two or more 2EH in the character string specified in The exponent portion contains the code character other than 45H E 2BH 45H E or 2DH or the string contains more than one exponent portion Data after conversion ...

Page 483: ...ces R ZR J U G Zn Constants K H Other Bit Word Bit Word n D11 20H space 20H space 31H 1 2EH b15 b8b7 b0 D12 32H 2 33H 3 34H 4 35H 5 D13 45H E 2DH 30H 0 D14 D15 32H 2 D16 00 Ignored 1 2 3 4 5 E 0 2 Ignored D101 D100 D10 1 2 3 4 5 E 2 Process High performance Redundant Universal LCPU Basic Command Command ASC ASCP n n ASC ASCP S D S D S D S D S D 1 2 3 6 When 15 is set for n 1H 2H 3H 4H 1 4 5 7 5H 6...

Page 484: ... stored at D0 as hexadecimal values converts them to a character string and stores the result from D10 to D14 when X0 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The range for the number of characters designated by n following the device number designated by exceeds the relevant device range The range for the number of characters ...

Page 485: ...d is being stored overlaps with the range of devices that will store the converted BIN data 7 11 14 HEX HEXP Conversion from ASCII to hexadecimal BIN 7 11 14 HEX HEXP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Process High performance Redundant Universal LCPU Basic Command Command HEX HEXP n n S D S D HEX HEXP S D S D S D BIN data 1 2 3 Number of characters...

Page 486: ...dder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 Characters other than those outside the hexadecimal character string characters that are not in the range between 30H to 39H and 41H to 46H have been set in the device specified by 4101 The range of the device specified by exceeds the range from to the number of characters specified in n including The ...

Page 487: ...ata from the right LEFT LEFTP Extracting character string data from the left 7 11 15 RIGHT RIGHTP LEFT LEFTP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word K H n Process High performance Redundant Universal LCPU Basic Command P n n S D Command RIGHTP LEFTP RIGHT LEFT indicates an instruction symbol of RIGHT LEFT S D S D S S D S D 1 ASCIIcodeforthe1stcharacter ASCIIco...

Page 488: ...ls Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The value of n exceeds the number of characters specified by The range of the device specified by exceeds the range from to the number of characters specified in n including S D 1 ASCIIcodeforthe1stcharacter ASCIIcodeforthe2ndcharacter ASCIIcodeforthe3rdcharacter ASCIIcodeforthe4thcharacter ASCIIcodeforthe n 2 thcharacter ASCIIcodeforthe n 1 thcharacter...

Page 489: ...ated by counted from the left end of the character string data designated by and stores the extracted data into the area starting from the device designated by 7 11 16 MIDR MIDRP Random selection from character strings MIDW MIDWP Random replacement in character strings 7 11 16 MIDR MIDRP MIDW MIDWP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Instruction Device Ste...

Page 490: ...cally added to the end of the character string Refer to Page 90 Section 3 2 5 for the format of the character string data 3 No processing will be conducted if the number of characters designated by 1 is 0 S2 S2 S D 1 41H A 42H B 43H C 44H D 1 45H E 46H F 47H G 48H H 45H E 46H F 47H G 48H H 49H I 4AH J 4BH K 00H 2 3 4 5 2 49H I 4AH J Position of the 5th character ABCDEFGHIJK EFGHIJK 5 1 1 4BH K 00H...

Page 491: ...3H 3 b15 b8b7 b0 34H 4 35H 5 36H 6 37H 7 38H 8 00H 2 3 4 012345678 1 41H A 42H B 43H C 44H D 2 45H E 46H F ABCDEFGHI 47H G 48H H 3 49H I 00H 4 Before execution 1 41H A 42H B 43H C 44H D 2 30H 0 31H 1 ABCD01234 32H 2 33H 3 3 34H 4 00H 4 After execution 5 8 1 Number of characters counted from the left end of character string data designated by Position counted from the left end of character string d...

Page 492: ...eration Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The value of exceeds the number of characters specified by The 1 value exceeds the number of characters for The 0 value is 0 00H does not exist in the devices specifed by S2 D S2 S1 S2 S1 Instruction Device Step 3 4 R1 R0 D11 42 H B 41H A 32 H 2 31H 1 33 H 3 46H E D12 D13 BA213ED 45 H D 00H D10 D1 32H 2 31H 1 33H 3 46H E D2...

Page 493: ...racter string data stores 0 at Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 11 17 INSTR INSTRP Character string search 7 11 17 INSTR INSTRP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word K H n Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value of ...

Page 494: ...ert character strings are stored n Insert position Setting range 1 n 16383 BIN 16 bits 7 11 18 STRINS STRINSP Insertion of character string 7 11 18 STRINS STRINSP QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word K H n Instruction Device Step R1 43H C 49H I 32H 2 33H 3 31H 1 32H 2 43H C 49H I ...

Page 495: ...ed by or the devices specified by after the insertion exceeds 16383 characters The value specified in n is not within the specified range 1 n 16383 The value specified in n exceeds the number of characters of the character string 1 4101 The devices that store character strings specified by overlaps with even one of the devices specified by The range of the devices specified by in which character s...

Page 496: ...E H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word K H n1 n2 Step Instruction Device P R O 5 8 4 G R A M A B C D 50H P 52H R 4FH O 35H 5 38H 8 34H 4 47H G 52H R 42H B 44H D 41H A 43 4DH M 41H A H C 00H D0 character string D0 35H 5 38H 8 D1 34H 4 00H D20 50H P 52H R 4FH O 47H G 52H R 41H A 4DH M 41H A 42H B 43H...

Page 497: ...the seventh characters in the character string data stored in the devices D0 and up when M0 is turned on Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The number of characters in the devices specified by exceeds 16383 The value specified by n1 is not within the range 1 n1 16383 The value specified by n1 exceeds the number of characters in the devices spec...

Page 498: ...s R ZR J U G Zn Constants Other Bit Word Bit Word K H E 1 D0 50H P 52H R 4FH O 47H G 52H R 41H A 4DH M 41H A 42H B 43H C 00H 44H D D1 D2 D3 D4 D5 Fourth character to be deleted D0 character string D0 character string D0 character string P R O G R A M A B C D D0 50H P 52H R 4FH O 47H G 52H R 41H A 4DH M 41H A 42H B 43H C 00H 44H D D1 D2 D3 D4 D5 D0 50H P 52H R 4FH O 00H 44H D D1 D2 P R O D Seven ch...

Page 499: ...ults into the area starting from D100 when X0 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The decimal fraction digit specified by is not within the range between 0 and 7 The 32 bit floating point real number specified by is not within the following range 0 2 126 Device 2128 4101 The range of the device specified by exceeds that of...

Page 500: ... 0 to 38 can be set for the BCD exponent of 4 4 0 to 7 can be set for the decimal fraction digits of 7 11 21 EREXP EREXPP From BCD format data to floating point data 7 11 21 EREXP EREXPP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 Process High performance Redundant Universal LCPU Basic Command Command EREXPP EREXP EREXPP D S1 S2 D S2 S1 EREXP S1 S2 D S1 D2 D...

Page 501: ... D101 when X0 goes ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The data format in the device specified by is not 0 or 1 A value other than 0 to 9 exists in the each digit of 1 and 2 The format designation made by 3 is not 0 or 1 The data format in the device specified by 3 is not 0 or 1 The exponent data in the device specified by 4 is not ...

Page 502: ...nd an error code is stored into SD0 2 There are CPU modules that will not result in an operation error if 0 is specified For details refer to Page 88 Section 3 2 4 7 12 1 SIN SINP SIN operation on floating point data Single precision 7 12 1 SIN SINP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word...

Page 503: ... SINDP SIN operation on floating point data Double precision 7 12 2 SIND SINDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Inputs an angle used for SIN operation Converts the input angle into a 32 bit floating point real number Converts the converted angle into a radian value Executes SIN operation using the converted radian value 1 2 3 4 Step Instruction Device...

Page 504: ... Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specified device value is 0 4141 The operation result exceeds the following range when an overflow occurs 21024 Operation result S Inputs an angle used for SIN operation Converts the input angle into a 64 bit floating point real ...

Page 505: ...SM0 turns ON and an error code is stored into SD0 2 There are CPU modules that will not result in an operation error if 0 is specified For details refer to Page 88 Section 3 2 4 7 12 3 COS COSP COS operation on floating point data Single precision 7 12 3 COS COSP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit...

Page 506: ...a Double precision 7 12 4 COSD COSDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Inputs an angle used for COS operation Converts the input angle into a 32 bit floating point real number Converts the converted angle into a radian value Executes COS operation using the converted radian value 1 2 3 4 Step Instruction Device Conversion to radian 32 bit floating poin...

Page 507: ...S operation on the angle data designated by the 4 BCD digits from X20 to X2F and stores results as 64 bit floating decimal point type real numbers at D0 to D3 Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 102 Specified device value 21024 The specified device value is 0 4141 The operation res...

Page 508: ...r will be generated in the calculation of the radian value so care must be taken to avoid such errors 7 12 5 TAN TANP TAN operation on floating point data Single precision 7 12 5 TAN TANP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 64 bit floating point real number X2F BCD value 0 D30 0 6...

Page 509: ...QnH QnPH QnPRH QnU LCPU 4100 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 2 4140 The specified device value is 0 unnormalized number nonnumeric and 4141 The operation result exceeds the following range when an overflow occurs 2128 Operation result Inputs an angle used for TAN operation Converts the input angle into...

Page 510: ...ion results in 0 or an underflow the result is processed as 0 Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 12 6 TAND TANDP TAN operation on floating point data Double precision 7 12 6 TAND TANDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J...

Page 511: ...ASINP Arc sine operation on floating point data Single precision 7 12 7 ASIN ASINP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Inputs an angle used for TAN operation Converts the input angle into a 64 bit floating point real number Converts the converted angle into a radian value Executes TAN operation using the converted radian value 1 2 3 4 Step Instructio...

Page 512: ...of the 32 bit floating decimal point real number at D0 and D1 and outputs the angle to the 4 BCD digits at Y40 to Y4F Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified by is not within the range between 1 0 and 1 0 The specified device value is 0 2 4140 The specified device value is not within the following range 0 2 126 Specified device v...

Page 513: ...ersion between radian and angle data see description of RADD and DEGD instructions 4 When the operation results in 0 or an underflow the result is processed as 0 7 12 8 ASIND ASINDP Arc sine operation on floating point data Double precision 7 12 8 ASIND ASINDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Conversion toBIN 32 bit floating point real number D21 D20 ...

Page 514: ...40 The specified device value is not within in the following range 0 2 1022 Specified device value 21024 The specified device value is 0 4141 The operation result exceeds the following range when an overflow occurs 21024 Operation result S Calculates an angle radian value by SIN operation Converts the radian value into an angle Converts the angle in 64 bit floating point real number into an intege...

Page 515: ...ag SM0 turns ON and an error code is stored into SD0 2 There are CPU modules that will not result in an operation error if 0 is specified For details refer to Page 88 Section 3 2 4 7 12 9 ACOS ACOSP Arc cosine operation on floating point data Single precision 7 12 9 ACOS ACOSP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Error code Error details Q00J Q00 Q01 ...

Page 516: ...le precision 7 12 10ACOSD ACOSDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Calculates an angle radian value by COS 1 operation Converts the radian value into an angle Converts the angle in 32 bit floating point real number into an integer Outputs the integer converted angle to a display device 1 2 3 4 Step Instruction Device Conversion to BIN 32 bit floating p...

Page 517: ...he inverse cosine of the 64 bit floating decimal point real number at D0 to D3 and outputs the angle to the 4 BCD digits at Y40 to Y4F Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified in is within the double precision floating point range and not within the range from 1 0 to 1 0 4140 The specified device value is not in the following rang...

Page 518: ...een radian and angle data see description of RAD and DEG instructions 7 12 11 ATAN ATANP Arc tangent operation on floating point data Single precision 7 12 11 ATAN ATANP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 64 bit floating point real number D1 0 5 D0 D3 D2 64 bit floating point real number D21 60 D20 D23 D22 64 bit floating point real number D11 1 047...

Page 519: ...QnPRH QnU LCPU 4100 The specified device value is 0 2 4140 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 unnormalized number nonnumeric and 4141 The operation result exceeds the following range when an overflow occurs 2128 Operation result Calculates an angle radian value by TAN 1 operation Converts the radian value...

Page 520: ...n Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 12 12 ATAND ATANDP Arc tangent operation on floating point data Double precision 7 12 12ATAND ATANDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified devic...

Page 521: ...e precision 7 12 13RAD RADP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 1 Calculates an angle radian value by TAN operation Converts the radian value into an angle Converts the angle in 64 bit floating point real number into an integer Outputs the integer converted angle to a display devi...

Page 522: ...e List Mode Operations involved when X20 to X2F designate a value of 120 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The specified device value is 0 2 4140 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 unnormalized number nonnumeric and 4141 The operation result exceeds the following range whe...

Page 523: ...r 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 12 14 RADD RADDP Conversion from floating point angle to radian Double precision 7 12 14RADD RADDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value ...

Page 524: ...es is performed according to the following equation 7 12 15 DEG DEGP Conversion from floating point radian to angle Single precision 7 12 15DEG DEGP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Inputs an angle to be converted into a radian value Converts the converted angle into a radian v...

Page 525: ...grees will be stored real number Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The specified device value is 0 2 4140 The specified device value is 0 unnormalized number nonnumeric and 4141 The operation result exceeds the following range when an overflow occurs 2128 Operation result 7 12 16 DEGD DEGDP Conversion from floating point radian to angle Double precision 7 12 16DEGD...

Page 526: ...rations involved when the values at D20 to D23 are 1 435792 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specified device value is 0 4141 The operation result exceeds the following range when an overflow occurs 21024 Operation result S D rad 3 S 2 S S 1 S 3 D 2 D D 1 D 64 bi...

Page 527: ...llowing cases an operation error occurs the error flag SM0 turns on and an error code is stored into SD0 7 12 17 POW POWP Exponentiation operation on floating point data Single precision 7 12 17POW POWP QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Error code Error details Q00J Q00 Q...

Page 528: ...2 The following shows the values to be specified by and stored into or 0 2 1022 Set values Storage values 21024 3 If the value resulted from the operation is 0 or an underflow occurs the result will be processed as 0 7 12 18 POWD POWDP Exponentiation operation on floating point data Double precision 7 12 18POWD POWDP QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Set...

Page 529: ...n result will be stored real number 1 Applicable for the Universal model QCPU LCPU Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4140 The value specified by or is out of the range shown below 0 2 1022 Set value storage value 21024 The value of or is 0 4141 The operation result is within the following range when an overflow occurs 21024 Operation result 7 12 19 SQR SQRP Square root ...

Page 530: ...Ladder Mode List Mode Operations involved when value designated by X20 to X2F is 650 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified in is negative The specified device value is 0 2 4140 The specified device value is not within the following range 0 2 126 Specified device value 2128 The specified device value is 0 unnormalized number nonnumeric or 4141 The op...

Page 531: ...4 BCD digits from X20 to X2F and stores the result as a 64 bit floating decimal point type real number at D0 to D3 Ladder Mode 7 12 20 SQRD SQRDP Square root operation for floating point data Double precision 7 12 20SQRD SQRDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified in is ...

Page 532: ... calculated taking the base e to be 2 71828 7 12 21 EXP EXPP Exponent operation on floating point data Single precision 7 12 21EXP EXPP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Step Instruction Device X2F BCD value 0 D20 6 5 0 X20 Conversion to BIN BIN b15 b0 BIN value 650 Conversion t...

Page 533: ...ue of over 90 will return an operation error turn M1 ON if a value of over 90 has been set to avoid the error Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The operation result is not within the following range 2 126 Operation result 2128 The operation result is not within the following range 2 126 Operation result 2128 The specified device value is 0 2 4140 The specified devi...

Page 534: ...low the result is processed as 0 Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 12 22 EXPD EXPDP Exponent operation on floating point data Double precision 7 12 22EXPD EXPDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH...

Page 535: ...eturn an operation error turn M0 ON if a value of over 710 has been set to avoid the error Conversion from natural logarithm to common logarithm In the CPU module calculation is made using a natural logarithm To obtain a common logarithm value enter in a common logarithm value divided by 0 43429 Inputs data used for exponent operation Converts the input data into a 64 bit floating point real numbe...

Page 536: ... refer to Page 88 Section 3 2 4 7 12 23 LOG LOGP Natural logarithm operation on floating point data Single precision 7 12 23LOG LOGP Basic model QCPU The serial number first five digits is 04122 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 1 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified in is negative The value ...

Page 537: ...tive numbers 3 When the operation results in 0 or an underflow the result is processed as 0 7 12 24 LOGD LOGDP Natural logarithm operation on floating point data Double precision 7 12 24LOGD LOGDP Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word Sets data used for natural logarithm operation Converts the operation data into a 32 bit floating point real number Execute...

Page 538: ...ied in is 0 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The specified device value is 0 4141 The operation result exceeds the following range when an overflow occurs 21024 Operation result S S Sets data used for natural logarithm operation Converts the operation data into a 64 bit floating point real number Executes natural logarithm oper...

Page 539: ...n error occurs the error flag SM0 turns on and an error code is stored into SD0 7 12 25 LOG10 LOG10P Common logarithm operation on floating point data Single precision 7 12 25LOG10 LOG10P QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants E Other Bit Word Bit Word 1 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH...

Page 540: ...es the operation result into the device specified by 2 Only positive values can be specified by Operation cannot be performed on negative numbers 3 If the value resulted from the operation is 0 or an underflow occurs the result will be processed as 0 7 12 26 LOG10D LOG10DP Common logarithm operation on floating point data Double precision 7 12 26LOG10D LOG10DP QnU D H CPU QnUDE H CPU The serial nu...

Page 541: ...al data is stored BIN 16 bits Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value specified in is negative The value specified in is 0 4140 The specified device value is not within the following range 0 2 1022 Specified device value 21024 The value specified by is 0 4141 The operation result is within the following range when an overflow occurs 21024 Operation result 7 12 ...

Page 542: ...lowing program stores random number at D100 when X10 is turned ON Ladder Mode List Mode 2 The following program updates a random number series according to the contents of D0 when X10 is turned ON Ladder Mode List Mode Data of which the square root is obtained or the number of the device where the data is stored BSQR P BCD 4 digits BDSQR P BCD 8 digits Head number of the devices where the square r...

Page 543: ...as their respective BCD values of between 0 and 9999 4 Operation results are rounded off from the fifth decimal place For this reason the fourth decimal place has an error of 1 Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program calculates the square root of BCD value 1325 and out...

Page 544: ...ion Device BSQR operation BSQR D1 BCD value 0 0 3 6 D2 BCD value 4 0 0 5 D0 BCD value 1 3 2 5 MOV 1325H Y5F BCD value 0 0 3 6 Y50 Y4F BCD value 4 0 0 5 Y40 Transfer MOV MOV Transfer Integer part Decimal fraction part Sets the data BCD value used for square root operation Executes square root operation Outputs the integer part of the operation result to a display device Outputs the decimal fraction...

Page 545: ...ram example below calculates the SIN of 3 digit BCD data designated by X20 to X2B and outputs a 1 digit BCD part to the integer part from Y50 to Y53 and a 4 digit BCD fraction part from Y40 to Y4F Y60 is turned ON if the results of the operation are negative If a value has been set at X20 to X2F that is greater than 360 it will be adjusted to be in the range from 0 to 360 Ladder Mode List Mode Err...

Page 546: ... will be 0 if the result is a positive value and 1 if the result is a negative value 4 The operation results stored in 1 and 2 are BCD values between 1 000 and 1 000 5 Operation results are rounded off from the fifth decimal place 7 12 30 BCOS BCOSP BCD type COS operations 7 12 30BCOS BCOSP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word X2B BCD value 5 9 0 X20 B ...

Page 547: ...430 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The data specified in is not a BCD value The data specified in is not in the range from 0 to 360 4101 The points of the device specified in exceed those of the corresponding device S S D Processes so that the input angle is within 360 Executes COS operation Outputs the integer part of the operation result to a display device Ou...

Page 548: ...f the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program calculates the tangent of the data stored in the 3 BCD digits from X20 to X2B and stores the integer part of the results in the 4 BCD digits from Y50 to Y53 and the decimal fraction part in the 4 BCD digits from Y40 to Y4F Y60 is turned ON if the ...

Page 549: ...sine operations 7 12 32BASIN BASINP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word 1 2 3 4 5 Processes so that the input angle is within 360 Step Instruction Device X2B BCD value 3 9 0 X20 B operation B BTAN operation BTAN OUT D10 BCD value quotient 0 0 0 1 D11 BCD value remainder 0 0 3 0 D20 Transfer MOV D21 Transfer MOV D22 BCD value 0 0 0 0 BCD value 0 0 0 0 B...

Page 550: ...urns ON and an error code is stored into SD0 Program Example 1 The following program performs a SIN 1 operation on the sign positive when X0 is OFF and negative when X0 is ON the BCD 1 digit integer part from X30 to X33 and the BCD 4 digit decimal fraction part from X20 to X2F and outputs the calculated angle in 4 BCD digits from Y40 to Y4F Ladder Mode Error code Error details Q00J Q00 Q01 QnH QnP...

Page 551: ...ecimal point and fraction part are stored at 1 and 2 respectively as BCD values Settings can be between 0 and 1 0000 4 The operation results stored at will be a BCD value in the range of between 0 and 180 degree units 5 Calculation results are a value from which the decimal fraction part has been rounded 7 12 33 BACOS BACOSP BCD type arc cosine operation 7 12 33BACOS BACOSP Setting Data Internal D...

Page 552: ...lculated angle in 4 BCD digits from Y40 to Y4F Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The operation data specified in is not a BCD value The operation data specified in is not in the range from 1 0000 to 1 0000 4101 The points of the device specified in exceed those of the corresponding device S S S Turns M0 ON when D1 1 or D1 1 and D2 0 Sets the d...

Page 553: ...and 90 degrees and 270 and 360 degrees degree units 5 Calculation results are a value from which the decimal fraction part has been rounded Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 12 34 BATAN BATANP BCD type arc tangent operations 7 12 34BATAN BATANP Setting Data Internal Devices R ZR J U G Zn Cons...

Page 554: ... Ladder Mode List Mode Operations involved when X0 and X20 to X2F designate a value of 1 2654 Sets the sign of a TAN value Sets the integer part of a TAN value Sets the decimal fraction part of a TAN value Executes TAN 1 operation and outputs the result of operation to Y40 to Y4F 1 2 3 4 Step Instruction Device BCD value D0 Transfer MOV D1 Transfer MOV D2 BCD value 0 0 0 0 BCD value 1 0 0 0 BCD va...

Page 555: ...signated at and 3 When control based only on upper limit values is performed the lower limit value designated at is set at 32678 4 When control based only on lower limit values is performed the upper limit value designated at is set at 32767 7 13 1 LIMIT LIMITP Upper and lower limit controls for BIN 16 bit data DLIMIT DLIMITP Upper and lower limit controls for BIN 32 bit data 7 13 1 LIMIT LIMITP D...

Page 556: ...and an error code is stored into SD0 Program Example 1 The following program conducts limit controls from 500 to 5000 on the data set as BCD values from X20 to X2F and stores the result at D1 when X0 is turned ON Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The lower limit value specified in is greater than the upper limit value specified in D D S3 S3 S1...

Page 557: ...0 if 1000000 D1 D0 D1 D0 9876543 D11 D10 1000000 Lower limit value of dead band no output band BIN 16 32 bits Upper limit value of dead band no output band BIN 16 32 bits Input value to be controlled by a dead band control BIN 16 32 bits Head number of the devices where the output value controlled by the dead band control will be stored BIN 16 32 bits 7 13 2 BAND BANDP BIN 16 bit dead band control...

Page 558: ...wn below 2 The values designated by 1 1 or 1 are within the range of from 2147483648 to 2147483647 When Dead band lower limit value 10 Input value 32768 Output value 32768 10 8000H AH 7FF6H 32758 D S3 S1 S2 S1 Lower limit value S3 Input value S3 Input value S1 Lower limit value D Output value S2 Upper limit value S3 Input value S3 Input value S2 Upper limit value D Output value S1 Lower limit valu...

Page 559: ... is stored at D1 if 1000 D0 D0 7000 D1 6000 2 The following program performs the dead band control by applying the lower and upper limits of 10000 and 10000 for the data set at D0 and D1 and stores the result of control at D10 and D11 when X0 is turned ON Ladder Mode List Mode Operation The value D1 D0 10000 is stored at D11 D10 if D1 D0 10000 D1 D0 12345 D11 D10 2345 The value 0 is stored at D11 ...

Page 560: ...refore if the operation results exceed the range of 32768 to 32767 the following will take place 7 13 3 ZONE ZONEP Zone control for BIN 16 bit data DZONE DZONEP Zone control for BIN 32 bit data 7 13 3 ZONE ZONEP DZONE DZONEP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word When Negative bias value 100 Input value 32768 Output value 32768 100 8000H FF9C 7F9CH 32668 ...

Page 561: ...trol by applying negative and positive bias values of 100 to 100 for the data set at D0 and stores the result of control at D1 when X0 is turned ON Ladder Mode List Mode Operation The value D0 100 is stored at D1 if D0 0 D0 200 D1 300 The value 0 is stored at D1 if D0 0 The value of D0 100 is stored at D1 if 0 D0 D0 700 D1 800 When Negative bias value 1 1000 Input value 1 2147483648 Output value 2...

Page 562: ...lue specified by and then stores the operation result into the devices specified by The scaling conversion is executed based on the scaling conversion data stored in the device specified by and up 7 13 4 SCL SCLP DSCL Scaling Coordinate data by point DSCLP 7 13 4 SCL SCLP DSCL DSCLP QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U...

Page 563: ... on the scaling conversion data stored in the device specified by and up 2 If the value does not result in an integer this instruction rounds the value to the whole number 3 Set the X coordinate of the scaling conversion data in ascending order 4 Set the input value within the range of the scaling conversion data within the range of and 1 devices 5 If some specified points have same X coordinates ...

Page 564: ...1 In any of the following cases an operation error occurs the error flag SM0 turns on and an error code is stored into SD0 SM750 Searching method Range of number of searches OFF Sequential search 1 Number of times 32767 ON Binary search 1 Number of times 15 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The X coordinates of the scaling conversion data positioned before the poin...

Page 565: ...X and Y DSCL2P 7 13 5 SCL2 SCL2P DSCL2 DSCL2P QnU D H CPU QnUDE H CPU The serial number first five digits is 10102 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Step Instruction Device Scaling conversion data component Setting item Device Setting contents D100 K5 D101 K5 D102 K13 D103 K10 D104 K15 D105 K17 D106 K13 D107 K20 D108 K8 D109 K25 D110 K22 Num...

Page 566: ...nge of the scaling conversion data within the range of and 1 devices 5 If some specified points have same X coordinates the Y coordinate data of the highest point number will be output 6 Specify the number of coordinate points of scaling conversion data from 1 to 32767 When the coordinates of the scaling conversion data are set in ascending order the searching methods change from one to the other ...

Page 567: ...ordinates are not set in ascending order The input value specified in is not within the range of the scaling conversion data set The number of X and Y coordinates of the device specified in is not within the range from 1 to 32767 4101 The number of X and Y coordinates of the device specified in exceeds the specified range S1 S2 S2 Step Instruction Device Scaling conversion data component Setting i...

Page 568: ...le registers refer to Page 119 Section 3 10 Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 14 1 RSET RSETP Switching file register block numbers 7 14 1 RSET RSETP Universal model QCPU Models other than Q00UJCPU Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Error code Er...

Page 569: ...SETP File setting for file register 7 14 2 QDRSET QDRSETP Universal model QCPU Models other than Q00UJCPU Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Designates block No 0 Executes reading R0 of block No 0 Designates block No 1 Executes reading R0 of block No 1 Compares the read values Step Instruction Device Y41 turns ON since D0 D1 756 Block No 0 R3 R1 R2 R0 R4 ...

Page 570: ...file name have been designated in the parameters 1 If the file name is changed with the QDRSET instruction the file name returns to the name specified by the parameter when the CPU module is switched from STOP to RUN To maintain the file name even after the CPU mode is changed from STOP to RUN execute the QDRSET instruction with the SM402 special relay which turns ON during one scan when the CPU e...

Page 571: ...head number of the devices where the character string data is stored character string 7 14 3 QCDSET QCDSETP File setting for comments 7 14 3 QCDSET QCDSETP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device Y41 turns ON since D0 D1 756 Block No 0 R3 R1 R2 R0 R4 R5 7981 5001 128 3216 9610 0 Block No 1 R3 R1 R2 R0 R4 R5 3911 9330 1762 756 5 3781 D0 ...

Page 572: ...en priority even if a drive number and file name have been designated in the parameters If the file name is changed with the QCDSET instruction the file name returns to the name specified by the parameter when the CPU module is switched from STOP to RUN To maintain the file name even after the CPU mode is changed from STOP to RUN execute the QCDSET instruction with the SM402 special relay which tu...

Page 573: ...ed even when the execution command of this instruction is ON while SM721 file access in execution is ON for the Universal model QCPU and LCPU Execute this instruction when SM721 is OFF 2 For the LCPU when drive 2 SD memory card is specified as the drive number this instruction cannot be executed while SM606 SD memory card forced disable instruction is ON Even if the instruction is attempted to be ...

Page 574: ... Example 1 The following program outputs the following clock data as BCD values Year Y70 to Y7F Month Y68 to Y6F Day Y60 to Y67 Hour Y58 to Y5F Minute Y50 to Y57 Second Y48 to Y4F Week Y44 to Y47 7 15 1 DATERD DATERDP Reading clock data 7 15 1 DATERD DATERDP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Day of week Sun Mon Tue Wed Thu Fri Sat Stored data 0 1 2 3 4 5...

Page 575: ...es R ZR J U G Zn Constants Other Bit Word Bit Word Outputs Year Outputs Month Outputs Hour Outputs Minute Outputs Second Outputs Day Outputs Day of week Step Instruction Device Year 7 5 2 1 Y50 Y57 Y58 Y5F Hour Minute 0 9 3 Y44 Y47 Y48 Y4F Second Day of week BCD D0 12 2005 24 12 57 39 D1 D2 D3 D4 D5 Clock data BIN 2005 12 24 12 57 39 Sunday 4 2 2 1 5 0 0 2 Y60 Y67 Y68 Y6F Y70 Y7F Month Day 0 D6 Ba...

Page 576: ...ates the day of week in values of from 0 to 6 Sunday to Saturday Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program writes the following clock data to the clock element as BCD values when X40 is turned ON Year X30 to X3F Hour X18 to X1F Month X28 to X2F Minute X10 to X17 ...

Page 577: ...ata addition operation 7 15 3 DATE DATE P Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Sets Month Sets Day Sets Hour Sets Minute Sets Second Sets Year Writes the clock data D0 to D6 to the clock element Sets Day of week Step Instruction Device 1 2 2 4 X2F X28 X27 X20 Month Day Hour Minute 1 2 5 7 X1F X18 X17 X10 3 9 0 XF X8 X7 X4 Second Day of week BIN BIN Clock da...

Page 578: ...ode is stored into SD0 Program Example 1 The following program adds 1 hour to the clock data read from the clock element and stores the results in the area starting from D100 when X20 is ON Ladder Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value set for and is not within the setting range 4101 The range of the device specified by or exceeds the range of the corresp...

Page 579: ... the clock time 10 40 20 the operation would be performed as follows 7 15 4 DATE DATE P Clock data subtraction operation 7 15 4 DATE DATE P Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device Clock element 95 5 15 D1 D2 Year Day Month 10 23 41 2 D0 D3 D4 D5 D6 Hour Minute Second Day of week Time data Hour 1 Minute 0 Second 0 D11 D12 Hour 11 Minute ...

Page 580: ... at devices starting from R10 Ladder Mode List Mode Operation Time data read operation triggered by DATERDP instruction Subtraction as triggered by DATE P instruction when 10 hours 40 minutes and 10 seconds have been designated by D10 to D12 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value set for and is not within the setting range 4101 The range of the device specifie...

Page 581: ...e is stored into SD0 Program Example 1 The following program converts the clock time data read from the clock element into second when X20 is turned ON and stores the result at D100 and D101 Ladder Mode List Mode 7 15 5 SECOND SECONDP Time data conversion from Hour Minute Second to Second 7 15 5 SECOND SECONDP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Error code...

Page 582: ...cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 7 15 6 HOUR HOURP Time data conversion from Second to Hour Minute Second 7 15 6 HOUR HOURP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value set for is not within the setting range 4101 The rang...

Page 583: ...data specified by with those specified by or the date data specified by with current date data Setting n can determine the data to be compared a Comparison of given date data This instruction treats the date data specified by and as a normally open contact and then compares the data in accordance with the value of n 7 15 7 DT DT DT DT Date comparison DT DT 7 15 7 DT DT DT DT DT DT QnU D H CPU QnUD...

Page 584: ...day selected from 1 to 31 1st to 31st for with the BIN value specified by 2 or 2 6 This instruction specifies the following values at n so that the data to be compared can be specified The bit configuration specified at n is as follows a Date data to be compared from 0 to 2nd bit 0 Does not compare specified date data year month day 1 Compares specified date data year month day b Operation data to...

Page 585: ... to be compared are under the same condition the comparison operation results vary depending on the objects selected n value for comparison of specified date data with given date data n value for comparison of specified date data with current date data Date to be compared Processing details 0001H 8001H Day Comparison of days 2 0002H 8002H Month Comparison of months 1 0003H 8003H Month day Comparis...

Page 586: ...ata stored in D0 with the current date data year and month and makes Y33 be conductive status when the data stored in D0 do not meet the current date data when M0 is turned on Ladder Mode List Mode 3 The following program compares the data stored in D0 with the data year and day stored in D10 and makes Y33 be conductive status when the data value stored in D10 is smaller than the data value stored...

Page 587: ...of the following conditions in comparing given or current time data with specified clock data the operation error error code 4101 or a malfunction may occurs The range of the devices to be used for the index modification is specified over the range of the device specified by or File registers are specified by or without a register set 2 This instructions set BIN values for each item 3 This instruc...

Page 588: ...tatus will be made 8 The following table shows the comparison operation results for each instruction n value for comparison of pecified clock data with given clock data n value for comparison of specified clock data with current time data Time to be compared Processing details 0001H 8001H Second Comparison of seconds 2 0002H 8002H Minute Comparison of minutes 1 0003H 8003H Minute second Comparison...

Page 589: ... the data stored in D0 meet the data stored in D10 Ladder Mode List Mode 2 The following program compares the data stored in D0 with the current time data hour and minute and makes Y33 be conductive status when the data stored in D0 do not meet the current date data when M0 is turned on Ladder Mode List Mode 3 The following program compares the data stored in D0 with the data hour and second store...

Page 590: ...ing program compares the data stored in D0 with the current time data hour and makes Y33 be conductive status when the value of the current time data is the data value stored in D0 or larger Ladder Mode List Mode Step Instruction Device ...

Page 591: ...SM0 turns ON and an error code is stored into SD0 7 16 1 S DATERD SP DATERDReading expansion clock data 7 16 1 S DATERD SP DATERD High Performance model QCPU Process CPU Redundant CPU The serial number first five digits is 07032 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Day of week Sunday Monday Tuesday Wednesday Thursday Friday Saturday Stored data 0 1...

Page 592: ... to Y43 Ladder Mode List Mode Operation Outputs Year Outputs Month Outputs Hour Outputs Minute Outputs Second Outputs Day Outputs Day of Week Outputs Millisecond Instruction Device Step 5 0 0 Y70 Y7F Year 7 5 2 1 Y50 Y57 Y58 Y5F Hour Minute 0 9 3 Y44 Y47 Y48 Y4F Second Day of week BCD D0 12 2005 24 12 57 39 D1 D2 D3 D4 D5 Clock data Sunday BIN 2005 12 24 12 57 39 530 4 2 2 2 1 Y60 Y67 Y68 Y6F Mont...

Page 593: ...of addition of clock time data will be stored BIN 16 bits Function 1 Adds the time data designated by to the clock data designated by and stores the result into the area starting from the device designated by For example adding the time 7 48 10 500 to 6 32 40 875 would result in the following operation 7 16 2 S DATE SP DATE Expansion clock data addition operation 7 16 2 S DATE SP DATE High Perform...

Page 594: ...of 16 When the above conditions a and b are not met INSTRCT CODE ERR error code 4004 will occur Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value set for and is not within the setting range See Function 1 4101 The range of the device specified by or exceeds the range of the corresponding device D S2 S1 1 2 1 2 1 2 S1 S1 S2 S2 D D Hour 14 Minute 20 Second 30 3 3 3 S1 S2 D...

Page 595: ...ad operation by the SP DATERD instruction Addition by the SP DATE instruction Sets the time to D10 or later Reads out the clock element data to D0 or later Instruction Device Step 05 5 17 D1 D2 Year Day Month 10 23 41 2 D0 D3 D4 D5 D6 Hour Minute Second Day of week Time data Millisecond 100 Time data Clock element D11 D12 D101 D102 Hour 10 Minute 23 Second 41 D4 D5 D100 D10 D3 Millisecond 100 D6 D...

Page 596: ...on clock data subtraction operation 7 16 3 S DATE SP DATE High Performance model QCPU Process CPU Redundant CPU The serial number first five digits is 07032 or later Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Basic Process High performance Redundant Universal LCPU Ver Ver Ver Command S DATE SP DATE S DATE Command SP DATE S1 S2 D S1 S2 D S1 S2 D S1 S2 D S2 S1 D D ...

Page 597: ... time data stored in the area starting from D10 from the clock data read from the clock element when X1C is turned ON and stores the result into the area starting from D100 Ladder Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value set for and is not within the setting range See Function 1 4101 The range of the device specified by or exceeds the range of the correspon...

Page 598: ...onth 8 42 1 3 D0 D3 D4 D5 D6 D7 Hour Minute Second Day of week Time data Millisecond 997 Time data Clock element 8 42 1 997 10 40 10 500 2 1 51 497 Adds 24 to this value 22 1 51 497 D11 D12 D101 D102 Hour 8 Minute 42 Second 1 D4 D5 D100 D10 D3 Millisecond 997 D6 D7 3 Wednesday Hour 10 Minute 40 Second 10 Millisecond 500 Hour 22 Minute 1 Second 51 Millisecond 497 D13 D14 D103 D104 ...

Page 599: ...type is changed at the END processing 3 When the POFF instruction is executed the output is turned OFF at the next scan and the execution type will be the stand by type at the second next scan and later If executed prior to the output OFF processing the program control instruction is ignored Execution type before change Executed Instruction PSCAN PSTOP POFF PLOW Scan execution type No change remai...

Page 600: ...name Only QPG files will be acted on Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program places the program with the file name ABC in the stand by status when X0 goes ON Ladder Mode List Mode 7 17 1 PSTOP PSTOPP Program standby 7 17 1 PSTOP PSTOPP Setting Data Internal Dev...

Page 601: ...in the drive No 0 program memory can be set as the stand by type 3 This instruction will be given priority even in cases when a program execution type has been designated in the parameters 4 It is not necessary to designate the extension QPG with the file name Only QPG files will be acted on Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and a...

Page 602: ...tring Function 1 Sets the program whose file name is being stored at the device designated by in the scan execution type 2 Only the programs stored in the drive No 0 program memory internal RAM can be set as the scan execution type OUT instruction Forced OFF SET instruction Maintains status RST instruction SFT instruction Basic instruction Application instruction PLS instruction Processing identic...

Page 603: ...type or head number of the devices where the file name is stored character string Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2410 The program with the file name specified by does not exist 2504 The specified file name is the SFC program and the SFC program for the other file name has been already started For the High Performance model QCPU Process CPU Redundant CPU 4101 The rang...

Page 604: ...gnated in the parameters 5 It is not necessary to designate the extension QPG with the file name Only QPG files will be acted on Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program sets the program with file name ABC as low speed execution type when X0 is turned ON Ladder ...

Page 605: ... error code is stored into SD0 Program Example 1 Program that keeps Y10 ON when the program file ABC QPG is being executed Remark Non execution indicates that the program execution type is a stand by type Execution indicates that the program execution type is a scan execution type including during output OFF during non execution processing low speed execution type or fixed scan execution type 7 17...

Page 606: ...t if the PCHK instruction is executed for the program where the non execution processing has been completed by the POFF instruction the PCHK instruction may be brought into conduction The following chart shows the operation performed when program A executes the POFF instruction of program B and program C executes the PCHK instruction of program B with the programs being executed in order of progra...

Page 607: ...l the output goes OFF during the generation of an error 5 Scan time values stored at the special register will not be cleared even if the WDT or WDTP instruction is executed Accordingly there are times when the value for the scan time for the special register is greater than the value of the watchdog timer set at the parameters Operation Error 1 There is no operation error in the WDT P instruction...

Page 608: ...4 The data designated by n1 n2 and is registered with the system when the DUTY instruction is executed and the timing pulse is turned ON and OFF by END processing Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 The following program turns SM420 ON for 1 scan and OFF for 3 scans if X0 is ON ...

Page 609: ... after the execution command turns OFF 3 Set the set value of measurement in units of 100ms Operation Error 1 In the following case an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Program Example 1 Program where the ON time of X0 is set to 5s the current value storage device to D0 and the device that will turn ON at time out to Y10 Ladder Mode List Mode 7...

Page 610: ...ternal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Basic Process High performance Redundant Universal LCPU Command Command ZRRDB ZRRDBP n n D D ZRRDB ZRRDBP D D D D Area for block No 0 Area for block No 1 Area for block No 2 ZR65536 ZR65535 ZR32768 ZR0 ZR32767 Serial byte number n Read out contents 00H B0 B7 b15 b8 File register D ZR0 Serial byte No 0 Serial byte No 1 Serial byte...

Page 611: ...ere the data to be written is stored BIN 16 bits Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4101 The specified device number serial byte number exceeds the available range 7 18 5 ZRWRB ZRWRBP File register direct 1 byte write 7 18 5 ZRWRB ZRWRBP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Step Instruction Device b15 b8b7 b0 ZR16001 ZR16002...

Page 612: ...vice number serial byte number exceeds the available range S S Area for block No 0 Area for block No 1 Area for block No 2 ZR65536 ZR65535 ZR32768 ZR0 ZR32767 Serial byte number n Contents to be written Ignored b0 b7 b15 b8 Write destination designation Writing the data File register S ZR0 Serial byte No 0 Serial byte No 1 Serial byte No 2 Serial byte No 3 ZR1 Serial byte No 4 Serial byte No 5 Ser...

Page 613: ...ted by will be stored BIN 32 bits 7 18 6 ADRSET ADRSETP Indirect address read operations 7 18 6 ADRSET ADRSETP Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word Step Instruction Device b15 b8b7 b0 ZR16001 ZR16002 54H BAH 80H 4AH ABH 77H ZR16000 ZR16003 b15 b8b7 b0 ZR16001 ZR16002 54H BAH 80H 4AH ABH 77H ZR16000 ZR16003 b15 b8b7 b0 Ignored D100 b15 b8b7 b0 Ignored D101 5...

Page 614: ... Number of digits of the numeral to be input BIN 16 bits Head number of the devices where the input numeral will be stored BIN 16 bits Number of the bit device to turn ON at the completion of input bits 7 18 7 KEY Numerical key input using keyboard 7 18 7 KEY Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word Only X n S D D D MOV K1234 D100 ADRSET W100 D100 D0 D1 D10...

Page 615: ...than 1 scan there will be cases when the data is correctly incorporated 4 Be sure to keep the execution command condition contact for the KEY instruction ON until the specified number of digits has been input The KEY instruction cannot be executed if the execution command turns OFF S D1 Number of digits that are input 5 digits 6 digits 7 digits 8 digits 1 digit 2 digits 3 digits 4 digits Designati...

Page 616: ... input and the input data stored at and turn OFF the designated device at the user program If is not cleared and not turned OFF the next input processing cannot be performed D1 D1 D1 D1 31H 33H 35H 37H 39H 0 0 1 3 0 0 0 0 2 0 1 3 5 0 0 0 0 3 1 3 5 7 0 0 0 0 4 3 5 7 9 0 0 0 1 5 0 0 0 1 0 0 0 0 1 Execution command Condition contact for the execution of KEY instruction Strobe signal 8 ASCII code inpu...

Page 617: ...the area from D0 to D2 when X0 is turned ON Ladder Mode List Mode Operation Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The device specified in is not an input X device The number of digits specified in n is outside the range from 1 to 8 S Clears the previous input data Sets the number of digits to be input Resets the data input completion fag Step Instruction Device X20 X21...

Page 618: ...modate the number of times the instruction will be used should be maintained from the beginning 4 The composition of the field used following is as shown below When Basic model QCPU is used When using a High Performance model QCPU Process CPU Redundant CPU 7 18 8 ZPUSH ZPUSHP Batch save of index register ZPOP ZPOPP Batch recovery of index register 7 18 8 ZPUSH ZPUSHP ZPOP ZPOPP Setting Data Intern...

Page 619: ...ns ON and an error code is stored into SD0 Program Example 1 The following program saves the contents of the index register to the fields following D0 before calling the subroutine following P0 that uses the index register Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The operation result of 0 the number of saves made is 0 in the ZPOP P instruction 4101 F...

Page 620: ...he head I O number of the module from which the module information is read QCPU LCPU 7 18 9 UNIRD UNIRDP Reading module information 7 18 9 UNIRD UNIRDP Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n1 n2 Basic Process High performance Redundant Universal LCPU n2 UNIRD UNIRDP Command Command UNIRD D n1 UNIRDP n2 D n1 D D D Power supply module CPU QX10 QX10 QX10 Q...

Page 621: ...Online module replacement status execution from the standby system 1 Module information on the extension base unit is tried to be read during online module change or from the CPU module of standby system in the redundant system 1 0 Other than above Fixed to 0 b9 Minor medium error status 1 Minor medium error occurred 0 Normal b10 Module error status 00 No module error 10 Medium error 01 Minor erro...

Page 622: ...ormation X YFF0 module information X Y20 module information Device D0 D1 Instruction Device Step b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 D0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 32 point module Intelligent function module No external power supply connected No blown fuse error existing Execution other than during online module change or from the standby system No modul...

Page 623: ...A module is installed as latter 16 points of a 32 point module D1 A series module 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 For an empty slot all of these bits turn 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 D0 0 0 0 0 0 0...

Page 624: ...U User BIN 16 bits 0 to FFH 3E0H LCPU 0 Execution result of the instruction Within each device range System BIN 16 bits 1 to 9 Module model name Character string b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 D0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 32 point module Intelligent function module Empty Empty Empty No module errors Module preparation complete Empty Module connect...

Page 625: ...se model name is to be read When the target module occupies one slot Universal model QCPU LCPU 1 On the LCPU if the built in I O or first I O on the built in CC Link is specified then the model name of the CPU module is read D Power supply module CPU module QX10 QX10 QX10 QX10 Q68 ADV QY41 P QY10 QY10 3E00H 0000H 0010H 0020H 0030H 0040H 0050H 0070H 0080H Start I O number configured in the I O assi...

Page 626: ...ed model name CPU module Q06UDEHCPU Intelligent function module QJ71GP21 SX GOT GOT1000 Example Power supply module CPU module QJ71G P21S SX Empty Empty Empty Empty Empty Empty 3E00H 0000H 0010H 0030H 0040H 0050H 0060H 0070H 0080H Start I O number configured in the I O assignment setting Specify K1 or H1 as the start I O number to be read Power supply module CPU module Q20UDH CPU Q20UDH CPU Q20UDH...

Page 627: ...range but cannot be set in the I O assignment setting screen of the PLC parameter dialog box Target module Stored character string Input module 16 points INPUT_16 Output module 32 points OUTPUT_32 I O combined module 64 points MIXED_64 Intelligent function module 16 points INTELLIGENT_16 4EH N D 1 b15 to b8 b7 to b0 55H U 5FH _ 36H 6 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H 49H I Stores 1 Stores th...

Page 628: ... target module cannot be communicated due to a failure 4101 The range of the device specified by exceeds that of the device that can be used The value specified in n is not within the range from 0 to FFH or 3E0H to 3E3H The value specified in n is not within the range from 0 to FFH or 3E0H 7 18 11 TRACE Trace set TRACER Trace reset 7 18 11 TRACE TRACER Universal model QCPU Models other than Q00UJC...

Page 629: ...ER instruction is executed the TRACE instruction is enabled again 2 When the TRACER instruction is executed SM803 to SM805 are turned OFF Remark 1 The target devices for the sampling trace and its timing can be set with a programming tool For details of the sampling trace refer to the user s manual Function Explanation Program Fundamentals for the CPU module used 2 The sampling trace can be execut...

Page 630: ...d the devices designated for individual programs cannot be used 7 18 12 SP FWRITE Writing data to designated file 7 18 12SP FWRITE Universal model QCPU Models other than Q00UJCPU Q00UCPU and Q01UCPU Setting Data Internal Devices R ZR J U G Zn Constants Other Bit Word Bit Word K H 1 1 Instruction Device Step Basic Process High performance Redundant Universal LCPU Ver SP FWRITE Command SP FWRITE U0 ...

Page 631: ...irst 5 digits of the serial number are 01111 or lower always set the beginning 0H of the file For the High Performance model QCPU Process CPU Redundant CPU Universal model QCPU of which the first 5 digits of the serial number are 01112 or higher set the file position 00000000H to FFFFFFFEH Starting at the beginning of the file FFFFFFFFH Adding at the end of the file 00000000H to FFFFFFFFH User 6 N...

Page 632: ...D instruction in the next scan Use this bit device as the execution completion flag for the SP FWRITE instruction When this instruction is completed abnormally the error completion device 1 is turned ON OFF in synchronization with the processing complete device Use this device as the error completion flag for this instruction SM721 is turned ON during the execution of the instruction This instruct...

Page 633: ... point 0 and is completed normally e An error occurs when the saving space becomes full while data is added and saved In such a case the data that is successfully added saved remains in the medium The error completion is indicated after as much data as possible is added saved 5 When writing data after CSV format conversion a If the extension is omitted CSV is used as an extension b When the existi...

Page 634: ...ata is written after CSV format conversion and the designated No of columns is 0 Example H0100 D10 SP FWRITE D10 K2 U0 D20 D99 M0 Designation in word units D11 D12 D13 D14 D15 D16 D17 D20 D21 D22 D099 D100 D101 D102 D103 D104 D105 D106 K0 K0 K0 K0 K0 H4241 H4443 H0045 K7 K0 K10 K20 K30 K40 K 50 K100 Execution completion type Not used Writing result No of written data In normal completion it is the...

Page 635: ...tion in word units D11 D12 D13 D14 D15 D16 D17 D20 D21 D22 D099 D100 D101 D102 D103 D104 D105 D106 K0 K0 K0 K3 K0 H4241 H4443 H0000 K7 K0 K10 K20 K30 K40 K 50 K100 Execution completion type Not used Writing result No of written data In normal completion it is the same number as the number of data to be written Data type specification File name If a file name consists of 8 or less characters 00s ar...

Page 636: ...truction in an interrupt program If execute it the operation is not guaranteed Starting row 1 2 3 4 CR LF Row 1 Column 1 Column 2 Column 3 Column 4 5 6 CR LF Row 2 Device data Data to be written K6 K1 K2 K3 K4 K5 K6 K5 K7 K8 K9 K10 K11 K12 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 No of request write data 3 Execution type No of columns designation Data type specification CSV format 4H 3 5 Word...

Page 637: ...ag SM0 turns ON and an error code is stored into SD0 Sign of Data Value Bytes per Data Value Byte Count Range Examples Positive Num digits 1 to 5 word specified 1 to 3 byte specified 12345 5 bytes 67 2 bytes Negative Num digits 1 2 to 6 word specified 2 to 4 byte specified 12345 6 bytes 67 3 bytes Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4004 The device that cannot be specifie...

Page 638: ...rd inserted to drive 2 Assume that 8 points from are reserved for the control data devices Ladder Mode List Mode D0 Sets the number of request write data Normal completion display Sets the execution completion type Sets the designation of the number of columns Sets the file name Sets the data type specified Error completion display Sets the data to be written ...

Page 639: ...nts from are reserved for the control data devices Ladder Mode List Mode The written file is displayed as follows D0 Sets the number of request write data Normal completion display Sets the execution completion type Sets the designation of the number of columns Sets the file name Sets the data type specified Error completion display Sets the data to be written Step Instruction Device Contents of t...

Page 640: ... the devices storing the control data The following control data is required Device Item Contents Setting Data Setting Range Set by Execution completion type Designate the execution type 0000H Read binary data 0100H Read data after CSV format conversion 0000H 0100H User 1 Not used Used by system System 2 No of request read data Designate the number of data to request reading Unit Word Even when by...

Page 641: ...ts 6 No of columns designation When binary read is specified at always set 0 When read data after CSV format conversion is specified at set the number of columns from where data will be read 0 No columns Regarded as one row Other than 0 Regarded as the specified number of columns 0H to FFFFH 0 to 65535 User 7 Data type specification 0 Word 1 Byte 0 1 User Head number of the devices storing a file ...

Page 642: ...ned ON at the END processing after the completion of the instruction is detected The bit device is turned OFF at the execution of the END instruction in the next scan Use this bit device as the execution completion flag for the SP FWRITE instruction When this instruction is completed abnormally the error completion device 1 is turned ON OFF in synchronization with the execution completion device U...

Page 643: ...CEL are read by each row The numerical value and character strings are converted into binary data and stored in the device b If the extension is omitted CSV is used as an extension c When the designated file does not exist an error occurs d The data designated by the number of request read data 2 are read from the beginning of the file When the last data of the file is reached before the specified...

Page 644: ... type Not used No of request read data No of columns designation Data type specification File name ABCDE Reading result No of read data Not used File position Measured value Length 1 3 Temperature 21 Main sub item K 21 K0 D107 D108 Data between and Data between and CR Since 1 is a numeric value it is converted to a binary value Since 3 is a numeric value it is converted to a binary value Since 21 ...

Page 645: ...f request read data No of columns designation Data type specification File name ABCD Not used Main sub item Data between and Read data Main sub item Measured value Excess CR LF Length CR LF Temperature 21 CR LF K0 K0 Temperature D105 D103 Measured value D102 Length D104 Excess Loaded data Stores the number of read data Reading result No of read data Since 21 is a numeric value it is converted to a...

Page 646: ...D099 D100 D101 D102 D103 D104 D105 K6 K0 K0 K2 K0 H4241 H4443 H0000 K6 K0 K0 K0 K1 K0 K 21 Execution completion type Not used No of request read data No of columns designation Data type specification File name ABCD Not used Read data Elements outside the designated number of columns are ignored 1 Temperature 21 Main sub item Data between and Length Loaded data Stores the number of read data Readin...

Page 647: ... type Not used No of request read data No of columns designation Data type specification File name ABCD Not used Temperature 21 No data Main sub item Data between and Read data Length Main sub item Measured value Excess CR LF Length CR LF Temperature 21 CR LF Elements outside the designated number of columns are ignored Reading result No of read data Since 21 is a numeric value it is converted to ...

Page 648: ...w Next starting position Column 1 Column 2 Column 3 Column 4 Device data Data to be read out K6 K5 K6 K7 K8 K9 K 10 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 No of request read data Execution type No of columns designation Data type specification CSV format 4H Word Starting row number Read head device No of request read data 2H D0 6H 1 2 3 4 CR LF Row 1 Row 2 5 6 7 8 CR LF 9 10 11 12 CR LF Row...

Page 649: ...s Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2410 The file name specified in file name character string or the subsequent devices does not exist in the specified drive 4004 The device that cannot be specified has been specified 4100 Values designated in control data and the subsequent devices are out of the setting range Excluding 2 The drive specified by drive designation device contains the medium oth...

Page 650: ...10 is turned ON Assume that 8 points from D0 are reserved for the control data devices Assume that 100 bytes from D20 are reserved for the reading devices Ladder Mode List Mode Sets the file name Normal completion display Sets the execution completion type Sets the number of request read data Sets the file position Error completion display Instruction Device Step ...

Page 651: ... units of 16 bit words BIN 32 bit Head device number written to the standard ROM device name n2 The number of write points BIN 16 bit 0 FCompletion device bit 1 FError completion device bit 1 Devices assigned as local devices can not be used 7 18 14 SP DEVST Writing data to standard ROM 7 18 14SP DEVST Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n1 n2 1 1 Sets...

Page 652: ...21 has already turned ON this instruction can not be executed If executed no processing is performed 5 When an error is detected at execution of this instruction the completion device 0 error completion device 1 and SM721 do not turn ON Operation Error 1 In any of the following cases an operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 Error code Error details...

Page 653: ... causes OPERATION ERROR error code 4113 n1 Read offset of the device data storage file specified in units of 16 bit words BIN 32 bit Head device number read from the standard ROM device name n2 The number of reading points BIN 16 bit Function 1 Reads device data for the number of points specified at n2 from the read offset which is specified for n1 of the device data storage file in the standard R...

Page 654: ...is set to the standby type At this time the program setting of the PLC parameter dialog box does not change To transfer a program with the PLOADP instruction a continuous free space is required in the program memory 2 The program added using the PLOADP instruction is assigned the lowest number among the unused program Nos To assign a program number manually store the program number to be assigned ...

Page 655: ...ollows a File usage for each program All the usage of file register device initial value comment and local device of the program transferred by this instruction are set as Use PLC file setting However an error will be returned if both of the conditions below are met when the program is transferred using this instruction Setting is made so that local devices are used in the PLC file setting The num...

Page 656: ...not exist at the drive number specified in The program file which has the same name as the program file to be loaded already exists 2413 There is not enough memory to load the specified program in drive 0 4100 The drive No specified in is invalid 4101 The same number of files as that indicated in the table below has been already registered in the program memory The program No stored in SD720 is al...

Page 657: ...e program memory When the program deleted by the PUNLOADP instruction is not to be executed delete the corresponding program name from the boot setting and program setting of the PLC parameter dialog box b When boot setting has not been made in the PLC parameter dialog box FILE SET ERROR error code 2400 occurs 1 When the program deleted by the PUNLOADP instruction is not to be executed delete the ...

Page 658: ...ype program stored in the program memory drive 0 designated by is deleted from the program memory and at the same time the program stored in the memory card or standard ROM designated by is transferred to the program memory and placed in standby status When the program is transferred to the program memory the program must have a continuous free space The program set as the scan execution type with...

Page 659: ...change the boot setting and program setting of the PLC parameter dialog box for the corresponding program name b When boot setting has not been made in the PLC parameter dialog box FILE SET ERROR error code 2400 occurs 1 When the program replaced by the PSWAPP instruction is to be executed change the program setting of the PLC parameter dialog box for the corresponding program name 2 To execute th...

Page 660: ...ion n points from the device designated by Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2410 The drive No or the file name specified in or does not exist 2413 There is not enough memory to load the specified program in drive 0 4100 The drive No specified in is invalid 4101 The program specified in is not in standby status or is being executed 7 18 19 RBMOV RBMOVP High speed block ...

Page 661: ... source to R10 block No 1 of the destination ZR transfer range 30000 to 30000 10000 1 30000 to 39999 R transfer range 10 1 32768 to 10 1 32768 10000 1 32778 to 42777 Therefore the range 32778 to 39999 overlaps 3 When is a word device and is a bit device the number of bits designated by the bit device digit specification will be transferred If K1Y30 has been designated by the lower four bits of the...

Page 662: ...0 0 0 1 1 1 1 0 1 Y37 to Y34 Y3B to Y38 Y3F to Y3C 1 1 0 1 1 R66 Ignored b0 b3 b15 b4 0 0 0 0 0 R67 0 0 1 1 1 1 1 0 1 0 R68 R69 After execution destination of transfer Before execution source of transfer Instruction Device Step 0 1 1 1 0 1 0 0 0 0 0 1 X20 X23 X2B X28 X2F X2C 0 1 1 0 X27 X24 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 Before execution R100 After execution destination of transfer 0 0 0 0 0 1 1 ...

Page 663: ...s 34 9 µs 121 5 µs 145 1 µs 1111 5 µs 1135 1 µs SRAM card 2 Flash card 2 BMOV Standard RAM 7 3 µs 13 8 µs 116 5 µs 124 2 µs 1106 5 µs 1114 2 µs SRAM card 2 Flash card 2 Q02UCPU RBMOV Standard RAM 9 4 µs 31 3 µs 118 5 µs 141 3 µs 1108 5 µs 1131 3 µs SRAM card 9 4 µs 31 4 µs 178 5 µs 201 3 µs 1708 5 µs 1731 3 µs Flash card 1 9 4 µs 32 1 µs 278 5 µs 301 3 µs 2708 5 µs 2731 3 µs BMOV Standard RAM 5 0 ...

Page 664: ...5 µs 252 3 µs 2208 5 µs 2231 3 µs SRAM card 9 6 µs 31 5 µs 378 5 µs 401 3 µs 3708 5 µs 3731 3 µs BMOV Standard RAM 5 2 µs 11 8 µs 224 5 µs 232 3 µs 2204 5 µs 2212 3 µs SRAM card 5 2 µs 11 8 µs 374 5 µs 382 3 µs 3704 5 µs 3712 3 µs Q03UD E CPU RBMOV Standard RAM 11 2 µs 16 7 µs 230 7 µs 237 1 µs 2210 7 µs 2217 1 µs SRAM card 11 6 µs 16 7 µs 380 7 µs 387 1 µs 3710 7 µs 3717 1 µs BMOV Standard RAM 4 ...

Page 665: ...key on the display unit is pressed while a user message is being displayed the displayed message will disappear To display the message again execute User Message from the menu screen on the display unit 7 If a NULL code 00H is specified as the argument to this instruction then any message currently being displayed will disappear The procedure for specifying a NULL code 00H in the instruction param...

Page 666: ... X10 is set to off Ladder Mode List Mode Action Instruction Device Step 4CH i 6EH e 2DH A 20H w 6FH r 6BH i 6EH g b15 to b8 69H L 65H n 41H 77H 72H o 69H k 67H n 00H D10 D11 D12 D13 D14 D15 D16 D17 Run UMSG instruction b7 to b0 Line A Working User message Line A Working Instruction Device Step Line A Working 60H Line A Working 89H 43H 93H 40H 5EH 5DH b15 to b8 82H 83H 83H 83H 81H 89H 93H 86H 92H 0...

Page 667: ... number first five digits is 13012 or later only Refresh of MELSECNET H when refresh parameters are set QCPU only Auto refresh of CC Link when refresh device is set Auto refresh of intelligent function module when auto refresh is set Function 1 When the ZCOM instruction is executed the CPU module temporarily suspends processing of the sequence program and conducts refresh processing of the network...

Page 668: ...xample of data communications when the ZCOM instruction is not used 2 Example of data communications when the ZCOM instruction is used For details on the transmission delay time on CC Link IE Controller Network and MELSECNET H PLC to PLC network refer to the manuals below CC Link IE Controller Network Reference Manual Q Corresponding MELSECNET H Network System Reference Manual PLC to PLC network b...

Page 669: ...n of a refresh operation will lengthen the sequence program scan time by the amount of time required for the refresh operation 6 Designating Un in the argument enables the target designation of the intelligent function as well as the network modules In this case the auto refresh is performed for the buffer memory of the intelligent function modules It replaces the FROM TO instructions 7 Only with ...

Page 670: ...refresh for the network module of network No 6 while X0 is ON Ladder Mode List Mode 2 The following program conducts a link refresh for the network module mounted to the position whose head I O number is a X Y30 to X Y4F while X0 is ON Ladder Mode List Mode Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2111 The module specified with the head I O number is not a network module or in...

Page 671: ...operation error occurs the error flag SM0 turns ON and an error code is stored into SD0 8 2 1 S RTREAD SP RTREADReading routing information 8 2 1 S RTREAD SP RTREAD LCPU The serial number first five digits is 13012 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Network Type Specification Range MELSECNET H 1 to 64 CC Link IE Controller Network 1 to 120 ...

Page 672: ...rea starting from 4 If all data in or later 0 to 2 is 0 the data for the transfer destination network number specified by n is deleted from the routing parameters 8 2 2 S RTWRITE Registering routing information SP RTWRITE 8 2 2 S RTWRITE SP RTWRITE LCPU The serial number first five digits is 13012 or later Setting Data Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n Network ...

Page 673: ... Mode List Mode Operation Content of routing parameter setting Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 4100 The value in n is the value other than 1 to 239 The data of or later exceeds each setting range The total number of routing information registered in the routing parameter of the network parameters and routing information registered with the RTWRITE instruction exceeds ...

Page 674: ...mory of intelligent function module CPU Module S TO Instruction TO Instruction Basic model QCPU Q00JCPU Unusable Unusable Q00CPU Q01CPU Usable Usable High Performance model QCPU Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU Usable Unusable Process CPU Q02PHCPU Q06PHCPU Q12PHCPU Q25PHCPU Usable Unusable Redundant CPU Q12PRHCPU Q25PRHCPU Unusable Unusable Universal model QCPU Q00UJCPU Unusable Unusable Q00...

Page 675: ...PU Universal model QCPU 0 to 4095 n3 Head number of the devices where data to be written is stored BIN 16 bits n4 Number of data blocks to be written BIN 16 bits Basic model QCPU 1 to 320 High Performance model QCPU Process CPU 1 to 256 Universal model QCPU 1 to 2048 Device of the host CPU which is turned ON for one scan by the completion of writing bits 9 1 1 S TO SP TO Writing to host CPU shared...

Page 676: ...N either 3 The S TO instruction can be executed once to one scan for each CPU When execution condition is established at two or more places at the same time the S TO instruction executed later is not processed since handshake is established automatically 4 The number of data that can be written varies depending on the target CPU module CPU module Number of Write Points Basic model QCPU 1 to 320 Hi...

Page 677: ...hen the specified instruction is improper 4003 When the number of devices specified is incorrect 4004 When an Unavailable device is specified 4100 When the head I O number n1 of the host CPU is other than 3E0H 3E1H 3E2H 3E3H 4101 When the host CPU operation information area system area or host CPU refresh area is specified to the CPU shared memory address n2 of the write destination When the numbe...

Page 678: ...36 2 DTP P 1 to 7168 2 2 The setting range varies depending on the auto refresh setting range of the multiple CPU high speed transmission function Function TO 1 Writes device data of words to n3 to the CPU shared memory address specified by n2 of the host CPU module or later address CPU Slot Slot 0 Slot 1 Slot 2 Head I O number 3E00 3E10 3E20 3E30 n1 3E0 3E1 3E2 3E3 9 1 2 TO TOP DTO DTOP Writing t...

Page 679: ...2 No processing is performed when the number of write points is 0 3 The number of write data varies depending on the target CPU module CPU module Number of Write Points Basic model QCPU 1 to 320 Universal model QCPU 1 to 14336 S S Constant When 5 is designated for CPU shared memory of host CPU n1 n2 S 5 5 5 5 n3 words Writes the same data to the area of n3 words 5 S 0 0H 96 60H 192 C0H 511 1FFH Ho...

Page 680: ...ite Points Basic model QCPU 1 to 160 Universal model QCPU 1 to 7168 Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2110 No CPU module is installed at the position specified for the head I O number of the CPU module 4101 When the number of write points n3 is outside the specified range of the setting data When the CPU shared memory address n2 of the write destination host CPU the num...

Page 681: ...adder Mode List Mode 2 The following program stores 20 points of data from D0 into address 10000 of the CPU shared memory of CPU No 4 when X0 is turned ON Ladder Mode List Mode Remark The n1 is specified by the first 3 digits of the hexadecimal 4 digits which represent the head I O number of the slot mounted to the CPU module CPU Slot Slot 0 Slot 1 Slot 2 Head I O number 3E00 3E10 3E20 3E30 n1 3E0...

Page 682: ...e FROM P instruction is executed in CPU No 1 1 Applicable for the Basic model QCPU and Universal model QCPU Remark Refer to Page 426 Section 7 8 1 for reading the buffer memory of the intelligent function module with the FROM DFRO instruction Designation of CPU shared memory of CPU No 2 FROM H3E1 n1 n2 D n3 Reads data 1 Designation of CPU shared memory of CPU No 1 Designation of intelligent functi...

Page 683: ...the data of n3 words from the CPU shared memory address designated by n2 of the CPU module designated by n1 and stores that data into the area starting from the device designated by a CPU shared memory address of the Basic model QCPU 9 2 1 FROM FROMP DFRO Reading from other CPU shared memory DFROP 9 2 1 FROM FROMP DFRO DFROP Q00CPU Q01CPU The serial number first five digits is 04122 or later High ...

Page 684: ...n3 as the number of data to be read no processing is performed 3 The number of data to be read changes depending on the target CPU module Read of data from the CPU shared memory can also be performed using the intelligent function module devices For intelligent function module device refer to the QnUCPU User s Manual Function Explanation Program Fundamentals or Qn H QnPH QnPRHCPU User s Manual Fun...

Page 685: ...l 4digits which represent the head I O number of the slot mounted to the CPU module 2 The QCPU provides automatic interlocks for the FROM and TO instructions Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2110 No CPU module is installed at the position specified for the head I O number of the CPU module 4101 The head of the CPU shared memory address n2 which performs reading is outs...

Page 686: ...ied in n3 as the number of data to be read no processing is performed 3 The number of data to be read changes depending on the target CPU module Read of data from the CPU shared memory can also be performed using the intelligent function module devices For intelligent function module device refer to the QnUCPU User s Manual Function Explanation Program Fundamentals or Qn H QnPH QnPRHCPU User s Man...

Page 687: ...module 2 The QCPU provides automatic interlocks for the FROM and TO instructions Error code Error details Q00J Q00 Q01 QnH QnPH QnPRH QnU LCPU 2110 No CPU module is installed at the position specified for the head I O number of the CPU module 4101 The head of the CPU shared memory address n2 which performs reading is outside the CPU shared memory range The address of the CPU shared memory n2 which...

Page 688: ...on is available only for the following CPU modules Q03UDCPU Q04UDHCPU Q06UDHCPU The first five digits of serial numeber is 10012 or higer Q10UDHCPU Q13UDHCPU Q20UDHCPU Q26UDHCPU QnUDE H CPU 1 Parameter setting and system configuration to execute the multiple CPU high speed transmission dedicated instruction The multiple CPU high speed transmission dedicated instruction can be executed in the follo...

Page 689: ...en read Program for device specification with the DP DDWR instruction In the device specification data can be written read within the device range of host CPU For example when data register in host CPU is 12k points and data register in another CPU is 16k points data can be written read by 12k points from the start of the data register in another CPU Writable readable device range in device specif...

Page 690: ...le both D1 and D0001 are processed as D1 Whether a device is specified by upper case character or lower case character they are processed as the same For example both D1 and d1 are processed as D1 If a device not existing in another CPU is specified by a character string the instruction will be completed abnormally 4 Managing the multiple CPU high speed transmission area a The multiple CPU high sp...

Page 691: ...d transmission dedicated instructions or the setting values of SD796 to SD799 Number of write read points specified by the instruction D P DDWR instruction D P DDRD instruction 1 to 4 1 1 5 to 20 2 21 to 36 3 37 to 52 4 53 to 68 5 69 to 84 6 85 to 100 7 Multiple CPU high speed transmission area in CPU No 1 Multiple CPU high speed transmission area in CPU No 2 Multiple CPU high speed transmission a...

Page 692: ...s than the number of blocks set at SD796 to SD799 the corresponding special relay SM796 to SM799 turns on CPU No 1 CPU No 2 Execution command SM 797 DP DDWR H3E1 Number of request blocks 4 Turns on when the number of empty blocks is less than the number of blocks used for the DP DDWR instruction The DP DDWR instruction is not executed Multiple CPU high speed transmission area Multiple CPU high spe...

Page 693: ...f X0 X0 11 Execution command of the DDWR instruction to CPU No 2 14 M0 SM797 During execution of the DDWR instruction to CPU No 3 Number of used blocks information CPU No 2 SET M0 During execution the DDWR instruction to CPU No 3 D DDWRH3E1 D0 ZR0 ZR0 M1 Completion status CPU No 2 Write data to CPU No 2 Write data to CPU No 2 Completion devaice CPU No 2 RST M0 During execution of the DDWR instruct...

Page 694: ... instruction is executed at CPU No 1 SM402 Turn on for one scan after RUN MOV K7 SD797 Maximum number of used blocks CPU No 2 X0 SET M0 During execution of the DDWR instruction Write command U3E0 G10000 0 is turned on while CPU No 1 is executing the DP DDWR instruction M0 U3E1 G10000 0 SM797 During execution of the DDWR instruction CPU No 2 is during execution of the instruction Number of used blo...

Page 695: ... The similar program can be used when using the D P DDRD instruction of the multiple CPU high speed transmission dedicated instruction SM402 Turn on for one scan after RUN MOV K1 SD796 Maximum number of used blocks CPU No 1 X20 Read instruction SET M0 During execution the DDRD instruction U3E1 G10000 0 is turned on while CPU No 2 is executing the DP DDRD instruction M0 U3E0 G10000 0 SM796 During e...

Page 696: ...ted at the rise of the write command X0 X0 M0 Write command During writing 37 RST Z2 SET M0 During writing SET M1 During execution of the DDWR instruction 68 M0 During writing M4 Execution request of the next DDWR instruction The DDWR instruction is executed 71 M1 SM797 During execution of the DDWR instruction Number of used blocks information CPU No 2 D DDWR H3E1 D0 ZR0Z2 ZR0Z2 M2 Completion stat...

Page 697: ...ce 2 Error completion device 2 K200 Z2 Z2 K1000 Z2 K1000 PLS M7 Execution request of the next DDWR instruction RST M0 During writing END 241 The maximum number of used blocks for multiple CPU high speed transmission dedicated instruction setting is set to CPU No 2 SM402 Turn on for one scan after RUN MOV K7 SD797 Maximum number of used blocks CPU No 2 MOV K100 D1 Number of write points 1 MOV K100 ...

Page 698: ...a Internal Devices R ZR J U G Zn Constants K H Other Bit Word Bit Word n 1 2 3 4 2 2 2 6 4 Setting data Description Data type n The result of dividing the start I O number of another CPU by 16 CPU No 1 3E0H CPU No 2 3E1H CPU No 3 3E2H CPU No 4 3E3H BIN 16 bits Start device of the host CPU that stores control data Device name Start device of the host CPU that stores data to be written Start device ...

Page 699: ...he next END processing At error completion an error code is stored at control data 0 Completion status 3 The number of blocks used for the instruction depends on the number of write points refer to Page 686 Section 10 1 Number of blocks used for the instruction 4 The instruction will be completed abnormally when there are no empty blocks in the multiple CPU high speed transmission area Set the num...

Page 700: ...not use multiple CPU high speed transmission The instruction was executed with the CPU module that cannot use this instruction The host CPU has been specified The CPU where the instruction cannot be executed has been specified 4351 Another CPU does not support this instruction 4352 The number of devices is incorrect 4353 The device that cannot be used for the instruction has been specified 4354 A ...

Page 701: ...rs cannot be used per program 5 FD indirect specification cannot be used 6 FX and FY cannot be used Set Data 7 By specifying a file register R ZR data can be read to devices in another CPU outside the range of host CPU 8 By specifying the start device by data can be read to devices in another CPU outside the range of host CPU 9 Indexed devices cannot be specified e g D0Z0 10 3 D DDRD DP DDRD Readi...

Page 702: ...epends on the number of read points refer to Page 686 Section 10 1 Number of blocks used for the instruction 4 The instruction will be completed abnormally when there are no empty blocks in the multiple CPU high speed transmission area Set the number of blocks used for the instruction at special registers SD796 to SD799 and use the special relays SM796 to SM799 as an interlock prevent error comple...

Page 703: ... executed with the CPU module that cannot use this instruction The host CPU has been specified The CPU where the instruction cannot be executed has been specified 4351 Another CPU does not support this instruction 4352 The number of devices is wrong 4353 The device that cannot be used for the instruction has been specified 4354 A device has been specified by the character string that cannot be use...

Page 704: ...made to or the following conditions must be met Digits are specified by 16 bits 4 digits The start bit device is multiples of 16 10H 2 Execute this instruction after checking that the read target CPU is powered on Not doing so may end up no processing 3 If changing a range of the device specified at setting data between after execution of the instruction and turn on of the completion device data t...

Page 705: ...SW instruction is stored into the system switching instruction argument SD1602 of the new control system CPU module when system switching is normally completed 3 By reading the SD1602 value from the new control system CPU module which the SP CONTSW instruction was used for system switching can be confirmed 2 The value specified for the SP CONTSW instruction can be confirmed in the error common inf...

Page 706: ...ccurred in the standby system 3 Watchdog timer error occurred in the control system 4 Preparations being made for tracking transfer 5 Communication time out 6 Stop error occurred in the standby system Excluding watchdog timer error 7 Operating status different between the control system and standby system 8 Memory copy being executed from the control system to the standby system 9 Write during RUN...

Page 707: ...ge of the system switching command M100 If the system switching command M100 remains ON the SP CONTSW instruction is also executed by the new control system CPU module after system switching Therefore M101 is added to the execution conditions as a consecutive switching prevention flag Ladder Mode List Mode Instruction Device Step ...

Page 708: ...ime of each instruction shown in Page 707 Appendix 1 2 Page 722 Appendix 1 3 and Page 746 Appendix 1 4 3 END processing time I O refresh time and processing time for the function that increases the scan time Refer to the following manual s for the END processing time I O refresh time and processing time for the function that increases the scan time a For QCPUs QnUCPU User s Manual Functions Explan...

Page 709: ...dd the processing time shown in Page 721 Appendix 1 2 6 to that of the instruction 1 Sequence instructions Instruction Condition Device Processing Time µs Q00JCPU Q00CPU Q01CPU LD LDI AND ANI OR ORI X0 0 20 0 16 0 10 D0 0 0 30 0 24 0 15 LDP LDF ANDP ANDF ORP ORF X0 0 30 0 24 0 15 D0 0 ANB ORB MPS MRD MPP 0 20 0 16 0 10 INV When not executed 0 20 0 16 0 10 When executed MEP MEF When not executed 0 ...

Page 710: ...en displayed 255 205 195 Display completed 195 160 150 RST Y When not executed 0 20 0 16 0 10 When executed When not changed OFF OFF 0 20 0 16 0 10 When changed ON OFF 0 20 0 16 0 10 D0 0 When not executed 0 40 0 32 0 20 When executed When not changed ON ON 0 40 0 32 0 20 When changed OFF ON 0 40 0 32 0 20 SM When not executed 0 20 0 16 0 10 When executed 0 20 0 16 0 10 F When not executed 0 48 0 ...

Page 711: ...0 64 0 40 OR When not executed 0 70 0 56 0 35 When executed In conductive status 0 80 0 64 0 40 In non conductive status 0 80 0 64 0 40 LD In conductive status 0 80 0 64 0 40 In non conductive status 0 80 0 64 0 40 AND When not executed 0 70 0 56 0 35 When executed In conductive status 0 80 0 64 0 40 In non conductive status 0 80 0 64 0 40 OR When not executed 0 70 0 56 0 35 When executed In condu...

Page 712: ... 80 0 64 0 40 When executed In conductive status 1 0 0 80 0 50 In non conductive status 1 0 0 80 0 50 ORD When not executed 0 80 0 64 0 40 When executed In conductive status 1 0 0 80 0 50 In non conductive status 1 0 0 80 0 50 LDD In conductive status 1 0 0 80 0 50 In non conductive status 1 0 0 80 0 50 ANDD When not executed 0 80 0 64 0 40 When executed In conductive status 1 0 0 80 0 50 In non c...

Page 713: ... BKCMP n n 1 130 105 98 BKCMP P n n 96 205 175 165 BKCMP n n 1 130 105 98 BKCMP P n n 96 210 180 165 BKCMP n n 1 130 105 97 BKCMP P n n 96 205 175 165 P When executed 1 0 0 80 0 50 P When executed 1 2 0 96 0 60 P When executed 1 0 0 80 0 50 P When executed 1 2 0 96 0 60 D D P When executed 1 3 1 04 0 65 D D P When executed 1 5 1 2 0 75 D D P When executed 1 3 1 04 0 65 D D P When executed 1 5 1 2 ...

Page 714: ... BK n n 1 105 86 80 BK P n n 96 185 155 140 INC INCP 0 70 0 56 0 35 DINC DINCP 0 90 0 72 0 45 DEC DECP 0 70 0 56 0 35 DDEC DDECP 0 90 0 72 0 45 BCD BCDP 20 16 15 DBCD DBCDP 26 21 20 BIN BINP 19 16 15 DBIN DBINP 22 18 17 DBL DBLP 19 16 15 WORD WORDP 23 19 17 GRY GRYP 19 16 15 DGRY DGRYP 23 19 17 GBIN GBINP 52 42 40 S D S D S1 S2 D S1 S2 D S D S D S1 S2 D S1 S2 D S D S D S1 S2 D S1 S2 D S1 S2 D S1 S...

Page 715: ...MOV DMOVP D0 D1 0 90 0 72 0 45 D0 J1 W1 165 135 120 MOV MOVP 0 characters 46 38 35 32 characters 98 80 73 CML CMLP 0 70 0 56 0 35 DCML DCMLP 0 90 0 72 0 45 BMOV n n 1 27 21 20 BMOVP n n 96 72 62 53 FMOV n n 1 23 19 17 FMOVP n n 96 48 41 36 XCH XCHP 7 6 6 3 5 7 DXCH DXCHP 9 5 8 0 7 1 BXCH n n 1 62 51 48 BXCHP n n 96 165 140 125 SWAP SWAPP 17 14 13 CJ 10 8 5 8 1 SCJ 10 8 5 8 1 JMP 11 8 5 8 1 GOEND 3...

Page 716: ...P When executed 1 3 1 04 0 65 DOR DORP When executed 1 5 1 2 0 75 BKOR n n 1 110 87 81 BKORP n n 96 185 155 140 WXOR WXORP When executed 1 0 0 80 0 50 WXOR WXORP When executed 1 2 0 96 0 60 DXOR DXORP When executed 1 3 1 04 0 65 DXOR DXORP When executed 1 5 1 2 0 75 BKXOR n n 1 110 87 81 BKXORP n n 96 185 155 140 WXNR WXNRP When executed 1 0 0 80 0 50 WXNR WXNRP When executed 1 2 0 96 0 60 DXNR DX...

Page 717: ... n n 15 12 9 8 9 5 BSFLR n n 1 42 35 33 BSFLRP n n 96 69 58 54 BSFL n n 1 41 34 32 BSFLP n n 96 63 53 50 DSFR n n 1 19 16 15 DSFRP n n 96 71 61 53 DSFL n n 1 19 16 15 DSFLP n n 96 70 60 52 BSET n n 1 27 22 20 BSETP n n 15 27 22 20 BRST n n 1 27 22 21 BRSTP n n 15 27 22 21 TEST TESTP 35 30 27 DTEST DTESTP 37 31 28 BKRST n n 1 49 41 38 BKRSTP n n 96 64 54 50 SER n SERP n n 1 All match 56 54 42 None ...

Page 718: ...8 40 36 MAXP n n 96 300 240 235 MIN n n 1 48 40 36 MINP n n 96 300 240 235 DMAX n n 1 52 43 39 DMAXP n n 96 600 490 460 DMIN n n 1 52 43 39 DMINP n n 96 585 475 445 SORT n n 1 1 66 55 50 n 96 16 329 270 252 DSORT n n 1 1 98 57 52 n 96 16 386 317 294 WSUM n n 1 52 43 40 WSUMP n n 96 175 140 135 DWSUM n n 1 61 51 46 DWSUMP n n 96 515 420 395 FOR n n 0 11 8 9 8 1 NEXT 8 8 7 3 6 8 BREAK BREAKP 37 30 2...

Page 719: ...ta points 96 93 82 70 FPOP FPOPP Number of data points 1 40 37 32 Number of data points 96 40 37 32 FINS FINSP Number of data points 0 53 44 38 Number of data points 96 100 89 76 FDEL FDELP Number of data points 1 60 50 43 Number of data points 96 110 95 82 FROM n1 n2 n3 FROMP n1 n2 n3 1 n3 1 125 105 93 n3 1000 740 695 685 DFRO n1 n2 n3 DFROP n1 n2 n3 1 n3 1 130 110 100 n3 500 745 695 675 TO n1 n2...

Page 720: ... executed In conductive status 42 0 35 0 32 5 In non conductive status 37 0 31 0 28 5 LDE Single precision In conductive status 46 0 38 0 35 5 In non conductive status 43 5 36 0 33 0 ANDE Single precision When not executed 1 5 1 2 1 0 When executed In conductive status 38 5 31 5 29 0 In non conductive status 39 5 33 0 30 5 ORE Single precision When not executed 1 5 1 2 1 0 When executed In conduct...

Page 721: ...ted 1 5 1 2 1 0 When executed In conductive status 45 0 38 5 34 5 In non conductive status 37 5 31 0 28 5 E E P Single precision 0 0 29 5 25 0 23 0 2127 2127 65 5 60 5 49 5 E E P Single precision 0 0 31 0 27 0 24 0 2127 2127 66 5 56 0 51 0 E E P Single precision 0 0 29 5 25 0 23 0 2127 2127 48 5 41 0 37 5 E E P Single precision 0 0 31 0 27 0 24 0 2127 2127 50 5 42 5 38 5 E E P Single precision 0 0...

Page 722: ...4 0 TAN TANP Single precision 224 0 190 0 173 0 RAD RADP Single precision 51 0 43 0 39 0 DEG DEGP Single precision 51 0 43 0 39 0 SQR SQRP Single precision 60 0 51 0 46 5 EXP EXPP Single precision 10 306 0 259 0 235 0 1 306 0 259 0 235 0 LOG LOGP Single precision 1 73 0 61 5 56 0 10 301 0 255 0 232 0 RND RNDP 12 5 11 0 10 0 SRND SRNDP 13 5 12 0 11 0 S S S S ...

Page 723: ...CPU shared memory of host CPU n3 1 100 95 n3 320 440 425 S TO Write to CPU shared memory of host CPU n4 1 205 195 n4 320 545 525 For a system having only the main base unit Instruction processing time increase 4 0 54 number of points processed number of other CPUs µs For a system including extension base units Instruction processing time increase 4 1 30 number of points processed number of other C...

Page 724: ...n Condition Device Processing Time µs Qn QnH QnPH QnPRH LD LDI AND ANI OR ORI 0 079 0 034 0 034 0 034 LDP LDF ANDP ANDF ORP ORF 0 158 0 068 0 068 0 068 ANB ORB MPS MRD MPP 0 079 0 034 0 034 0 034 INV When not executed 0 079 0 034 0 034 0 034 When executed MEP MEF When not executed 0 173 0 073 0 073 0 073 When executed EGP EGF When not executed OFF OFF ON ON 0 158 0 068 0 068 0 068 When executed OF...

Page 725: ...uted 0 158 0 068 0 068 0 068 When executed 0 158 0 068 0 068 0 068 F When not executed 0 47 0 20 0 20 0 20 When executed When displayed 90 38 38 38 Display completed 0 47 0 20 0 20 0 20 T C When not executed 0 63 0 27 0 27 0 27 When executed 0 63 0 27 0 27 0 27 D When not executed 0 24 0 10 0 10 0 10 When executed 0 24 0 10 0 10 0 10 Z When not executed 0 47 0 20 0 20 0 20 When executed 4 3 1 9 1 ...

Page 726: ...When not executed 0 24 0 10 0 10 0 10 When executed In conductive status 0 24 0 10 0 10 0 10 In non conductive status 0 24 0 10 0 10 0 10 OR When not executed 0 24 0 10 0 10 0 10 When executed In conductive status 0 24 0 10 0 10 0 10 In non conductive status 0 24 0 10 0 10 0 10 LD In conductive status 0 24 0 10 0 10 0 10 In non conductive status 0 24 0 10 0 10 0 10 AND When not executed 0 24 0 10 ...

Page 727: ...us 0 55 0 24 0 24 0 24 In non conductive status 0 55 0 24 0 24 0 24 ORD When not executed 0 39 0 17 0 17 0 17 When executed In conductive status 0 55 0 24 0 24 0 24 In non conductive status 0 55 0 24 0 24 0 24 LDD In conductive status 0 55 0 24 0 24 0 24 In non conductive status 0 55 0 24 0 24 0 24 ANDD When not executed 0 39 0 17 0 17 0 17 When executed In conductive status 0 55 0 24 0 24 0 24 In...

Page 728: ...2 40 6 4 6 4 14 9 6 4 Double precision When not executed When executed In conductive status 93 40 14 9 6 4 In non conductive status 92 40 14 9 6 4 ORE 1 Single precision When not executed 0 55 0 24 0 24 0 24 When executed In conductive status 93 40 6 4 6 4 14 9 6 4 In non conductive status 92 40 6 4 6 4 14 9 6 4 Double precision When not executed 0 55 0 24 When executed In conductive status 93 40 ...

Page 729: ...nductive status 92 40 14 9 6 4 LDE 1 Single precision When not executed 92 40 6 4 6 4 In conductive status 14 9 6 4 92 40 6 4 6 4 14 9 6 4 Double precision In non conductive status 92 40 14 9 6 4 92 40 14 9 6 4 ANDE 1 Single precision When not executed 0 55 0 24 0 24 0 24 When executed In conductive status 92 40 6 4 6 4 14 9 6 4 In non conductive status 93 40 6 4 6 4 14 9 6 4 Double precision When...

Page 730: ... 4 6 4 14 9 6 4 In non conductive status 92 40 6 4 6 4 14 9 6 4 Double precision When not executed 0 55 0 24 When executed In conductive status 92 40 14 9 6 4 In non conductive status 92 40 14 9 6 4 LDE 1 Single precision In conductive status 92 40 6 4 6 4 14 9 6 4 In non conductive status 92 40 6 4 6 4 14 9 6 4 Double precision In conductive status 92 40 14 9 6 4 In non conductive status 92 40 14...

Page 731: ...n When not executed 0 55 0 24 When executed In conductive status 92 40 14 9 6 4 In non conductive status 92 40 14 9 6 4 ORE 1 Single precision When not executed 0 55 0 24 0 24 0 24 When executed In conductive status 92 40 6 4 6 4 14 9 6 4 In non conductive status 92 40 6 4 6 4 14 9 6 4 Double precision When not executed 0 55 0 24 When executed In conductive status 92 40 14 9 6 4 In non conductive ...

Page 732: ...R When not executed 0 56 0 24 0 24 0 24 When executed In conductive status 32 14 14 14 In non conductive status 39 16 16 16 LD In conductive status 40 17 17 17 In non conductive status 32 14 14 14 AND When not executed 0 56 0 23 0 23 0 23 When executed In conductive status 39 16 16 16 In non conductive status 32 14 14 14 OR When not executed 0 56 0 24 0 24 0 24 When executed In conductive status 3...

Page 733: ... 20 0 20 P 2 7 1 2 1 2 1 2 D D P 7 9 3 4 3 4 3 4 D D P 14 6 1 6 1 6 1 B B P 2 2 1 0 1 0 1 0 B B P 5 0 2 2 2 2 2 2 B B P 2 0 0 9 0 9 0 9 B B P 4 9 2 1 2 1 2 1 DB DB P 12 5 0 5 0 5 0 DB DB P 12 5 3 5 3 5 3 DB DB P 11 4 8 4 8 4 8 DB DB P 12 5 2 5 2 5 2 B B P 3 7 1 6 1 6 1 6 B B P 3 8 1 6 1 6 1 6 DB DB P 24 10 10 10 DB DB P 27 12 12 12 S D S D S1 S2 D S1 S2 D S D S D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1...

Page 734: ...27 210 90 E E P Single precision 0 0 2 4 1 1 1 1 1 1 2126 2127 2 4 1 1 1 1 1 1 Double precision 0 0 222 96 2126 2127 222 96 E E P Single precision 0 1 12 5 2 5 2 5 2 2127 2126 12 5 2 5 2 5 2 Double precision 0 1 369 159 2127 2126 369 159 P 68 29 29 29 P 81 35 35 35 INC INCP 0 32 0 14 0 14 0 14 DINC DINCP 0 47 0 20 0 20 0 20 DEC DECP 0 32 0 14 0 14 0 14 DDEC DDECP 0 47 0 20 0 20 0 20 BCD BCDP 1 1 0...

Page 735: ... 5 1 1 1 1 1 1 Double precision 0 24 10 1234567890 3 24 10 FLT FLTP Single precision 0 2 1 0 92 0 92 0 92 7FFFH 2 1 0 92 0 92 0 92 Double precision 0 22 9 6 7FFFH 22 9 6 DFLT DFLTP Single precision 0 2 1 0 88 0 88 0 88 7FFFFFFFH 2 1 0 88 0 88 0 88 Double precision 0 26 11 7FFFFFFFH 26 11 DBL DBLP 4 5 1 9 1 9 1 9 WORD WORDP 4 7 2 0 2 0 2 0 GRY GRYP 4 7 2 0 2 0 2 0 DGRY DGRYP 5 3 2 3 2 3 2 3 GBIN GB...

Page 736: ...CHP 1 3 0 54 0 54 0 54 BXCH n n 1 31 13 13 13 BXCHP n n 96 84 36 36 36 SWAP SWAPP 3 7 1 6 1 6 1 6 CJ 3 2 1 4 1 4 1 4 SCJ 3 2 1 4 1 4 1 4 JMP 3 2 1 4 1 4 1 4 GOEND 0 39 0 34 0 34 0 34 DI 0 95 0 41 0 41 0 41 EI 1 3 0 54 0 54 0 54 IMASK 11 4 6 4 6 4 6 IRET 1 6 0 68 0 68 0 68 RFS RFSP n 1 6 7 4 7 4 7 4 7 n 96 19 13 13 13 UDCNT1 15 6 5 6 5 UDCNT2 16 6 8 6 8 TTMR 10 4 4 4 4 STMR 20 7 1 7 1 ROTC 26 11 11...

Page 737: ... 17 0 17 0 17 WOR WORP When executed 0 47 0 20 0 20 0 20 DOR DORP When executed 0 71 0 31 0 31 0 31 DOR DORP When executed 0 79 0 34 0 34 0 34 BKOR n n 1 36 16 16 16 BKORP n n 96 74 32 32 32 WXOR WXORP When executed 0 39 0 17 0 17 0 17 WXOR WXORP When executed 0 47 0 20 0 20 0 20 DXOR DXORP When executed 0 71 0 31 0 31 0 31 DXOR DXORP When executed 0 79 0 34 0 34 0 34 BKXOR n n 1 36 16 16 16 BKXOR...

Page 738: ...n n 1 20 8 6 8 6 8 6 BSFRP n n 96 24 10 10 10 BSFL n n 1 20 8 5 8 5 8 5 BSFLP n n 96 23 10 10 10 DSFR n n 1 1 3 0 58 0 58 0 58 DSFRP n n 96 25 11 11 11 DSFL n n 1 1 3 0 58 0 58 0 58 DSFLP n n 96 26 11 11 11 BSET n n 1 7 6 3 3 3 3 3 3 BSETP n n 15 7 6 3 3 3 3 3 3 BRST n n 1 7 6 3 3 3 3 3 3 BRSTP n n 15 7 6 3 3 3 3 3 3 TEST TESTP 8 2 3 5 3 5 3 5 DTEST DTESTP 9 2 3 9 3 9 3 9 BKRST n n 1 18 7 8 7 8 7 ...

Page 739: ...0 20 20 WTOBP n n 96 99 43 43 43 BTOW n n 1 45 19 19 19 BTOWP n n 96 89 38 38 38 MAX n n 1 17 7 1 7 1 7 1 MAXP n n 96 136 59 59 59 MIN n n 1 17 7 1 7 1 7 1 MINP n n 96 159 69 69 69 DMAX n n 1 27 12 12 12 DMAXP n n 96 181 78 78 78 DMIN n n 1 27 12 12 12 DMINP n n 96 112 48 48 48 SORT n n 1 1 16 7 1 7 1 7 1 n 96 16 87 8 37 9 37 9 37 9 DSORT n n 1 1 17 7 1 7 1 7 1 n 96 16 96 1 41 6 41 6 41 6 WSUM n n...

Page 740: ...Pn to 134 57 57 57 ECALL Pn ECALLP Pn Program name 77 33 33 33 ECALL Pn to ECALLP Pn to Program name 162 70 70 70 EFCALL Pn EFCALLP Pn Program name 78 34 34 34 EFCALL Pn to EFCALLP Pn to Program name 200 86 86 86 COM 55 16 16 16 IX 12 5 2 5 2 5 2 IXEND 4 7 2 0 2 0 2 0 IXDEV IXSET Number of contacts 1 48 21 21 21 Number of contacts 14 93 40 40 40 FIFW FIFWP Number of data points 0 11 4 5 4 5 4 5 Nu...

Page 741: ...0 20 20 n3 1000 479 412 412 412 DTO n1 n2 n3 DTOP n1 n2 n3 1 n3 1 50 23 23 23 n3 500 457 416 416 416 PR SM701ON Variable 1 character 33 11 11 Variable 32 character 48 18 18 SM701OFF 21 7 8 7 8 PRC 181 16 16 LED When displayed Display completed LEDC When displayed Display completed LEDR No display no display 0 40 0 17 0 17 0 17 LED instruction execution no display 103 44 44 44 CHKST 5 8 2 5 2 5 2 5...

Page 742: ... 17 17 LEN LENP 1 character 18 8 0 8 0 8 0 96 characters 86 37 37 37 STR STRP 53 23 23 23 DSTR DSTRP 123 53 53 53 VAL VALP 95 41 41 41 DVAL DVALP 166 72 72 72 ESTR ESTRP 564 243 243 243 EVAL EVALP Decimal point format all 2 digit specification 100 43 43 43 Exponent format all 6 digit specification 127 55 55 55 ASC n n 1 64 28 28 28 ASCP n n 96 289 125 125 125 HEX n n 1 60 26 26 26 HEXP n n 96 343 ...

Page 743: ...cision 2367 1019 ATAN ATANP Single precision 157 68 68 68 Double precision 3140 1352 RAD RADP Single precision 17 7 2 7 2 7 2 Double precision 24 10 DEG DEGP Single precision 17 7 2 7 2 7 2 Double precision 23 9 9 SQR SQRP Single precision 28 12 12 12 Double precision 1812 780 EXP EXPP Single precision 10 129 56 56 56 1 Double precision 10 2386 1026 1 LOG LOGP Single precision 1 113 49 49 49 10 Do...

Page 744: ...4 Digit increase 13 5 4 5 4 5 4 DATE DATE P No digit increase 12 5 2 5 2 5 2 Digit increase 12 5 2 5 2 5 2 SECOND SECONDP 10 4 5 4 5 4 5 HOUR HOURP 12 5 2 5 2 5 2 MSG 1 character 3 0 1 3 1 3 1 3 32 characters 3 0 1 3 1 3 1 3 PKEY Initial time 20 8 6 8 6 8 6 No reception 19 8 2 8 2 8 2 PSTOP PSTOPP 79 34 34 34 POFF POFFP 79 34 34 34 PSCAN PSCNAP 75 32 32 32 PLOW PLOWP 80 34 34 WDT WDTP 5 9 2 6 2 6 ...

Page 745: ...289 READ SREAD WRITE SWRITE SEND RECV REQ ZNFR ZNTO ZNRD MELSECNET 10 MELSECNET II ZNWR MELSECNET 10 MELSECNET II RFRP RTOP Instruction Condition Device Processing Time µs Qn QnH QnPH QnPRH UNIRD 79 34 34 34 TRACE Start 176 76 76 76 STRA execution completion 6 3 2 7 2 7 2 7 TRACER 19 8 2 8 2 8 2 SP FWRITE 84 36 36 36 SP FREAD 82 35 35 35 PLOADP 58 25 25 PUNLOADP 272 117 117 PSWAPP 308 133 133 RBMO...

Page 746: ...ll CPUs 860 730 730 Without auto refresh of CPU shared memory 43 20 20 20 FROM 1 Reading from CPU shared memory of another CPU n3 1 59 29 29 n3 1000 530 500 500 Reading buffer memory of intelligent function module 2 n3 1 Main base unit 51 24 24 Extension base unit 54 27 27 n3 1000 Main base unit 540 480 480 Extension base unit 1100 1050 1050 S TO Writing to CPU shared memory of host CPU n3 1 TO in...

Page 747: ...72 1 72 1 72 When SRAM card is used Q2MEM 1MBS Q2MEM 2MBS Bit Source 5 22 2 25 2 25 2 25 Destination 4 09 1 76 1 76 1 76 Word Source 2 25 0 97 0 97 0 97 Destination 3 42 1 47 1 47 1 47 Double word Source 2 49 1 07 1 07 1 07 Destination 3 65 1 57 1 57 1 57 Module access device Un G U3En G0 to G4095 Bit Source 35 56 15 31 15 31 15 31 Destination 65 08 28 01 28 01 28 01 Word Source 32 76 14 10 14 10 ...

Page 748: ...hat of the instruction 3 When using an F T ST C device with an OUT SET RST instruction add the processing time for each instruction with reference to the adding time in 3 4 Since the processing time of an instruction varies depending on that of the cash function both the minimum and maximum values are described in the table 1 Subset instruction processing time table a When using Q00UJCPU Q00UCPU Q...

Page 749: ... status In non conductive status OR When not executed 0 360 0 240 0 180 0 120 When executed In conductive status In non conductive status LD In conductive status 0 360 0 240 0 180 0 120 In non conductive status AND When not executed 0 360 0 240 0 180 0 120 When executed In conductive status In non conductive status OR When not executed 0 360 0 240 0 180 0 120 When executed In conductive status In ...

Page 750: ...executed 0 360 0 240 0 180 0 120 When executed In conductive status In non conductive status LDD In conductive status 0 360 0 240 0 180 0 120 In non conductive status ANDD When not executed 0 360 0 240 0 180 0 120 When executed In conductive status In non conductive status ORD When not executed 0 360 0 240 0 180 0 120 When executed In conductive status In non conductive status When executed 0 360 ...

Page 751: ...0 FLT Single precision 0 0 300 0 220 0 180 0 140 7FFFH 0 300 0 220 0 180 0 140 DFLT Single precision 0 0 300 0 220 0 180 0 140 7FFFFFFFH 0 300 0 220 0 180 0 140 INT Single precision 0 0 300 0 220 0 180 0 140 32766 5 0 300 0 220 0 180 0 140 DINT Single precision 0 0 300 0 220 0 180 0 140 1234567890 3 0 300 0 220 0 180 0 140 MOV 0 240 0 160 0 120 0 080 DMOV 0 240 0 160 0 120 0 080 EMOV 0 240 0 160 0...

Page 752: ...11 500 2 300 11 500 2 400 7 500 n 15 2 250 11 500 2 300 11 500 2 300 11 500 2 500 7 500 DROR n n 1 2 350 11 500 2 350 11 500 2 350 11 500 2 400 10 300 n 31 2 350 11 500 2 350 11 500 2 350 11 500 2 500 10 300 DRCR n n 1 2 350 13 300 2 350 13 300 2 350 13 300 2 500 12 700 n 31 2 350 14 900 2 350 14 900 2 350 14 900 2 500 12 700 DROL n n 1 2 350 10 800 2 350 10 800 2 350 10 800 2 500 11 800 n 31 2 35...

Page 753: ...ANDFI ORPI ORFI When executed 0 080 0 038 0 038 0 038 OUT When not changed 0 020 0 0095 0 0095 0 0095 When changed SET RST When not executed 0 020 0 0095 0 0095 0 0095 Basic instruction LD In conductive status 0 060 0 0285 0 0285 0 0285 In non conductive status AND When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status In non conductive status OR When not executed 0 060 0 ...

Page 754: ...executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status In non conductive status OR When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status In non conductive status LDD In conductive status 0 060 0 0285 0 0285 0 0285 In non conductive status ANDD When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status In non conductive status ORD When ...

Page 755: ...285 When executed 0 080 0 038 0 038 0 038 When executed 0 060 0 0285 0 0285 0 0285 When executed 0 080 0 038 0 038 0 038 D When executed 0 060 0 0285 0 0285 0 0285 D When executed 0 080 0 038 0 038 0 038 D When executed 0 060 0 0285 0 0285 0 0285 D When executed 0 080 0 038 0 038 0 038 When executed 0 120 0 057 0 057 0 057 When executed 0 220 0 110 0 110 0 110 D When executed 0 200 0 095 0 095 0 0...

Page 756: ...600 3 900 5 100 3 900 5 100 3 900 5 100 SM237 ON 1 6 000 7 800 2 900 3 700 2 900 3 700 2 900 3 700 7 100 8 800 5 900 7 600 5 900 7 600 5 900 7 600 n 96 SM237 OFF 1 9 300 11 900 4 400 5 700 4 400 5 700 4 400 5 700 SM237 ON 1 7 100 9 100 3 400 4 300 3 400 4 300 3 400 4 300 FMOV 5 300 5 900 4 200 4 800 4 200 4 800 4 200 4 800 n 1 SM237 OFF 1 7 000 8 000 3 400 3 800 3 400 3 800 3 400 3 800 SM237 ON 1 ...

Page 757: ...00 1 800 2 100 1 800 2 100 1 800 2 100 n 15 2 400 2 800 1 800 2 200 1 800 2 200 1 800 2 200 DROR n n 1 2 400 3 400 1 900 2 700 1 900 2 700 1 900 2 700 n 31 2 500 3 400 1 900 2 700 1 900 2 700 1 900 2 700 DRCR n n 1 2 500 4 800 1 900 4 200 1 900 4 200 1 900 4 200 n 31 2 500 4 900 1 900 4 200 1 900 4 200 1 900 4 200 DROL n n 1 2 500 3 900 1 800 3 200 1 800 3 200 1 800 3 200 n 31 2 500 3 900 1 800 3 ...

Page 758: ...rce 0 220 Destination 0 180 Double word Source 0 440 Destination 0 380 When SRAM card is used Q3MEM 4MBS Q3MEM 8MBS Bit Source 0 160 Destination 0 320 Word Source 0 160 Destination 0 140 Double word Source 0 320 Destination 0 300 File register ZR Extended data register D Extended link register W When standard RAM is used Bit Source 0 220 0 180 0 160 0 140 Destination 0 280 0 320 0 300 0 280 Word S...

Page 759: ...0 152 Destination 0 140 0 133 0 133 0 133 Double word Source 0 320 0 304 0 304 0 304 Destination 0 300 0 295 0 295 0 295 File register ZR Extendeddata register D Extended link register W When standard RAM is used Bit Source 0 120 0 057 0 057 0 057 Destination 0 120 0 048 0 048 0 048 Word Source 0 120 0 057 0 057 0 057 Destination 0 120 0 048 0 048 0 048 Double word Source 0 220 0 105 0 105 0 105 D...

Page 760: ...00 RST F When not executed 0 120 0 080 0 006 0 004 When executed When displayed 55 800 55 800 55 800 26 500 Display completed 29 200 29 200 29 200 21 600 T ST C When not executed 0 360 0 240 0 180 0 120 When executed 0 360 0 240 0 180 0 120 Instruction name Device name Condition Processing Time µs Q03UD E CPU Q04 Q06UD E H CPU Q10 Q13 Q20 Q26UD E HCPU Q50 Q100UDEH CPU OUT F When not executed 1 940...

Page 761: ...ximum values are described in the table 1 Table of the processing time of instructions other than subset instructions a When using Q00UJCPU Q00UCPU Q01UCPU and Q02UCPU Category Instruction Condition Device Processing Time µs Q00UJCPU Q00UCPU Q01UCPU Q02UCPU Min Max Min Max Min Max Min Max Sequence instruction ANB ORB MPS MRD MPP 0 120 0 080 0 060 0 040 INV When not executed 0 120 0 080 0 060 0 040...

Page 762: ...ductive status 4 400 20 900 4 400 20 900 4 400 20 900 4 700 11 100 In non conductive status 4 400 20 900 4 400 20 900 4 400 20 900 4 700 9 600 ANDE Single precision When not executed 0 360 0 240 0 180 0 120 When executed In conductive status 4 200 19 600 4 200 19 600 4 200 19 600 4 100 7 800 In non conductive status 4 200 19 600 4 200 19 600 4 200 19 600 4 400 8 200 ORE Single precision When not e...

Page 763: ...nductive status 4 500 34 700 4 500 34 700 4 500 34 700 4 000 19 600 In non conductive status 4 500 34 700 4 500 34 700 4 500 34 700 4 100 19 700 ORED Double precision When not executed 0 360 0 240 0 180 0 120 When executed In conductive status 4 700 33 200 4 700 33 200 4 700 33 200 5 000 26 300 In non conductive status 4 700 33 200 4 700 33 200 4 700 33 200 5 000 25 200 LDED Double precision In co...

Page 764: ... 8 300 39 200 8 300 39 200 6 300 13 900 AND When not executed 0 360 0 240 0 180 0 120 When executed In conductive status 7 100 36 500 7 100 36 500 7 100 36 500 6 000 16 000 In non conductive status 7 100 36 500 7 100 36 500 7 100 36 500 6 100 16 200 OR When not executed 0 360 0 240 0 180 0 120 When executed In conductive status 7 400 35 600 7 400 35 600 7 400 35 600 4 700 14 600 In non conductive ...

Page 765: ...00 60 700 78 400 DB When executed 5 750 13 300 5 750 13 300 5 750 13 300 4 900 7 500 DB When executed 5 650 13 200 5 650 13 200 5 650 13 200 5 200 11 000 DB When executed 5 750 12 700 5 750 12 700 5 750 12 700 4 900 10 200 DB When executed 5 650 12 600 5 650 12 600 5 650 12 600 5 200 8 600 DB When executed 8 750 40 200 8 750 40 200 8 750 40 200 8 300 22 200 DB When executed 5 750 21 500 5 750 21 5...

Page 766: ...ing point 1 0 3 100 22 900 3 100 22 900 3 100 22 900 2 400 3 500 BKBCD n n 1 8 700 27 600 8 700 27 600 8 700 27 600 9 700 22 000 n 96 84 200 104 000 84 200 104 000 84 200 104 000 74 200 86 500 BKBIN n n 1 8 450 28 100 8 450 28 100 8 450 28 100 8 900 16 300 n 96 56 100 75 800 56 100 75 800 56 100 75 800 58 500 65 100 ECON 3 100 21 300 3 100 21 300 3 100 21 300 4 300 6 800 EDCON 5 050 24 000 5 050 2...

Page 767: ...n 1 4 550 4 750 4 550 4 750 4 550 4 750 3 000 3 400 n 15 4 550 4 750 4 550 4 750 4 550 4 750 3 000 3 500 BRST n n 1 4 600 4 750 4 600 4 750 4 600 4 750 3 000 3 400 n 15 4 600 4 750 4 600 4 750 4 600 4 750 3 000 3 400 TEST When executed 7 250 13 200 7 250 13 200 7 250 13 200 4 400 6 900 DTEST When executed 6 950 12 900 6 950 12 900 6 950 12 900 4 500 7 000 BKRST n n 1 7 350 11 600 7 350 11 600 7 35...

Page 768: ... 96 28 900 37 100 28 900 37 100 28 900 37 100 26 900 28 700 DWSUM n n 1 8 600 26 800 8 600 26 800 8 600 26 800 5 500 7 000 n 96 56 200 74 700 56 200 74 700 56 200 74 700 53 000 56 300 MEAN n n 1 5 850 19 800 5 850 19 800 5 850 19 800 4 300 17 300 n 96 17 300 38 200 17 300 38 200 17 300 38 200 16 000 35 500 DMEAN n n 1 6 900 23 300 6 900 23 300 6 900 23 300 5 750 21 900 n 96 29 400 49 900 29 400 49...

Page 769: ... 40 200 152 000 40 200 152 000 26 300 135 000 When selecting I O outside the group only Both I O 45 800 153 000 45 800 153 000 45 800 153 000 26 100 135 000 When selecting refresh of multiple CPU high speed transmission area only When selecting communication with external devices only 18 200 89 000 18 200 89 000 18 200 89 000 7 250 54 300 FIFW Number of data points 0 6 100 14 200 6 100 14 200 6 10...

Page 770: ...00 6 000 8 500 FFFFFFFFH 7 100 18 600 7 100 18 600 7 100 18 600 6 300 8 900 DABCD 1 5 650 17 200 5 650 17 200 5 650 17 200 5 000 7 500 9999 5 700 17 200 5 700 17 200 5 700 17 200 5 000 7 500 DDABCD 1 6 850 18 300 6 850 18 300 6 850 18 300 6 200 8 800 99999999 6 850 18 300 6 850 18 300 6 850 18 300 6 200 8 800 COMRD 185 000 188 000 185 000 188 000 185 000 188 000 97 300 97 400 LEN 1 character 4 700...

Page 771: ... 600 60 300 12 100 30 800 ACOSD Double precision 19 700 60 000 19 700 60 000 19 700 60 000 11 700 28 000 ATAND Double precision 15 000 51 800 15 000 51 800 15 000 51 800 9 700 22 000 RAD Single precision 3 200 10 300 3 200 10 300 3 200 10 300 2 500 4 800 RADD Double precision 5 200 43 100 5 200 43 100 5 200 43 100 4 100 16 400 DEG Single precision 3 200 11 500 3 200 11 500 3 200 11 500 2 500 4 700...

Page 772: ...00 13 900 53 100 13 900 53 100 13 700 51 000 Point No 9 Point No 10 16 600 56 600 16 600 56 600 16 600 56 600 20 400 56 200 DSCL SM750 ON Point No 1 Point No 2 13 400 52 400 13 400 52 400 13 400 52 400 12 800 50 300 Point No 9 Point No 10 14 200 54 100 14 200 54 100 14 200 54 100 17 300 53 500 SM750 OFF Point No 1 Point No 2 12 300 53 200 12 300 53 200 12 300 53 200 11 500 51 100 Point No 9 Point ...

Page 773: ...us 8 200 25 500 8 200 25 500 6 500 25 500 8 200 25 500 Comparison of current date In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 ANDDT When not executed 0 480 0 320 0 240 0 160 Comparison of specified date In conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 200 23 400 In non conductive ...

Page 774: ...omparison of current date In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 ANDDT When not executed 0 480 0 320 0 240 0 160 Comparison of specified date In conductive status 8 200 25 500 8 200 25 500 8 200 25 500 7 200 23 400 In non conductive status 8 200 25 500 8 200 25 500 8 200 25 500 7 200 23 4...

Page 775: ...tus 8 200 25 500 8 200 25 500 6 500 25 500 7 400 23 400 Comparison of current date In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 200 ANDDT When not executed 0 480 0 320 0 240 0 160 Comparison of specified date In conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 200 23 400 In non conductive...

Page 776: ...arison of current date In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 ANDTM When not executed 0 480 0 320 0 240 0 160 Comparison of specified clock In conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 000 23 000 In non conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 000 23 000...

Page 777: ...us 8 200 25 500 8 200 25 500 6 500 25 500 7 300 23 300 Comparison of current clock In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 ANDTM When not executed 0 480 0 320 0 240 0 160 Comparison of specified clock In conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 000 23 000 In non conductiv...

Page 778: ...mparison of current clock In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 ANDTM When not executed 0 480 0 320 0 240 0 160 Comparison of specified clock In conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 000 23 000 In non conductive status 8 200 25 500 8 200 25 500 6 500 25 500 7 000 23 ...

Page 779: ...uctive status 6 500 23 100 6 500 23 100 6 500 23 100 5 900 22 100 S DATERD 9 250 51 000 9 250 51 000 9 250 51 000 7 500 23 400 S DATE No digit increase 16 800 75 400 16 800 75 400 16 800 75 400 9 100 23 400 Digit increase 16 800 75 400 16 800 75 400 16 800 75 400 8 900 22 200 S DATE No digit increase 17 600 75 300 17 600 75 300 17 600 75 300 9 000 22 200 Digit increase 16 900 75 300 16 900 75 300 ...

Page 780: ...work refresh only master station side 60 000 167 000 60 000 167 000 60 000 167 000 51 000 154 000 When selecting CC Link IE Field Network refresh only local station side 60 000 167 000 60 000 167 000 60 000 167 000 51 000 154 000 S RTREAD 12 600 65 000 12 600 65 000 12 600 65 000 8 700 60 500 S RTWRIT E 13 300 67 100 13 300 67 100 13 300 67 100 9 300 65 000 UNIRD n1 n2 n2 1 6 000 33 100 6 000 33 1...

Page 781: ...1 n2 n3 Writing to host CPU shared memory n3 1 13 500 62 300 13 500 62 300 13 500 62 300 8 600 58 300 n3 320 112 900 160 800 112 900 160 800 112 900 160 800 106 800 157 300 FROM n1 n2 n3 Reading from host CPU shared memory n3 1 12 100 58 700 12 100 58 700 12 100 58 700 8 400 52 600 n3 320 56 000 101 700 56 000 101 700 56 000 101 700 51 700 96 600 Reading from other CPU shared memory n3 1 24 400 82...

Page 782: ...erformed 107 000 124 000 75 800 89 800 75 800 89 800 75 800 89 800 NOP NOPLF PAGE 0 020 0 0095 0 0095 0 0095 LDE Single precision In conductive status 3 700 4 700 3 300 4 300 0 0285 0 0285 In non conductive status 3 800 5 000 3 400 4 500 ANDE Single precision When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status 3 300 5 800 3 000 5 100 In non conductive status 3 500 5 600...

Page 783: ... 4 700 In non conductive status 3 500 5 200 3 200 4 700 LDED Double precision In conductive status 4 100 7 700 3 500 7 200 3 500 7 200 3 500 7 200 In non conductive status 4 300 8 100 3 800 7 400 3 800 7 400 3 800 7 400 ANDED Double precision When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status 3 600 7 600 3 200 7 000 3 200 7 000 3 200 7 000 In non conductive status 3 90...

Page 784: ...onductive status 4 700 9 000 4 200 8 200 4 200 8 200 4 200 8 200 AND When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status 4 400 6 800 3 900 6 400 3 900 6 400 3 900 6 400 In non conductive status 4 500 6 700 4 000 6 300 4 000 6 300 4 000 6 300 OR When not executed 0 060 0 0285 0 0285 0 0285 When executed In conductive status 5 100 8 200 4 200 7 600 4 200 7 600 4 200 7 600...

Page 785: ... 50 400 45 600 50 400 45 600 50 400 BKCMP n n 1 8 200 10 800 7 500 10 100 7 500 10 100 7 500 10 100 n 96 59 500 63 400 47 700 50 500 47 700 50 500 47 700 50 500 BKCMP n n 1 8 200 10 600 7 500 10 000 7 500 10 000 7 500 10 000 n 96 57 400 61 700 46 400 49 000 46 400 49 000 46 400 49 000 BKCMP n n 1 8 300 10 600 7 500 10 000 7 500 10 000 7 500 10 000 n 96 59 500 63 600 47 600 50 500 47 600 50 500 47 ...

Page 786: ...le precision 0 2 300 5 000 1 800 4 700 1 800 4 700 1 800 4 700 7FFFH 2 500 5 200 2 200 4 800 2 200 4 800 2 200 4 800 DFLTD Double precision 0 2 400 5 200 2 000 4 900 2 000 4 900 2 000 4 900 7FFFFFFFH 2 700 5 400 2 300 5 100 2 300 5 100 2 300 5 100 INTD Double precision 0 2 700 4 100 2 200 4 100 2 200 4 100 2 200 4 100 32766 5 3 700 5 900 3 200 5 600 3 200 5 600 3 200 5 600 DINTD Double precision 0...

Page 787: ...5 200 8 400 SPD 0 900 1 900 0 500 1 400 0 500 1 400 0 500 1 400 PLSY 1 900 2 200 1 500 1 800 1 500 1 800 1 500 1 800 PWM 1 200 1 600 0 900 1 200 0 900 1 200 0 900 1 200 MTR 10 400 19 800 9 400 10 000 9 400 10 000 9 400 10 000 Application instruction BKAND n n 1 9 000 11 700 8 300 11 000 8 300 11 000 8 300 11 000 n 96 57 400 63 100 43 800 47 300 43 800 47 300 43 800 47 300 BKOR n n 1 7 700 10 000 7...

Page 788: ...0 3 500 4 800 n 4 5 600 6 000 4 000 5 100 4 000 5 100 4 000 5 100 NDIS When executed 11 000 13 100 11 000 13 200 11 000 13 200 11 000 13 200 NUNI When executed 10 600 12 700 7 300 13 200 7 300 13 200 7 300 13 200 WTOB n n 1 5 000 6 500 4 400 5 800 4 400 5 800 4 400 5 800 n 96 36 000 38 400 28 200 29 300 28 200 29 300 28 200 29 300 BTOW n n 1 5 100 6 100 4 600 5 500 4 600 5 500 4 600 5 500 n 96 29 ...

Page 789: ... 2 600 Return to other program 2 300 3 700 2 000 3 100 2 000 3 100 2 000 3 100 FCALL Pn Internal file pointer 3 100 4 400 2 700 3 600 2 700 3 600 2 700 3 600 Common pointer 4 000 5 700 3 600 5 100 3 600 5 100 3 600 5 100 FCALL Pn to 19 300 21 500 16 500 18 600 16 500 18 600 16 500 18 600 ECALL Pn Program name 70 300 82 300 65 900 77 600 65 900 77 600 65 900 77 600 ECALL Pn to Program name 101 000 ...

Page 790: ...sh only 12 800 33 200 12 800 33 200 12 800 33 200 12 800 33 200 When selecting I O outside the group only Input only 7 900 21 100 7 700 20 700 7 700 20 700 7 700 20 700 When selecting I O outside the group only Output only 16 900 44 800 16 500 44 200 16 500 44 200 16 500 44 200 When selecting I O outside the group only Both I O 22 600 52 600 22 400 52 600 22 400 52 600 22 400 52 600 When selecting...

Page 791: ...BINHA 1 4 400 5 900 3 800 5 200 3 800 5 200 3 800 5 200 FFFFH 4 400 5 800 3 700 5 200 3 700 5 200 3 700 5 200 DBINHA 1 5 200 6 700 4 600 6 000 4 600 6 000 4 600 6 000 FFFFFFFFH 5 100 6 500 4 600 6 000 4 600 6 000 4 600 6 000 BCDDA 1 4 300 5 800 3 600 5 000 3 600 5 000 3 600 5 000 9999 4 700 6 100 4 100 5 400 4 100 5 400 4 100 5 400 DBCDDA 1 4 800 6 300 4 000 5 500 4 000 5 500 4 000 5 500 99999999 ...

Page 792: ...XP 19 300 21 000 18 800 20 100 18 800 20 100 18 800 20 100 STRINS n 128 40 n 1 41 100 54 200 35 300 47 600 35 300 47 600 35 300 47 600 128 40 n 48 56 700 81 400 48 600 61 700 48 600 61 700 48 600 61 700 STRDEL n 128 40 n 1 39 000 49 500 34 800 44 600 34 800 44 600 34 800 44 600 128 40 n 48 36 000 45 200 29 200 38 100 29 200 38 100 29 200 38 100 SIN Single precision 4 500 6 200 4 100 5 700 4 100 5 ...

Page 793: ...2 800 9999 5 100 8 800 5 100 8 000 5 100 8 000 5 100 8 000 BDSQR 0 1 900 3 400 1 500 3 000 1 500 3 000 1 500 3 000 99999999 7 500 10 200 7 500 9 900 7 500 9 900 7 500 9 900 BSIN 8 600 15 100 8 100 14 500 8 100 14 500 8 100 14 500 BCOS 7 800 14 400 7 800 13 700 7 800 13 700 7 800 13 700 BTAN 9 000 13 800 9 000 13 300 9 000 13 300 9 000 13 300 BASIN 10 600 13 400 10 100 12 800 10 100 12 800 10 100 1...

Page 794: ...int No 1 Point No 2 11 500 22 400 10 900 21 500 10 900 21 500 10 900 21 500 Point No 9 Point No 10 13 800 24 900 12 700 23 600 12 700 23 600 12 700 23 600 SCL2 SM750 ON Point No 1 Point No 2 12 700 24 200 11 900 23 300 11 900 23 300 11 900 23 300 Point No 9 Point No 10 12 900 24 600 12 100 23 300 12 100 23 300 12 100 23 300 SM750 OFF Point No 1 Point No 2 12 300 23 400 11 500 22 600 11 500 22 600 ...

Page 795: ...Comparison of specified date In conductive status 7 200 11 400 6 500 10 700 6 500 10 700 6 500 10 700 In non conductive status 7 200 11 400 6 500 10 700 6 500 10 700 6 500 10 700 Comparison of current date In conductive status 5 700 9 900 5 300 9 300 5 300 9 300 5 300 9 300 In non conductive status 5 700 9 900 5 300 9 300 5 300 9 300 5 300 9 300 ORDT When not executed 0 008 0 038 0 038 0 038 Compa...

Page 796: ... 900 Comparison of current date In conductive status 5 900 10 000 5 500 9 700 5 500 9 700 5 500 9 700 In non conductive status 5 900 10 100 5 500 9 700 5 500 9 700 5 500 9 700 ANDDT When not executed 0 008 0 038 0 038 0 038 Comparison of specified date In conductive status 7 200 11 400 6 500 10 700 6 500 10 700 6 500 10 700 In non conductive status 7 200 11 400 6 500 10 700 6 500 10 700 6 500 10 7...

Page 797: ...ve status 7 400 11 500 6 700 10 800 6 700 10 800 6 700 10 800 In non conductive status 7 400 11 500 6 700 10 800 6 700 10 800 6 700 10 800 Comparison of current date In conductive status 5 900 10 000 5 400 9 600 5 400 9 600 5 400 9 600 In non conductive status 5 900 10 000 5 400 9 600 5 400 9 600 5 400 9 600 LDTM Comparison of specified clock In conductive status 7 300 11 500 6 700 10 800 6 700 10...

Page 798: ...TM When not executed 0 008 0 038 0 038 0 038 Comparison of specified clock In conductive status 7 000 11 500 6 300 10 800 6 300 10 800 6 300 10 800 In non conductive status 7 000 11 500 6 300 10 800 6 300 10 800 6 300 10 800 Comparison of current clock In conductive status 5 500 9 900 5 100 9 500 5 100 9 500 5 100 9 500 In non conductive status 5 500 9 900 5 100 9 500 5 100 9 500 5 100 9 500 ORTM ...

Page 799: ... 6 500 25 500 In non conductive status 8 200 25 500 8 200 25 500 6 500 25 500 6 500 25 500 Comparison of current clock In conductive status 6 500 23 100 6 500 23 100 6 500 23 100 6 500 23 100 In non conductive status 6 500 23 100 6 500 23 100 6 500 23 100 6 500 23 100 LDTM Comparison of specified clock In conductive status 7 300 11 500 6 700 10 800 6 700 10 800 6 700 10 800 In non conductive statu...

Page 800: ... 73 500 53 000 72 700 53 000 72 700 53 000 72 700 When selecting MELSECNET H refresh only normal station side When selecting CC Link IE Controller Network refresh only normal station side 29 800 61 100 29 800 60 800 29 800 60 800 29 800 60 800 When selecting CC Link IE Field Network refresh only master station side 31 500 60 000 31 000 58 000 31 000 58 000 31 000 58 000 When selecting CC Link IE F...

Page 801: ... 000 160 000 142 000 149 000 142 000 149 000 142 000 149 000 n3 1000 431 000 463 000 422 000 448 000 422 000 448 000 422 000 448 000 DFRO n1 n2 n3 Reading from host CPU shared memory n3 1 5 200 23 800 5 600 23 300 5 600 23 300 5 600 23 300 n3 320 96 400 113 200 83 600 100 800 83 600 100 800 83 600 100 800 Reading from other CPU shared memory n3 1 12 900 20 800 12 200 17 100 12 200 17 100 12 200 17...

Page 802: ...word Source 0 320 Destination 0 300 File register ZR When standard RAM is used Bit Source 0 120 0 120 0 120 0 120 Destination 0 120 0 120 0 120 0 120 Word Source 0 120 0 120 0 120 0 120 Destination 0 120 0 120 0 120 0 120 Double word Source 0 120 0 120 0 120 0 220 Destination 0 120 0 120 0 120 0 220 When SRAM card is used Q2MEM 1MBS Q2MEM 2MBS Bit Source 0 240 Destination 0 200 Word Source 0 240 D...

Page 803: ...ister ZR Extended data register D Extended link register W When standard RAM is used Bit Source 0 120 0 057 0 057 0 057 Destination 0 120 0 048 0 048 0 048 Word Source 0 120 0 057 0 057 0 057 Destination 0 120 0 048 0 048 0 048 Double word Source 0 220 0 105 0 105 0 105 Destination 0 220 0 095 0 095 0 095 When SRAM card is used Q2MEM 1MBS Q2MEM 2MBS Bit Source 0 240 0 209 0 209 0 209 Destination 0...

Page 804: ...the processing time shown in 2 to that of the instruction 3 When using an F T ST C device with an OUT SET RST instruction add the processing time for each instruction with reference to the adding time in 3 4 Since the processing time of an instruction varies depending on that of the cash function both the minimum and maximum values are described in the table 1 Subset instruction processing time ta...

Page 805: ...us 0 120 0 0285 In non conductive status AND When not executed 0 120 0 0285 When executed In conductive status In non conductive status OR When not executed 0 120 0 0285 When executed In conductive status In non conductive status LD In conductive status 0 120 0 0285 In non conductive status AND When not executed 0 120 0 0285 When executed In conductive status In non conductive status OR When not e...

Page 806: ...ctive status LDD In conductive status 0 120 0 0285 In non conductive status ANDD When not executed 0 120 0 0285 When executed In conductive status In non conductive status ORD When not executed 0 120 0 0285 When executed In conductive status In non conductive status LDD In conductive status 0 120 0 0285 In non conductive status ANDD When not executed 0 120 0 0285 When executed In conductive status...

Page 807: ... 019 DEC When executed 0 080 0 019 DDEC When executed 0 080 0 019 BCD When executed 0 160 0 057 DBCD When executed 0 240 0 095 BIN When executed 0 100 0 0285 DBIN When executed 0 100 0 0285 FLT Single precision 0 0 100 0 0475 7FFFH 0 140 0 0475 DFLT Single precision 0 0 140 0 0475 7FFFFFFFH 0 140 0 0475 INT Single precision 0 0 140 0 0475 32766 5 0 140 0 0475 DINT Single precision 0 0 140 0 0475 1...

Page 808: ...120 0 0285 DXNR When executed 0 160 0 038 ROR n n 1 2 200 4 900 1 700 2 500 n 15 2 200 4 900 1 700 2 500 RCR n n 1 2 100 4 800 1 700 3 200 n 15 2 100 4 800 1 700 3 200 ROL n n 1 2 100 4 800 1 800 3 200 n 15 2 100 4 800 1 800 3 200 RCL n n 1 2 100 5 200 1 800 2 200 n 15 2 100 5 200 1 800 2 200 DROR n n 1 2 200 5 200 1 900 2 700 n 31 2 200 5 200 1 900 2 700 DRCR n n 1 2 200 5 900 1 900 4 200 n 31 2 ...

Page 809: ...ication Location Processing Time µs L02CPU L02CPU P L26CPU BT L26CPU PBT File register R When standard RAM is used Bit Source 0 100 0 048 Destination 0 220 0 038 Word Source 0 100 0 048 Destination 0 100 0 038 Double word Source 0 200 0 095 Destination 0 200 0 086 File register ZR Extended data register D Extended link register W When standard RAM is used Bit Source 0 140 0 057 Destination 0 280 0...

Page 810: ...essing time shown in 2 to that of the instruction Since the processing time of an instruction varies depending on that of the cash function both the minimum and maximum values are described in the table a When using L02CPU L26CPU BT L02CPU P L26CPU PBT Category Instruction Condition Device Processing Time µs L02CPU L02CPU P L26CPU BT L26CPU PBT Min Max Min Max Sequence instruction ANB ORB MPS MRD ...

Page 811: ...e status 3 500 8 500 0 0285 In non conductive status 3 500 8 500 0 0285 LDE Single precision In conductive status 3 900 10 000 0 0285 In non conductive status 3 900 10 000 0 0285 ANDE Single precision When not executed 0 120 0 0285 When executed In conductive status 3 400 9 300 0 0285 In non conductive status 3 400 9 300 0 0285 ORE Single precision When not executed 0 120 0 0285 When executed In c...

Page 812: ...00 3 200 7 500 In non conductive status 4 400 15 100 3 200 7 500 ORED Double precision When not executed 0 120 0 0285 When executed In conductive status 4 500 14 900 3 400 9 200 In non conductive status 4 500 14 900 3 400 9 200 LDED Double precision In conductive status 4 800 16 000 3 500 9 000 In non conductive status 4 800 16 000 3 500 9 000 ANDED Double precision When not executed 0 120 0 0285 ...

Page 813: ...00 17 100 4 200 8 200 In non conductive status 5 600 17 100 4 200 8 200 AND When not executed 0 120 0 0285 When executed In conductive status 5 300 16 400 3 900 7 300 In non conductive status 5 300 16 400 3 900 7 300 OR When not executed 0 120 0 0285 When executed In conductive status 5 200 15 700 4 000 7 600 In non conductive status 5 200 15 700 4 000 7 600 LD In conductive status 5 600 17 100 4 ...

Page 814: ...0 DB When executed 5 100 8 700 4 800 6 700 DB When executed 4 800 8 400 4 600 6 400 DB When executed 5 100 8 700 4 800 6 700 DB When executed 8 700 18 900 8 100 11 600 DB When executed 6 100 9 100 5 800 8 800 ED Double precision 0 0 4 800 8 000 4 300 7 200 21023 21023 5 400 14 900 4 300 7 200 ED Double precision 0 0 5 500 9 800 4 800 9 200 21023 21023 6 100 17 800 4 800 9 200 ED Double precision 0...

Page 815: ...ecuted 2 500 3 700 2 500 3 300 ENEG Floating point 0 2 500 3 300 2 300 2 800 Floating point 1 0 2 800 5 600 2 500 3 900 EDNEG Floating point 0 3 000 8 800 1 800 3 100 Floating point 1 0 2 700 9 400 1 900 3 000 BKBCD n n 1 6 000 13 400 5 900 8 200 n 96 83 300 91 400 61 000 63 400 BKBIN n n 1 6 500 9 800 5 600 9 300 n 96 55 400 62 900 49 200 52 500 ECON 3 000 9 800 2 100 4 500 EDCON 3 300 10 300 2 5...

Page 816: ...00 SFTWL n1 n2 n1 16 n2 1 6 200 13 100 4 500 8 700 n1 16 n2 15 6 100 13 100 4 600 8 800 BSET n n 1 2 800 3 100 2 500 2 800 n 15 2 800 3 100 2 500 2 800 BRST n n 1 2 800 3 100 2 500 2 800 n 15 2 800 3 100 2 500 2 800 TEST When executed 4 700 6 100 3 700 4 800 DTEST When executed 4 700 6 100 3 700 4 800 BKRST n n 1 4 300 5 700 3 700 4 100 n 96 6 200 10 000 5 100 6 000 SER n n 1 All match 4 800 5 300...

Page 817: ... 300 34 300 DSORT n n 1 1 6 800 14 300 5 600 8 200 n 96 16 34 900 49 700 26 200 36 700 WSUM n n 1 5 000 7 300 4 200 5 500 n 96 28 100 30 700 21 300 22 300 DWSUM n n 1 6 100 11 300 4 800 6 100 n 96 56 200 62 100 42 700 44 000 MEAN n n 1 4 400 10 400 3 900 7 800 n 96 16 100 24 500 12 900 18 000 DMEAN n n 1 6 000 12 500 5 300 9 950 n 96 34 000 42 000 23 000 28 800 NEXT 0 940 1 400 0 770 1 200 BREAK 3...

Page 818: ...OP Number of data points 1 4 900 7 500 3 800 5 300 Number of data points 96 5 000 7 500 3 700 5 400 FINS Number of data points 0 5 400 7 500 3 700 5 300 Number of data points 96 5 000 7 400 3 700 5 300 FDEL Number of data points 1 5 700 8 300 4 200 5 800 Number of data points 96 36 900 39 300 25 400 25 900 FROM n1 n2 n3 n3 1 11 600 31 000 10 700 23 600 n3 1000 403 900 432 900 390 900 410 200 DFRO ...

Page 819: ...on 28 300 41 000 22 500 29 00 Exponent format all 6 digit specification 28 300 41 000 22 500 29 00 ASC n n 1 6 200 17 100 5 400 8 300 n 96 30 300 42 100 25 200 28 400 HEX n n 1 5 400 16 000 5 400 9 000 n 96 42 400 54 900 31 300 35 000 RIGHT n n 1 7 400 13 900 6 600 7 300 n 96 39 300 45 800 29 200 31 600 LEFT n n 1 6 900 13 400 5 900 8 200 n 96 39 300 45 800 29 200 31 500 MIDR 10 200 16 500 8 100 1...

Page 820: ...600 21 100 7 700 12 500 10 10 200 23 000 9 200 14 300 RND 1 500 2 500 0 800 1 800 SRND 1 800 2 900 1 100 2 000 BSQR 0 2 700 4 400 1 500 3 000 9999 6 100 12 500 5 100 8 000 BDSQR 0 2 700 4 400 1 500 3 000 99999999 8 500 15 200 7 500 9 900 BSIN 9 500 21 500 8 100 14 500 BCOS 9 500 21 400 7 800 13 700 BTAN 10 400 22 600 9 000 13 300 BASIN 11 800 23 600 10 100 12 800 BACOS 13 100 23 700 11 100 14 100 ...

Page 821: ...n conductive status 7 300 14 000 6 500 10 700 In non conductive status 7 300 14 000 6 500 10 700 Comparison of current date In conductive status 6 100 12 700 5 300 9 300 In non conductive status 6 100 12 700 5 300 9 300 ORDT When not executed 0 160 0 038 Comparison of specified date In conductive status 7 400 14 400 6 700 10 800 In non conductive status 7 400 14 400 6 700 10 800 Comparison of curr...

Page 822: ...tatus 7 700 14 200 6 800 10 900 Comparison of current date In conductive status 6 400 12 800 5 500 9 700 In non conductive status 6 400 12 800 5 500 9 700 ANDDT When not executed 0 160 0 038 Comparison of specified date In conductive status 7 300 14 000 6 500 10 700 In non conductive status 7 300 14 000 6 500 10 700 Comparison of current date In conductive status 6 100 12 700 5 300 9 300 In non co...

Page 823: ...fied clock In conductive status 7 300 14 100 6 600 10 800 In non conductive status 7 300 14 100 6 600 10 800 Comparison of current clock In conductive status 6 000 12 700 5 300 9 500 In non conductive status 6 000 12 700 5 300 9 500 LDTM Comparison of specified clock In conductive status 7 600 14 000 6 700 10 800 In non conductive status 7 600 14 000 6 700 10 800 Comparison of current clock In con...

Page 824: ...on conductive status 7 200 13 900 6 300 10 800 Comparison of current clock In conductive status 5 900 12 500 5 100 9 500 In non conductive status 5 900 12 500 5 100 9 500 ORTM When not executed 0 160 0 038 Comparison of specified clock In conductive status 7 300 14 100 6 600 10 800 In non conductive status 7 300 14 100 6 600 10 800 Comparison of current clock In conductive status 6 000 12 700 5 30...

Page 825: ...4 100 6 600 10 800 Comparison of current clock In conductive status 6 000 12 700 5 300 9 500 In non conductive status 6 000 12 700 5 300 9 500 SCL SM750 ON Point No 1 Point No 2 12 500 29 200 11 900 23 000 Point No 9 Point No 10 13 200 29 100 12 100 23 000 SM750 OFF Point No 1 Point No 2 12 100 28 900 10 900 22 200 Point No 9 Point No 10 13 900 30 900 12 700 23 900 DSCL SM750 ON Point No 1 Point N...

Page 826: ... 79 800 POFF 66 800 103 600 57 200 79 800 PSCAN 67 900 104 800 60 100 79 900 WDT 1 600 4 800 1 100 2 400 DUTY 4 900 10 100 4 800 9 600 TIMCHK 4 100 9 100 3 500 4 700 ZRRDB File register of standard RAM 2 900 3 300 1 800 2 100 ZRWRB File register of standard RAM 3 600 3 800 2 400 2 700 ADRSET 2 200 4 800 2 100 2 600 ZPUSH 8 000 12 000 5 800 7 500 ZPOP 8 200 10 900 5 800 6 400 S ZCOM When mounting C...

Page 827: ...e 0 100 0 048 Destination 0 100 0 038 Double word Source 0 200 0 095 Destination 0 200 0 086 File register ZR Extended data register D Extended link register W When standard RAM is used Bit Source 0 140 0 057 Destination 0 280 0 048 Word Source 0 140 0 057 Destination 0 140 0 048 Double word Source 0 240 0 105 Destination 0 240 0 095 Module access device Un G Bit Source 11 700 11 200 Destination 1...

Page 828: ...048 points 1 Link relay 2048 points 1 8192 points 1 8192 points 1 8192 points 4096 points 1024 points Link special relay 1024 points 2048 points 2048 points 56 points Timer 512 points 1 2048 points 1 2048 points 1 Total 2048 points Total 256 points Retentive timers 0 points 1 0 points 1 Counter 512 points 1 1024 points 1 1024 points 1 1024 points 256 points Data register 11136 points 1 12288 point...

Page 829: ...ctions for direct input 2 Switching between the refresh mode and direct mode is conducted with an AnNCPU DIP switch Device name QCPU LCPU AnUCPU AnACPU AnNCPU Index register Z 10 points Z0 to Z9 Other than Universal model QCPU 16 points Z0 to Z15 Universal model QCPU 20 points Z0 to Z19 20 points Z0 to Z19 7 points Z Z1 to Z6 1 point Z V 2 7 points V V1 to V6 1 point V File register 32768 points b...

Page 830: ...nUCPU AnACPU AnNCPU Bit data Bit device Word device Bit specification required Bit specification required Word data Bit device Digitspecification required Digitspecification required Digitspecification required Digitspecification required Digitspecification required Word device Double word data Bit device Digitspecification required Digitspecification required Digitspecification required Digitspec...

Page 831: ... at 100ms Designation method High speed timer Measurement unit 10ms default value Change of measurement unit at the parameter is enabled QnUCPU LCPU 0 01 to 100ms 0 01ms unit QCPU Other than QnUCPU 0 1 to 100ms 0 1ms unit Fixed at 10ms Designation method High speed timer setting Conducted by sequence program High speed timer setting Conducted at parameters Retentive timers Measurement unit Same me...

Page 832: ...or present value When OUT Cn instruction is executed When END processing is done Contact ON OFF processing Instruction QCPU LCPU AnUCPU AnACPU AnNCPU PR 1 When SM701 is OFF Output continued until 00H encountered When SM701 is ON 16 characters output When M9049 is OFF Output continued until 00H encountered When M9049 is ON 16 characters output PRC 1 When SM701 is OFF 32 character comment output Whe...

Page 833: ... for carry flag 32 bit rotation to left D Rotation data Rotation data are set at A0 and A1 D Rotation data SM700 is used for carry flag Rotation data are set at A0 and A1 M9012 is used for carry flag 16 bit data search Search results are stored at the D and D 1 devices Search results are stored at A0 and A1 32 bit data search Search results are stored at the D and D 1 devices Search results are st...

Page 834: ...ould be replaced by other instructions or deleted 2 Dedicated instructions whose names have been changed Dedicated instructions for the AnUCPU or AnACPU which have the same instruction name as is used for basic instructions and application instructions have undergone name changes in the QCPU LCPU 1 Not available on Q00J Q00 Q01CPU Universal model QCPU LCPU QCPU AnUCPU AnACPU S D and n indicate dat...

Page 835: ...low Converts 10 into a real number format data and stores the result in D0 and D1 Executes Loge10 operation and stores the result in D2 and D3 Converts 12 into a real number format data and stores the result into D4 and D5 Divides D4 and D5 12 by D0 and D1 10 and stores the result 1 2 in D6 and D7 1 2 Multiplies D2 and D3 Loge10 by D6 and D7 1 2 and stores the result in D8 and D9 Executes Loge D8 ...

Page 836: ...01 BCD 8 digit multiplication and division operations 206 BCD 8 digit square roots 540 BCD type arc cosine operation 549 BCD type arc sine operations 547 BCD type arc tangent operations 551 BCD type COS operations 544 BCD type SIN operation 542 BCD type TAN operation 546 BIN 16 bit data sort operations 375 BIN 16 bit addition and subtraction operations 188 BIN 16 bit block data comparisons 182 BIN...

Page 837: ...decimal ASCII to BIN 32 bit data 455 Conversion from Double precision to Single precision 254 Conversion from floating point angle to radian Double precision 521 Conversion from floating point angle to radian Single precision 519 Conversion from floating point data to BIN 16 bit data Double precision 240 Conversion from floating point data to BIN 16 bit data Single precision 238 Conversion from fl...

Page 838: ...designation format has been changed 831 Intelligent function module device 23 Interrupt disable 278 Interrupt enable 278 Interrupt program mask 278 J Jump to END 277 L L series 23 Ladder block parallel connection 131 Ladder block series connection 131 LCPU 23 Leading edge output 152 Left rotation of 16 bit data 333 Left rotation of 32 bit data 337 Linking character strings 225 Linking of random da...

Page 839: ...ad 132 Operation start 124 Other Convenient Instructions 287 Other instructions 167 605 Out excluding timers counters and annunciators 139 P Parallel connection 124 Pointer branch 274 Print ASCII code 432 Print comment 434 Process CPU 23 Program Branch Instructions 274 Program control instructions 597 Program Execution Control Instructions 278 Program execution status check 603 Program low speed e...

Page 840: ...precision 527 standard device registers Z 103 Structure creation instructions 383 Subroutine calls between program files 395 Subroutine output OFF calls between program files 399 Subroutine program calls 386 404 Subroutine program output OFF calls 391 Subset Processing 102 Switching file register block numbers 566 System Switching 703 T TAN operation on floating point data Double precision 508 TAN...

Page 841: ...33 BINDA P 447 BINHA P 449 BK P 220 BK P 220 BKAND P 310 BKBCD P 250 BKBIN P 251 BKCMP 182 BKCMP P 182 BKOR P 316 BKRST P 352 BKXNR P 328 BKXOR P 322 BMOV P 263 BREAK P 385 BRST P 349 BSET P 349 BSFL P 341 BSFR P 341 BSIN P 542 BSQR P 540 BTAN P 546 BTOW P 368 BXCH P 271 C CALL P 386 CCOM 412 CHK 440 CHKCIR 444 CHKEND 444 CHKST 440 CJ 274 CML P 261 COM 407 409 COMRD P 461 COS P 503 COSD P 504 D D ...

Page 842: ...L2 P 563 DSER P 354 DSFL P 345 DSFR P 345 DSORT 375 DSTR P 465 DSUM P 356 DT 581 DT 581 DT 581 DT 581 DT 581 DT 581 DTEST P 350 DTO P 428 676 DUTY 606 DVAL P 469 DWSUM P 379 DXCH P 270 DXNR P 324 DXOR P 318 DZONE P 558 E E P 208 E P 216 E P 208 E P 216 E 175 E 175 E 175 E 175 E 175 E 175 ECALL P 395 ECON P 253 ED P 212 ED P 218 ED P 212 ED P 218 ED 177 ED 177 ED 177 ED 177 ED 177 ED 177 EDCON P 25...

Page 843: ...MC 159 MCR 159 MEAN P 381 MEF 136 MEP 136 MIDR P 487 MIDW P 487 MIN P 373 MOV P 256 MPP 132 MPS 132 MRD 132 MTR 302 N NDIS P 365 NEG P 246 NEXT 383 NOP 168 NOPLF 168 NUNI P 365 O OR 124 ORB 131 ORF 126 ORFI 128 ORI 124 ORP 126 ORPI 128 OUT 139 OUT C 144 OUT F 146 OUT T 141 OUTH T 141 P PAGE n 168 PCHK 603 PLF 152 PLOADP 652 PLOW P 601 PLS 152 PLSY 300 POFF P 599 POW P 525 POWD P 526 PR 432 PRC 434...

Page 844: ...500 SIND P 501 SORT 375 SP CONTSW 703 SP DEVST 649 SP FREAD 638 SP FWRITE 628 SPD 298 SQR P 527 SQRD P 529 SRND P 539 STMR 292 STOP 167 STR P 465 STRDEL P 494 STRINS P 492 SUM P 356 SWAP P 273 T TAN P 506 TAND P 508 TEST P 350 TIMCHK 607 TM 585 TM 585 TM 585 TM 585 TM 585 TM 585 TO P 428 676 TRACE 626 TRACER 626 TTMR 291 TYPERD P 622 U UDCNT1 287 UDCNT2 289 UMSG 662 UNI P 363 UNIRD P 618 V VAL P 4...

Page 845: ...ave been avoided if functions or structures judged as necessary in the legal safety measures the user s device is subject to or as necessary by industry standards had been provided 4 Failure that could have been avoided if consumable parts battery backlight fuse etc designated in the instruction manual had been correctly serviced or replaced 5 Failure caused by external irresistible forces such as...

Page 846: ...the United States and other countries Ethernet is a trademark of Xerox Co Ltd in the United States CompactFlash is a trademark of SanDisk Corporation VxWorks Tornado WindPower WindSh and WindView are registered trademarks of Wind River Systems Inc Other company names and product names used in this document are trademarks or registered trademarks of respective owners SH NA 080809ENG J ...

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Page 850: ... Str GR 18542 Piraeus Phone 30 211 1206 900 Fax 30 211 1206 999 HUNGARY MELTRADE Kft Fertő utca 14 HU 1107 Budapest Phone 36 0 1 431 9726 Fax 36 0 1 431 9727 LATVIA Beijer Electronics SIA Ritausmas iela 23 LV 1058 Riga Phone 371 0 784 2280 Fax 371 0 784 2281 LITHUANIA Beijer Electronics UAB Savanoriu Pr 187 LT 02300 Vilnius Phone 370 0 5 232 3101 Fax 370 0 5 232 2980 EUROPEAN REPRESENTATIVES MALTA...

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