48
*1:
The number of steps may vary depending on the device and type of CPU module being used.
Note 1) The number of steps may increase due to the conditions described in Page 110, Section 3.8.
*2:
The number of steps may vary depending on the device and type of CPU module being used.
Note 1) The number of steps may increase due to the conditions described in Page 110, Section 3.8.
*3:
The number of steps may vary depending on the device and type of CPU module being used.
Note 1) The number of steps may increase due to the conditions described in Page 110, Section 3.8.
Category
Inst
ructi
on Sym
b
o
l
Symbol
Processing Details
Execution
Condition
Nu
mber o
f Ba
sic S
tep
s
Sub
set
See f
o
r Des
cr
iptio
n
Block data
exchange
BXCH
4
-
BXCHP
Exchange of
upper and
lower bytes
SWAP
3
-
SWAPP
Component
Device
Number of
Steps
QCPU
LCPU
• Word device: Internal device (except for file register ZR)
• Bit device:
Devices whose device Nos. are multiples of 16, whose digit
designation is K4, and which use no indexing.
• Constant:
No limitations
2
Devices other than above
3
Note 1)
Component
Device
Number of
Steps
High Performance model QCPU
Process CPU
Redundant CPU
• Word device: Internal device (except for file register ZR)
• Bit device:
Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no indexing.
• Constant:
No limitations
3
Devices other than above
3
Note 1)
Basic model QCPU
• Word device: Internal device (except for file register ZR)
• Bit device:
Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no indexing.
• Constant:
No limitations
(The number of steps is 3 when the above constant are used.)
2
Devices other than above
3
Note 1)
Universal model QCPU
LCPU
All devices that can be used
2
Note 1)
Component
Device
Number of
Steps
QCPU
LCPU
• Word device: Internal device (except for file register ZR)
• Bit device:
Devices whose device Nos. are multiples of 16, whose digit
designation is K4, and which use no indexing.
• Constant:
No limitations
2
Devices other than above
3
Note 1)
BXCH
n
S
D
n
(S)
(D)
BXCHP
n
S
D
SWAP
D
b0
b
1
5 to
to
b8 b7
b0
b
1
5 to
to
8 bits
b8 b7
(D)
(S)
8 bits
8 bits
8 bits
SWAPP
D