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MELSEC-Q
3 SPECIFICATIONS
3.2.2 Analog output HOLD/CLEAR function
Whether the output analog value will be retained or cleared according to the PLC CPU
operating status (RUN, STOP, and Stop error) can be set using the intelligent function
module switch (see Section 4.5).
Table 3.3 lists available analog output status based on the combinations of D/A
conversion enable/disable and CH output enable/disable.
Perform settings according to the system application.
Table 3.3 Analog output status combination list
D/A conversion
enable/disable
Setting (Un\G0)
Enable
Disable
CH output
enable/disable
flags (Y1 to Y8)
Enable
Disable
Enable or disable
Setting
combination
execution
status
HOLD/CLEAR
setting
HOLD
CLEAR
HOLD or CLEAR
HOLD or CLEAR
Analog output status when PLC
CPU is running
Outputs the analog value of
the D/A converted digital
value.
Offset
0 V/0 mA
Analog output status when PLC
CPU is stopped
Hold
Offset
Offset
0 V/0 mA
Analog output status when a
PLC CPU stop error occurs
Hold
Offset
Offset
0 V/0 mA
Analog output status when a
watchdog timer
1
error occurs
in Q64DA, Q62DA, Q68DAV or
Q68DAI
0 V/0 mA
0 V/0 mA
0 V/0 mA
0 V/0 mA
1 This occurs when program operations are not completed within the scheduled time due to a hardware
problem of the D/A conversion module. When a watchdog timer error occurs, module READY (X0) turns
OFF and the D/A conversion module RUN LED turns off.
POINT
Design the system so that the D/A conversion enable/disable setting (Un\G0)
changes to "Enable" after the external power (see Section 4.3) is supplied.
Analog output may not properly be performed if the external power is not at the
specified voltage.