Midas RTE-V831-PC, User Manual

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RTE-V831-PC USER’S MANUAL (Rev. 2.00)
21
The MCLKDIV register is used to determine the MCLK frequency.
DIV4 DIV3 DIV2 DIV1 DIV0
MCLK
49.152/(DIV + 2)
Sampling frequency
(MCLK/256)
Bytes/sec
fs * 4
0 0 0 0 0 24.576 MHz
0 0 0 0 1 16.384 MHz
0 0 0 1 0 12.288 MHz 48.0 KHz 192.0 KB
0 0 0 1 1 9.830 MHz 38.4 KHz 153.6 KB
0 0 1 0 0 8.192 MHz 32.0 KHz 128.0 KB
0 0 1 0 1 7.022 MHz 27.5 KHz 109.7 KB
0 0 1 1 0 6.144 MHz 24.0 KHz 96.0 KB
0 0 1 1 1 5.461 MHz 21.3 KHz 85.3 KB
0 1 0 0 0 4.915 MHz 19.2 KHz 76.8 KB
0 1 0 0 1 4.468 MHz 17.5 KHz 69.8 KB
0 1 0 1 0 4.096 MHz 16.0 KHz 64.0 KB
0 1 0 1 1 3.780 MHz 14.8 KHz 59.1 KB
0 1 1 0 0 3.511 MHz 13.7 KHz 54.9 KB
0 1 1 0 1 3.277 MHz 12.8 KHz 51.2 KB
0 1 1 1 0 3.072 MHz 12.0 KHz 48.0 KB
0 1 1 1 1 2.891 MHz 11.3 KHz 45.2 KB
1 0 0 0 0 2.731 MHz 10.7 KHz 42.7 KB
1 0 0 0 1 2.587 MHz 10.1 KHz 40.4 KB
1 0 0 1 0 2.458 MHz 9.6 KHz 38.4 KB
1 0 0 1 1 2.341 MHz 9.1 KHz 36.6 KB
1 0 1 0 0 2.234 MHz 8.7 KHz 34.9 KB
1 0 1 0 1 2.137 MHz 8.3 KHz 33.4 KB
1 0 1 1 0 2.048 MHz 8.0 KHz 32.0 KB
1 0 1 1 1 1.966 MHz 7.7 KHz 30.7 KB
1 1 0 0 0 1.890 MHz 7.4 KHz 29.5 KB
1 1 0 0 1 1.820 MHz 7.1 KHz 28.4 KB
1 1 0 1 0 1.755 MHz 6.9 KHz 27.4 KB
1 1 0 1 1 1.695 MHz 6.6 KHz 26.5 KB
1 1 1 0 0 1.638 MHz 6.4 KHz 25.6 KB
1 1 1 0 1 1.586 MHz 6.2 KHz 24.8 KB
1 1 1 1 0 1.536 MHz 6.0 KHz 24.0 KB
1 1 1 1 1 1.489 MHz 5.8 KHz 23.3 KB
AUDIO DATA is a data port for audio data FIFO input/output; 16-bit data is input or output, in order, from
Lch to Rch.
8.11.
m
PD63310 REGISTER: AUDIO COD. (4580-1000H TO 4580-100FH)
The
m
PD63310 register is assigned as indicated below. For details, refer to the data sheet provided with
the
m
PD63310.
Address Function D5 D4 D3 D2 D1 D0
4580-1000H Address register Register number
4500-1008H Data register Gain control data