RTE-V831-PC
USER’S MANUAL (Rev. 2.00)
12
7.
HARDWARE REFERENCES
This chapter describes the hardware of the RTE-V831-PC.
7.1.
MEMORY AND I/O MAP
The figure below shows the memory and I/O mapping on the board.
0 0 0 0 - 0 0 0 0
8 0 0 0 - 0 0 0 0
4 0 0 0 - 0 0 0 0
C S 0
space
C 0 0 0 - 0 0 0 0
D R A M
S R A M
SYSTEM-I/O
E P R O M /
Flash-ROM
Internal data RAM
C S 1
space
C S 2
space
C S 3
space
Flash-ROM
Built-in instruction RAM
Cacheable
area
Cacheable
area
Cacheable area
Uncacheable
area
ICE reserve
Uncacheable
area
C S 4
space
C S 5
space
C S 6
space
C S 7
space
E X T - B U S
S R A M : m e m a r e a
4E00-0000 - 4E07-FFFF
FE00-0000 - FE07-FFFF
D R A M : m e m a r e a
0000-0000 - 00FF-FFFF
4000-0000 - 40FF-FFFF
Flash-ROM:mem area
0200-0000 - 027F-FFFF
4200-0000 - 427F-FFFF
SYTEM IO,.... :IO area
4500-0000 - 45FF-FFFF
E P R O M , F E R O M : m e m . .
4F80-0000 - 4FFF-FFFF
FF80-0000 - FFFF-FFFF
AUDIO
Free area
EXT-BUS,.... :IO ,MEM area
4400-0000 - 440F-FFFF
Free area
Memory and I/O Mapping
[Caution]
The flash ROMs existing in the CS2 and CS7 spaces are physically identical. Before a flash
ROM can be mapped into the CS7 space, a boot program starting with a reset vector must be written.
