Microchip Technology MPLAB ICE, User Manual

Page: 100 / 192

MPLAB
®
ICE User’s Guide
DS51159B-page 100

2001 Microchip Technology Inc.
Suppose a project has the following source code:
When the
RETLW
statement of
RoutineA
is executed, a prefetch of the
next instruction in the address space (the first instruction in
RoutineB
) is
performed.
This prefetched instruction will not be executed, but the program memory
address does appear on the bus. If a trigger is set at program memory
address
RoutineB
, the prefetch done during the execution of the
RETLW
in
RoutineA
will cause the trigger to fire. To prevent this, check the Ignore
FNOP Cycles checkbox. Two points to consider when using this checkbox
are:
- Depending on the processor module, the trigger may skid one
additional cycle.
- Ignore FNOP Cycles cannot be specified when doing a Filter
Trace with a 12-bit or 16-bit core processor module.
• Trigger Status – This field indicates the status of the currently defined
trigger as the emulator is running. Example messages are:
- No trigger in use – No trigger has been applied.
- Event 3:7 – A sequential type trigger is currently processing
Event 3, which must occur seven more times before the event is
satisfied.
- In progress – A nonsequential type trigger is currently in
progress.
- Complete – The trigger has fired.
There are several buttons on the Complex Trigger Settings dialog with the
following functions.
• Load Event – Opens the Load Current Trigger Level dialog, allowing
you to load a
*.trl
file with trigger information for the active tab of the
dialog.
• Save Event – Opens the Save Current Trigger Level dialog, allowing
you to save as a
*.trl
file trigger information for the active tab of the
dialog.
• Clear Event – Clears the current trigger information in the active tab of
the dialog.
RoutineA
<code for RoutineA>
RETLW 0
RoutineB
<code for RoutineB>
RETLW 0