7I90HD 17
OPERATION
CONFIGURATION
The 7I90HD is configured at power up by a SPI FLASH memory. This flash memory
is an 8M bit chip that has space for two configuration files. Since all host interface logic on
the 7I90HD is in the FPGA, a problem with configuration means that host access will not
be possible. For this reason there are two backup methods to recover from FPGA boot
failures.
FALLBACK
The first backup system is called Fallback. The7I90HD flash memory normally
contains two configuration file images, A user image and a fallback image. If the primary
user configuration is corrupted, the FPGA will load the fallback configuration so the flash
memory image can be repaired remotely without having to resort to switching memories
or JTAG programming.
DUAL EEPROMS
The second backup method relies on the fact that there are two flash memories on
the 7I90HD card, selectable via jumper W3. If a configuration fails in such a way that it
loads correctly (has a valid CRC) but does not work, the fallback configuration will not be
invoked. To recover from this problem, the secondary flash can be selected by moving W3
to the DOWN position and using it to boot the FPGA (by cycling the power), restoring
remote access and allowing the primary configuration to be repaired via the host interface.
The backup EEPROM is write protected tp prevent accidental overwriting the
secondary (backup) configuration. If the primary EEPROM has been corrupted, you can
boot from the secondary configuration, but you must restore W3 to the UP position to allow
re-writing the primary configuration. If the secondary configuration needs to be re-written,
W4 must be installed to allow writes. Once the secondary EEPROM is written, W4 should
be removed.
