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7I90HD 11
OPERATION
FPGA
The 7I90HD use a Xilinx Spartan6 FPGA in a 144 pin TQFP package: XC6SLX9-
TQG144.
HOST COMMUNICATION
Currenty there are four different host communication options available with standard
7I90HD firmware: EPP parallel and SPI (on P4) a LBP sserial slave and LBP16 remote
HostMot2 using the RS-422 interface. EPP,SPI, and LBP16 can be used as host interfaces
to the HostMot2 suite of I/O firmware, while the LBP implementation is used for a simple
fixed purpose Smart Serial 72 bit I/O device.
EPP
The 7I90HDs EPP interface allows the 7I90HD to interface to PC parallel ports
giving a medium speed real time interface (~1 Mbyte/sec) suited to motion control
applications like LinuxCNC.
SPI
The 7I90HD SPI interface is also a medium speed real time (~1 to 5 Mbytes/sec)
interface that allows simple interfacing to microcontrollers and SOCs.
LBP
LBP is a simple binary serial master slave protocol. The LBP implementation in the
7I90HD allows the 7I90HD to be use as a simple 72 I/O Smart Serial slave for remote TTL
level interfacing.
LBP16
LBP16 is a simple binary serial master slave protocol suited to larger data blocks
than LBP. LBP16 allows very large I/O expansion capabilities while maintaining a simple
real time interface.
LBP HOST INTERFACE
The 7I90 can implement a simple remote sserial interface using LBP. This interface
provides 72 I/O bits and is appropriate for applications like OPTO22 module rack I/O. The
bit file for this mode is 7i90_ssremote.bit. For compatibility with I/O module racks, all I/O
is open drain and active low. This allows any IO pin to be used as an input or output.
Active low means a true input or output bit at the host is low at the 7I90 I/O pins. Pins that
are used as inputs must have their corresponding outputs in the false state. In addition to
the 72 GPIO bits, Three quadrature MPG counters are implemented on GPIO bits 48
through 53: 48=A0,49=B0,50=A1,51=B1,52=A2,53=B2.
A 50 ms watchdog timer is implemented and will set all outputs to a high state (via
I/O pullups) if valid communications are not received at faster than a 50 ms/packet rate.