7I43 19
SUPPLIED CONFIGURATIONS
EPPIOPR8
GENERAL
The EPPIOPR8 configuration is a simple six port GPIO configuration with EPP
interface. The GPIO is organized as six eight bit ports, each with an associated Data
Direction Register (DDR).The EPPIOPR8 configuration can be used as a starting point for
more complicated user configurations. There are two EPPIOPR8 configuration files,
EPPIO8-2.BIT for the 200K and EPPIO8-4.BIT for 400K versions of the 7I43.
PORT
DATA REG
DDR
IO BITS
CONNECTOR
0
0x10
0x20
0..7
P4
1
0x11
0x21
8..15
P4
2
0x12
0x22
16..23
P4
3
0x13
0x23
24..31
P3
4
0x14
0x24
32..39
P3
5
0x15
0x25
40..47
P3
In addition to the GPIO bits, the EPPIOPR8 configuration has a simple SPI interface
to the configuration EEPROM and a reconfiguration port.. The SPI port allows the utility
program SCM7I43P to write configuration data to the serial EEPROM. These registers are
mapped as follows:
REGISTER ADDRESS
FUNCTION
SPICS
0x7D
Single I/O bit to control SPI Chip Select (bit 0)
SPIDATA
0x7E
Eight bit SPI shift register
RECONFIG 0x7F
Reconfig - Writing 0x5A here resets FPGA
The 7I43 is delivered with the EPPIOPR8 configuration installed for factory and
initial user checking.
