7I43 18
OPERATION
STARTUP I/O STATE
When the 7I43 is used to control external equipment that is sensitive to the initial
pin states, the pre-configuration pull-ups should be enabled (W3 UP), and for most
configurations, pull-ups resistor should be configured on any I/O pin that is not driven when
configuration is complete (bi-directional pins and pins whose function is assigned by
software). Since the only definable pre-configuration state is with pull-up resistors on the
I/O, this means the proper I/O polarity is active low (so that all outputs are in the in-active
state at power up)
D5V REFERRED LOADS
When driving external loads like Solid State Relays (SSRs) with an active low
output, and the +SSR terminal connected to +5V, the 7I43 output should be configured for
5V tolerance, and the output should be driven in open drain mode. This is because the
7I43 outputs only swing to 3.3V in normal mode, leaving 1.7V (5V -3.3V) driving the SSR
when the output is high and the SSR should be off.
TERMINATION
The FPGA used on the 7I43 supports series and parallel termination that can be
programmed on a pin-for-pin basis. This feature is called DCI. The 7I43 supports DCI on
all user I/O pins. The DCI reference resistors are all 100 Ohm 1%.
