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Input Bit Map
The input bit width depends on settings of the bus width (BWS) pin.
Table 2. Input Map (See
*
See the High-Bandwidth Mode section for details on timing requirements.
**
Not encrypted when HDCP is enabled (MAX9281 only).
MODE
3-CHANNEL MODE
(BWS = LOW)
HIGH-BANDWIDTH
MODE
(BWS = MID)
4-CHANNEL MODE
(BWS = HIGH)
SIGNAL
INPUT PIN/
BIT POSITION
R[5:0]
DIN[5:0]
Used
Used
Used
G[5:0]
DIN [11:6]
Used
Used
Used
B[5:0]
DIN [17:12]
Used
Used
Used
HS, VS, DE
DIN18/HS, DIN19/VS,
DIN20/DE
Used**
Used**
Used**
R[7:6]
DIN [22:21]
Not used
Used
Used
G[7:6]
DIN [24:23]
Not used
Used
Used
B[7:6]
DIN [26:25]
Not used
Used
Used
RES, CNTL[2:1]
RES, CNTL[2:1]
Not used
Used*,**
Used**
CNTL3, CNTL0
CDS/CNTL3, MS/CNTL0
Not used
Used*,**
Not used
I
2
S/TDM
WS, SCK, SD
Used
Used
Used
AUX SIGNAL
Used
Used
Used
MAX9277/MAX9281
3.12Gbps GMSL Serializers for Coax or
STP Output Drive and LVDS Input
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