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P

PCIe

 

14

2.x

 

12

, 

14

, 

20

, 

30

, 

58

defined

 

62

PCIe slot

 

14

, 

20

–

21

power

 

23

Processing FPGA

 

11

, 

56

Q

quadrature decoders

 

52

Quadrature input

Gray code

 

52

R

requirements

computer

 

14

RGB

 

10

, 

35

, 

37

S

SDRAM

 

12

, 

53

defined

 

61

software supported

 

13

specifications

electrical

 

69

technical

 

66

–

67

synchronization and control signals

Matrox Rapixo CL Pro

 

41

, 

45

T

technical specifications

 

66

–

67

timer output

 

50

defined

 

63

triggers

 

51

U

UART

 

39

user signals

 

53

V

video sources supported

Matrox Rapixo CL Pro

 

35

monochrome

 

37

RGB

 

10

, 

35

, 

37

Summary of Contents for Rapixo CL Pro

Page 1: ...Matrox Rapixo CL Pro Installation and Hardware Reference Manual no Y11522 101 0100 August 7 2020...

Page 2: ...he loss of profits business goodwill even if advised of the possibility of such damages In no event will Matrox and its suppliers liability exceed the amount paid by you for the product Because some j...

Page 3: ...the Matrox Rapixo CL Pro package 15 Standard items 15 Available separately 16 Handling components 16 Installation 17 Chapter 2 Hardware installation 19 Installing your Matrox Rapixo CL Pro board 20 I...

Page 4: ...ication 38 UARTs 39 Acquisition Controller 39 Auxiliary signals 41 Camera control and auxiliary signals for Matrox Rapixo CL Pro DB QB 41 Camera control and auxiliary signals for Matrox Rapixo CL Pro...

Page 5: ...ors 72 External auxiliary I O connectors 75 LEDs on Matrox Rapixo CL Pro 84 PoCL LEDs 84 Board status LEDs 84 Appendix C Acknowledgments 87 UART copyright information 88 Appendix D Listing of Matrox R...

Page 6: ......

Page 7: ...Chapter 1 Chapter 1 Introduction This chapter briefly describes the features of the Matrox Rapixo CL Pro boards as well as the software that can be used with the boards...

Page 8: ...o DF Matrox Rapixo CL Pro DB and Matrox Rapixo CL Pro QB Matrox Rapixo CL Pro DB and QB support acquisition from Camera Link video sources in Base configuration DB supports simultaneous acquisition fr...

Page 9: ...T Data Clock CC 4 UART Camera Link Connector with PoCL Camera Link Connector with PoCL Opto Aux In 2 LVDS Aux In 2 LVDS Aux Out 1 TTL Aux I Os 3 Auxiliary I O interface Opto Aux In 2 LVDS Aux In 2 LVD...

Page 10: ...ux I Os 3 Auxiliary I O interface Host e bus x8 2 x PCI 4 s GB full duplex Optional CL Pro bracket adapter Opto Aux In 2 LVDS Aux In 2 LVDS Aux Out 1 TTL Aux I Os 3 Auxiliary I O interface Opto Aux In...

Page 11: ...PGA design services to generate an application specific FPGA configuration Before the Processing FPGA can process grabbed images they must be stored in on board memory If images stored in Host memory...

Page 12: ...The memory controller has multiple input ports and it has a maximum data transfer rate of 14 4 Gbytes sec Data transfer Your Matrox Rapixo CL Pro can send data to the Host at a maximum theoretical tr...

Page 13: ...measurement image registration metrology character recognition template based and for both normal and dot matrix text feature based code reading and verification 1D 2D and composite code types bead co...

Page 14: ...st MIL or one of its derivatives This software should be installed after you install your board Matrox does not guarantee compatibility with all computers that have the above specifications Please con...

Page 15: ...hould check the contents of your Matrox Rapixo CL Pro package when you first open it If something is missing or damaged contact your Matrox representative Standard items You should receive the followi...

Page 16: ...s in your computer and the circuits on your Matrox Rapixo CL Pro are sensitive to static electricity and surges Improper handling can seriously damage the circuits Be sure to drain static electricity...

Page 17: ...cal information This manual occasionally makes reference to a MIL Lite function However anything that can be accomplished with MIL Lite can also be accomplished with MIL Need help If you experience pr...

Page 18: ...18 Chapter 1 Introduction...

Page 19: ...Chapter 2 Chapter 2 Hardware installation This chapter explains how to install your Matrox Rapixo CL Pro board in your computer...

Page 20: ...with the following steps to install your board 1 Remove the cover from your computer refer to your computer s documentation for instructions 2 Check that you have an empty x8 or x16 PCIe slot in which...

Page 21: ...itional slot This slot need not be adjacent to the Matrox Rapixo CL Pro board In addition the cable adapter bracket does not plug into a slot s connector it attaches only to the back of the computer s...

Page 22: ...to avoid damaging the board Some x16 PCIe slots have a connector with a retainer You should avoid touching the latch of this retainer with the board Alternatively you can remove the latch from the re...

Page 23: ...sub menu of the Advanced Configurations menu In addition if the operating system has an ASPM for PCIe devices option disable this option as well For example under Microsoft Windows 10 open the Power d...

Page 24: ...g on the model one or two internal 10 pin auxiliary I O connectors The 32 pin auxiliary I O connector top is to attach the HD 15 cable adapter bracket while the 10 pin auxiliary I O connector bottom i...

Page 25: ...gnals Note that B is only available on Matrox Rapixo CL Pro QB and DF To access the signals of the internal auxiliary I O connectors you might have installed a cable adapter bracket It can have the fo...

Page 26: ...Pro board Camera Link connector 0 Camera Link connector 1 Camera Link connector 2 Camera Link connector 3 DB Video source 0 in Base configuration Video source 1 in Base configuration QB Video source 0...

Page 27: ...he same video source Medium Full 72 bits or 80 bits configuration the cables you choose should be of the same type and length Note however if they are not Matrox Rapixo CL Pro will adapt to any delay...

Page 28: ...the test pattern or sample image is available use the Deseralizer tool This tool will adjust values within your DCF to compensate for signal degradation due to the long cables This tool is available...

Page 29: ...Chapter 3 Chapter 3 Using multiple Matrox Rapixo CL Pro boards This chapter explainshow touse multiple Matrox Rapixo CL Pro boards...

Page 30: ...can also simultaneously capture images from video sources attached to multiple Matrox Rapixo CL Pro boards Note that the number of video sources from which you can simultaneously capture images is li...

Page 31: ...Chapter 4 Chapter 4 Matrox Rapixo CL Pro hardware reference This chapter explains the architecture features and modes of the Matrox Rapixo CL Pro hardware...

Page 32: ...o source independently from another such path on the same frame grabber On Matrox Rapixo CL Pro there are up to four acquisition paths depending on the model Digitizer MIL Lite uses the concept of a M...

Page 33: ...ART Data Clock CC 4 UART Camera Link Connector with PoCL Camera Link Connector with PoCL Opto Aux In 2 LVDS Aux In 2 LVDS Aux Out 1 TTL Aux I Os 3 Auxiliary I O interface Opto Aux In 2 LVDS Aux In 2 L...

Page 34: ...Auxiliary I O interface Opto Aux In 2 LVDS Aux In 2 LVDS Aux Out 1 TTL Aux I Os 3 Auxiliary I O interface 1 Note that without the expansion module this is a flow diagram of Matrox Ra CL DB With the ex...

Page 35: ...era Link video sources Matrox Rapixo CL Pro also supports additional types of video sources including some time multiplexed video sources Operating in Base configuration Matrox Rapixo CL Pro DB has tw...

Page 36: ...ath can grab up to 48 bits of video data when acquiring from Camera Link compliant sources or up to 64 bits when acquiring from non standard time multiplexed sources A Full type acquisition path suppo...

Page 37: ...isition path Camera Link Standard One tap 8 10 12 14 16 bit Two tap 8 10 12 bit One tap 3 x 8 bit RGB Four tap 8 bit with time multiplexing Not Camera Link Standard Two tap 14 16 bit with time multipl...

Page 38: ...a decrease in overall performance When enabled the demultiplexer assumes that two video streams share the same data path and that the streams are interleaved based on the clock cycle The demultiplexer...

Page 39: ...ontroller can perform line and frame reversal it can flip the image horizontally and or vertically On Matrox Rapixo CL Pro DB QB the acquisition controller can write to four non sequential memory regi...

Page 40: ...lvideo timing and synchronization signals The PSGs are also responsible for managing the camera control and auxiliary signals supported by the board These signals are configurable signals that can sup...

Page 41: ...onnector 1 Camera Link Connector 2 Camera Link Connector 3 M_CC_IOn n 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 for M_DEVm m 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 Functionality that can be routed Acquisition path CC1...

Page 42: ...VDS_AUX_OUT15 LVDS_AUX_OUT23 LVDS_AUX_OUT31 Timer M_TIMERn 0 1 2 1 2 1 1 2 1 2 2 1 2 1 2 3 1 2 1 2 Trigger controller affected by input signal 0 T0 T1 T2 T3 T0 T1 T2 T3 T0 T1 T2 T3 1 T2 T0 T1 T3 T0 T2...

Page 43: ...a Link Connector 3 Aux I O Connector Aux I O Connector A C B D A C B D M_AUX_IOx or M_CC_IOy for M_DEVz x 8 9 2 8 9 3 8 9 2 8 9 3 12 12 13 13 y 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 2 2 2...

Page 44: ...atrox Rapixo CL Pro DB does not have this signal LVDS cam ctrl TTL Aux I O LVDS Aux Out Camera Link Connector 0 Camera Link Connector 1 Camera Link Connector 2 Camera Link Connector 3 Aux I O Connecto...

Page 45: ...Link Connector 0 Camera Link Connector 2 Only available on Matrox Rapixo CL Pro DF M_CC_IOn n 1 2 3 4 1 2 3 4 for M_DEVm MIL constant where n and m correspond to the number in the row M_DEVm is the re...

Page 46: ..._AUX_IN26 LVDS_AUX_IN27 LVDS_AUX_OUT7 LVDS_AUX_OUT23 Timer M_TIMERn 0 1 2 1 2 1 1 2 1 2 Trigger controller affected by input signal 0 T0 T1 T2 T3 T0 T1 T2 T3 T0 T1 T2 T3 1 T0 T1 T2 T3 T0 T1 T2 T3 T0 T...

Page 47: ...Aux I O Connector Aux I O Connector A C B D A B M_AUX_IOx or M_CC_IOy for M_DEVz x 8 9 2 3 8 9 2 3 12 13 y 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 Auxiliary input signal or auxiliary I O...

Page 48: ...hat you must use to access this signal Matrox Rapixo CL Pro SF does not have this signal LVDS cam ctrl TTL Aux I O LVDS Aux Out Camera Link Connector 0 Camera Link Connector 2 Aux I O Connector Aux I...

Page 49: ...gnal Format Total of signals SF DF DB QB Nocable bracket With cable bracket Nocable bracket With cable bracket Nocable bracket With cable bracket Nocable bracket With cable bracket TTL auxiliary input...

Page 50: ...You can set up the auxiliary signals in the DCF Alternatively for most commonly used functionalities you can configure the auxiliary signals using the MIL Lite function MdigControl for example with M...

Page 51: ...roller 0 MUX TTL_AUX_IO_5 M_AUX_IO9 OPTO_AUX_IN1 M_AUX_IO7 LVDS_AUX_IN3 M_AUX_IO11 Trigger Controller 1 MUX TTL_AUX_IO_6 M_AUX_IO2 OPTO_AUX_IN8 M_AUX_IO0 LVDS_AUX_IN10 M_AUX_IO4 Trigger Controller 2 M...

Page 52: ...encoder transmits the Gray code in the reverse sequence 00 10 11 01 or 00 01 11 10 respectively Upon decoding a Gray code the quadrature decoder increments or decrements its 32 bit internal counter de...

Page 53: ...et to input The state of an auxiliary input signal is not associated with a user bit you poll the state of the signal directly To poll the state of an auxiliary input signal use MdigInquire with M_IO_...

Page 54: ...ufTransfer with M_COPY M_SCALE setting the destination buffer size smaller than the original image Note that Matrox Rapixo CL Pro does not support cropping in hardware However you can have image data...

Page 55: ...it shifted right by 8 bits depth 8 where the value of depth is 16 Input format Output format 8 bit monochrome 16 bit monochrome 24 bit packed BGR 32 bit packed BGRa 48 bit packed BGR 16 bit YUV YUYV 2...

Page 56: ...additional data traffic within the host computer Host Before the Processing FPGA can process grabbed images they must be stored in on board memory If images stored in Host memory are required they ca...

Page 57: ...ions Youcanalso chose to implement processing on your own using the Matrox FPGA Developers Toolkit FDK and C If required Matrox s FPGA design services can be employed to develop an application specifi...

Page 58: ...to communicate with the Host Under optimum conditions Matrox Rapixo CL Pro can send data to the Host at a peak transfer rate of up to 4 Gbytes sec Optimum conditions include using the board in a PCIe...

Page 59: ...Appendix A Appendix A Glossary This appendix defines some of the specialized terms used in the Matrox Rapixo CL Pro documentation...

Page 60: ...l to which the PCIe slot is configured The power saving level of the PCIe slot is initialized by the operating system Auxiliary I O Auxiliary input output Non video digital signals that can support on...

Page 61: ...ber are set to the specified camera mode which defines the format of transferred data The DCF can also configure the triggers timers and quadrature decoders DCF files have a dcf extension DDR3 SDRAM D...

Page 62: ...rs a general purpose high bandwidth interface standard for serial and parallel data interfaces that require increased bandwidth at high speed with low noise and power consumption PCIe Peripheral Compo...

Page 63: ...nown as live processing Rotary encoder A device used to convert the angular position of a shaft or axle to an analog or digital code Timer output The signal generated by one of the programmable timers...

Page 64: ...64 Appendix A Glossary...

Page 65: ...Appendix B Appendix B Technical information This appendix contains information that might be useful when installing your Matrox Rapixo CL Pro board...

Page 66: ...rox Rapixo CL Pro is available on the Matrox website under the board s PC compatibility list A proper power supply Refer to the Electrical specifications section Matrox does not guarantee compatibilit...

Page 67: ...with a Bayer color filter Bayer encoded data GRBG GBRG BGGR or RGGB is converted to RGB Can convert 8 or 16 bit monochrome or 24 or 48 bit packed BGR data to monochrome packed or planar BGR packed BG...

Page 68: ...acquisition path Two opto isolated auxiliary input signals trigger input or user input per acquisition path Has a PoCL LED for each input connector to identify whether the connector is providing power...

Page 69: ...yp low Vol 0 9 V min 1 02 V typ Differential output voltage with load of 100 Ohm 250 mV min to 450 mV max Offset voltage common mode 1 125 V min to 1 375 V max Propagation delay 2 8 ns max Input signa...

Page 70: ...o DF QB 16 76 L x 11 12 H x 3 903 W cm 6 6 x 4 376 x 1 537 from bottom edge of goldfinger to top edge of board Ventilation 150 LFM over board s through the heat sink in a single board configuration Mo...

Page 71: ...ere are two pairs of Camera Link video input connectors and two auxiliary I O connectors In addition close to the top edge of the main board there is an internal auxiliary I O connector Internal uxili...

Page 72: ...rs The Camera Link video input connectors are 26 pin high density female mini Camera Link connectors They are used to receive video input timing and synchronization signals and transmit receive commun...

Page 73: ...rTFG Serial port to frame grabber UART 8 21 X3 Video input data X3 9 22 Xclk Clock input X 10 23 X2 Video input data X2 11 24 X1 Video input data X1 12 25 X0 Video input data X0 13 Inner shield Ground...

Page 74: ...bit configuration ensure that you are connecting its cables to the appropriate connector Also ensure that the orientation of the connector is correct and do not force the connector in Accidentally con...

Page 75: ...density D subminiature 15 pin HD 15 male connectors Alternatively you can use a cable adapter bracket with a standard D subminiature 9 pin DB 9 female connector for auxiliary I O connectors B and D On...

Page 76: ...on M_DEV0 M_DEV1 and dedicated to acquisition path 0 for timer output M_TIMER2 on M_DEV0 4 5 LVDS_AUX_IN2 M_AUX_IO10 M_DEV0 LVDS auxiliary signal input for acquisition path 0 which supports trigger i...

Page 77: ...user output M_USER_BIT4 on M_DEV2 M_DEV3 and dedicated to acquisition path 2 for timer output M_TIMER2 on M_DEV2 4 5 LVDS_AUX_IN18 M_AUX_IO10 M_DEV2 LVDS auxiliary signal input for acquisition path 2...

Page 78: ...path 1 for timer output M_TIMER2 on M_DEV1 4 5 8 3 LVDS_AUX_IN10 M_AUX_IO4 M_DEV0 M_DEV1 LVDS auxiliary signal input shared between acquisition paths 0 and 1 for trigger input trigger controller 2 on...

Page 79: ...path 3 for timer output M_TIMER2 on M_DEV3 4 5 8 3 LVDS_AUX_IN26 M_AUX_IO4 M_DEV2 M_DEV3 LVDS auxiliary signal input shared between acquisition paths 2 and 3 for trigger input trigger controller 0 or...

Page 80: ...igger control 2 on acq path 0 user input user output M_USER_BIT4 on M_DEV0 or timer output M_TIMER2 on M_DEV0 4 5 LVDS_AUX_IN2 M_AUX_IO10 M_DEV0 LVDS auxiliary signal input for acquisition path 0 whic...

Page 81: ...r input user output M_USER_BIT4 on M_DEV1 and timer output M_TIMER2 on M_DEV1 4 5 LVDS_AUX_IN18 M_AUX_IO10 M_DEV1 LVDS auxiliary signal input for acquisition path 1 which supports trigger input trigge...

Page 82: ..._DEV0 4 5 8 3 LVDS_AUX_IN10 M_AUX_IO4 M_DEV0 LVDS auxiliary signal input for acquisition path 0 which supports trigger input trigger controller 2 on acq path 0 or user input 6 8 LVDS_AUX_IN11 M_AUX_IO...

Page 83: ...user output M_USER_BIT5 on M_DEV1 4 5 8 3 LVDS_AUX_IN26 M_AUX_IO4 M_DEV1 LVDS auxiliary signal input for acquisition path 1 which supports trigger input trigger controller 2 on acq path 1 or user inp...

Page 84: ...hat connector Board status LEDs Matrox Rapixo CL Pro main board has four additional status LEDs to indicate the status of each of the following the firmware configuration the FPGA configuration the po...

Page 85: ...r Off Red One or more of the on board voltage regulators did not start If your computer is on and this LED state occurs there is an issue with the voltage regulators on your Matrox Rapixo CL Pro Conta...

Page 86: ...86 Appendix B Technical information...

Page 87: ...Appendix C Appendix C Acknowledgments This appendix lists the copyright information regarding third party material used to implement components on the Matrox Rapixo CL Pro board...

Page 88: ...Neither the name of the author nor the names of other contributors may be used to endorse or promote products derived from this software without specific prior written permission THIS SOFTWARE IS PRO...

Page 89: ...Appendix D Appendix D Listing of Matrox Rapixo CL Pro boards This appendix lists the key feature changes to the Matrox Rapixo CL Pro boards...

Page 90: ...cription RAP 4G CL DB P325 000 First shipping version of Matrox Rapixo CL Pro DB RAP 4G CL SF P325 000 First shipping version of Matrox Rapixo CL Pro SF RAP 4G CL QB P325 000 First shipping version of...

Page 91: ...t 32 digitizer MIL 32 documentation conventions 12 dynamic range defined 61 E electrical specifications 69 external auxiliary I O connector 0 75 F flip 39 54 frame defined 62 G global information 66 6...

Page 92: ...ts computer 14 RGB 10 35 37 S SDRAM 12 53 defined 61 software supported 13 specifications electrical 69 technical 66 67 synchronization and control signals Matrox Rapixo CL Pro 41 45 T technical speci...

Page 93: ...nt generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of the...

Page 94: ...ue de la Classe A On suppose qu ils pr senteront la m me compatibilit dans tout syst me compatible de la Classe A Directive on Waste Electrical and Electronic Equipment WEEE Europe English European us...

Page 95: ...Limited warranty Refer to the warranty statement that came with your product...

Page 96: ......

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