47
TC94A70FG/TC94A73MFG Single-chip CD-MP3 Processor
Highlights
•
Highly integrated solution
with CD servo, RF amp,
1 Mbit SRAM, multi-bit DA
converter and audio DSP
with firmware library
including MP3, WMA,
ATRAC CD, AAC, graphic
equalization, and popular
surround sound formats
•
Pin compatibility between
monolithic TC94A70FG
and system-in-package
(SiP) TC94A73MFG with
16 Mbit DRAM enables a
single hardware design to
support standard and
electronic shock protection
(ESP) CD playback
versions
•
Macro commands simplify
software programming
•
Programmable RAM and
pin-compatible ROM
solutions enable
customization and
reduced time to market.
Description
TC94A70FG and TC94A73MFG are highly
integrated, high-performance CD-MP3
solutions that enable playback of CD and
multiple compressed audio formats from a
single chip. Featuring high-quality audio
output in I
2
S, S/PDIF or analog stereo
formats, the TC94A70FG integrates an RF
amplifier, CD servo, audio DSP, 1 Mbit
SRAM, and a multi-bit DA converter in a
CMOS monolithic IC. To the TC94A70FG
feature set, the TC94A73MFG adds
electronic shock protection (ESP) with
DSP firmware and 16 Mbit DRAM in an
SiP solution. TC94A70FG and
TC94A73MFG are available in standard
ROM versions or can also be customized
to specific customer requirements using
an extensive and growing DSP firmware
library including MP3, WMA, ATRAC CD,
AAC, graphic equalization and popular
surround sound formats. Pin compatibility
between the monolithic TC94A70FG and
the SiP TC94A73MFG minimizes the
Product Brief
TC94A70FG/TC94A73MFG
Single-chip CD-MP3 Processor
1
engineering investment needed to upgrade
TC94A70FG CD playback designs with ESP.
New product design is further aided by
programmable RAM and macro commands
that simplify CD mechanism playback and
compressed audio tag and file management.
High integration, software customization, and
pin-compatible packages make TC94A70FG
and TC94A73MFG ideal for compressed
audio CD players where low cost, feature
flexibility and time to market are key
selection criteria.
Supported Product Families
•
TC94A70FG-002:
MP3, WMA9 and ATRAC CD DSP
firmware
•
TC94A70FG-005:
MP3, WMA9, ATRAC CD and AAC DSP
firmware
•
TC94A73MFG-201:
MP3, WMA9 and ESP DSP firmware
•
TC94A73MFG-202:
MP3, WMA9, ATRAC CD, AAC and ESP
DSP firmware
CD–RF
IN
CD–RF
Amp
Audio
DAC
Analog
Post
Filter
Servo
ADC
CDP
DSP
24-Bit
DSP
1 Mbit
SRAM
Servo
Processor
Servo
DAC
Peripheral
I/F
PLL/VCO
16 Mbit
DRAM
Audio
Out
3.3V
1.5V
SiP
TC94A73MFG
Only
Block Diagram
www.Toshiba.com/taec
TC94A70FG
3/27
05/09/16
Pin description (top view)
L
P
F
N
T
M
A
X
T
M
A
X
S
P
D
o
P
V
D
D
3
A
W
R
C
V
S
S
V
D
D
1
L
R
C
K
i(
P
i6
)
B
C
K
i(
P
i5
)
A
iN
(P
i4
)
L
R
C
K
(P
o
9
)
B
C
K
(P
o
8
)
A
o
U
T
1
(P
o
7
)
D
o
U
T
(P
o
6
)
M
S
G
P
IN
Z
D
E
T
S
F
S
Y
IP
F
S
B
O
K
S
B
S
Y
V
D
D
T
3
V
S
S
P
io
3
7
5
7
4
7
3
7
2
7
1
7
0
6
9
6
8
6
7
6
6
6
5
6
4
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
LPFo
76
50
Pio2
PVREF
77
49
Pio1
VCoF
78
48
Pio0
PVSS3
79
47
AoUT2(Po5)
SLCo
80
46
AoUT3(Po4)
RFi
81
45
IRQ
RFRPi
82
44
TEST
RFEQo
83
43
/CCE
VRo
84
42
BUCK(CLK)
RESiN
85
41
BUS3(Si)
VMDiR
86
40
BUS2(So)
TESTR
87
39
BUS1
AGCi
88
38
BUS0
RFo
89
37
/RST
RVDD3
90
36
SRAMSTB
LDo
91
35
VDDM1
MDi
92
34
VDD1
RVSS3
93
33
VSS
FNi2
94
32
VDDT3
FNi1
95
31
DVSS3
FPi2
96
30
Lo
FPi1
97
29
DVR
TPi
98
28
DVDD3
TNPC
99
27
Ro
TNi
100
26
DVSS3
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
A
V
S
S
3
R
F
Z
i
R
F
R
P
S
B
A
D
/
R
F
D
C
F
E
i
T
E
i
T
E
Z
i
A
V
D
D
3
F
o
o
T
R
o
V
R
E
F
F
M
o
D
M
o
V
S
S
P
3
V
C
O
i
V
D
D
P
3
V
D
D
1
V
S
S
F
G
iN
io
0
(/
H
S
o
)
io
1
(/
U
H
S
o
)
X
V
S
S
3
X
i
X
o
X
V
D
D
3
Zipang
1chip CDMP3
TC94A70FG
TC94A70FG
4/27
05/09/16
1. Pin Descriptions
Pin
No.
Symbol
I/O
Description
Default
Remarks
1
AVSS3
－
Grounding pin for 3.3V CD analog circuits.
－
2
RFZi
I
3AI/F
Input pin for RF ripple zero-cross signal.
I
Connect to RFRP by
0.033uF
3
RFRP
O
3AI/F
RF ripple signal output pin.
O
4
SBAD/RFDC
O
3AI/F
Sub beam addition signal or
RFDC (Hologram PUH RF peak detection
signal) signal output pin
O
5
FEi
O
3AI/F
Focus error signal input pin.
O
6
TEi
O
3AI/F
Tracking error signal input pin.
O
Monitor pin for the signal.
7
TEZi
I
3AI/F
Tracking error signal zero-cross input pin.
I
Connect to TEI by 0.033uF
8
AVDD3
－
Power supply pin for 3.3 V CD analog
circuits.
－
9
Foo
O
3AI/F
Focus servo equalizer output pin.
O
10 TRo
O
3AI/F
Tracking servo equalizer output pin.
O
Built-in series resister 3.3k
Ω
11 VREF
－
Reference voltage pin for analog
circuits(1.65V)
－
Connect to VRO and
PVREF. Connect 0.1uF
12 FMo
O
3AI/F
Feed servo equalizer output pin.
O
13 DMo
O
3AI/F
Disc servo equalizer output pin
O
Built-in series resister
3.3k
Ω
3-state output
(AVDD3,AVSS3,VREF)
14 VSSP3
－
Grounding pin for 3.3V DSP VCO circuits.
－
15 VCOi
I
3AI/F
DSP VCO control voltage inputr pin.
I
16 VDDP3
－
Power supply pin for 3.3V DSP VCO
circuit.
－
17 VDD1
－
Power supply pin for 1.5V digital circuit
－
18 VSS
－
Grounding pin for 1.5V digital circuit.
－
19 FGiN
I
3I/F
FG signal input pin for CAV.
CLV: "L", CAV: FG input
I
Analog input
20 io0(/HSo)
I/O
3I/F
General Input/output port -0 (CD)
(Playback speed mode flag output pin.)
I
Schmitt input
CMOS PORT
21 io1(/UHSo)
I/O
3I/F
General Input/output port -1 (CD)
(Playback speed mode flag output pin.)
I
Schmitt input
CMOS PORT
22 XVSS3
－
Grounding pin for 3.3V system clock
oscillator circuit.
－
23 Xi
I
3AI/F
Input pin for system clock oscillator
Circuit (External Rfb=1M
:
)
I
X'tal
24 Xo
O
3AI/F
Output pin for system clock oscillator
circuit
O
X'tal
25 XVDD3
－
Power supply pin for 3.3 V system clock
oscillator circuit
－
TC94A70FG
5/27
05/09/16
Pin
No.
Symbol
I/O
Description
Default
Remarks
26 DVSS3
－
Grounding pin for 3.3V DAC circuit
－
27 Ro
O
3AI/F
R channel audio output pin of Audio DAC.
O
28 DVDD3
－
Power supply pin for 3.3V Audio DAC
circuit.
－
29 DVR
－
Reference voltage pin for Audio DAC.
－
30 Lo
O
3AI/F
L channel audio output pin of Audio DAC
O
31 DVSS3
－
Grounding pin for 3.3V Audio DAC circuit
－
No capacitor required to
DVR pin when built-in
audio DAC is not in use,
however , connect 3.3V to
DVDD3 and GND to
DVSS3.
32 VDDT3
－
Power supply pin for 3.3 V digital I/O circuit.
－
For CD and DSP I/O
33 VSS
－
Grounding pin for 3.3V digital circuit
－
-
34 VDD1
－
Power supply pin for 1.5V digital circuit.
－
-
35 VDDM1
－
Power supply pin for 1.5V 1Mbit SRAM.
－
36 SRAMSTB
I
3I/F
1Mbit SRAM stand-by pin
I
Schmitt input
37 /RST
I
3I/F
Reset signal input pin.
I
Schmitt input
38 BUS0
IO
3I/F
Data input/output pin -0 for
microcontroller interface
I
Schmitt input
CMOS PORT
39 BUS1
IO
3I/F
Data input/output pin -1 for
microcontroller interface
I
Schmitt input
CMOS PORT
40 BUS2(So)
IO
3I/F
Data input/output pin -2 for
microcontroller interface (Serial output)
I
Schmitt input
CMOS PORT
41 BUS3(Si)
IO
3I/F
Data input/output pin -3 for
microcontroller interface (Serial input)
I
Schmitt input
CMOS PORT
42 BUCK(CLK)
I
3I/F
Clock input pin for the microcontroller
interface. (Clock input for Serial
communication interface)
I
Schmitt input
43 /CCE
I
3I/F
Chip enable signal input pin for
microcontroller interface.
I
Schmitt input
44 TEST
I
3I/F
Setting pin for LSI test mode.
(Connect to GND in normal operation)
I
Schmitt input
45 IRQ
I
3I/F
DSP interruption pin.(Pull down by 100k
:
when not in use)
I
Schmitt input
46 AoUT3(Po4)
O
3I/F
Audio data output pin -3 (DSP general
output port -4)
O
CMOS PORT
47 AoUT2(Po5)
O
3I/F
Audio data output pin -2 (DSP general
output port -5)
O
CMOS PORT
48 Pio0
I/O
3I/F
DSP general input/output port -0
I
Schmitt input
CMOS PORT
49 Pio1
I/O
3I/F
DSP general input/output port -1
I
Schmitt input
CMOS PORT
50 Pio2
I/O
3I/F
DSP general input/output port -2
I
Schmitt input
CMOS PORT
51 Pio3
I/O
3I/F
DSP general input/output port -3
I
Schmitt input
CMOS PORT
52 VSS
－
Grounding pin for 3.3V digital circuit
－
-
53 VDDT3
－
Power supply pin for 3.3 V digital I/O circuit.
－
For CD and DSP I/O
54 SBSY
O
3I/F
Sub code block sync output pin
O
CMOS PORT
55 SBOK
O
3I/F
CRCC check result output pin for sub code
Q data.
O
CMOS PORT
IC31 : TC94A70FG
