LTC4110
29
4110fb
OPERATION
LABEL
DESCRIPTION
ChargerStatus() – Read Only. The SMBus host uses this command to read the LTC4110’s charge status bits.
AC_PRESENT
Set to 1 when suffi cient input voltage (DCDIV > V
AC
+ V
ACH
and DCIN above UVLO) available and switches load from
battery to main supply. Zero indicates backup mode engaged.
BATTERY_PRESENT
BATTERY_PRESENT is set if a battery is present, otherwise it is cleared. The LTC4110 uses the SafetySignal to
determine battery presence. If the LTC4110 detects a RES_OR condition, the BATTERY_PRESENT bit is cleared
immediately. The LTC4110 will not set the BATTERY_PRESENT bit until it successfully samples the SafetySignal
twice and does not detect a RES_OR condition on either sampling. If AC is not present (DCDIV < V
AC
or DCIN
below UVLO), this bit may not be set for up to one-half second after the battery is connected to the SafetySignal.
The ChargingCurrent() and ChargingVoltage() register values are immediately cleared whenever this bit is cleared.
Charging will never be allowed if this bit is cleared.
ALARM_INHIBITED
ALARM_INHIBITED bit is set if a valid AlarmWarning() message has been received and charging is inhibited as a
result. This bit is cleared if POR_RESET is set, both ChargingVoltage() and ChargingCurrent() are rewritten to the
LTC4110, the power is removed (DCDIV < V
AC
or DCIN below UVLO), the SHDN pin is set high, or if a battery is
removed.
RES_UR
Set to 1 when NTC pin is below 500
Ω
typical. This bit is never set when TYPE pin selects SLA battery..
RES_HOT
The RES_HOT bit is set only when the SafetySignal resistance is less than 3k
Ω
(3.1kΩ for SLA) typical, which
indicates a hot battery. The RES_HOT bit will be set whenever the RES_UR bit is set.
RES_COLD
The RES_COLD bit is set only when the SafetySignal resistance value is greater than 30k
Ω
typical. The SafetySignal
indicates a cold battery. The RES_COLD bit will be set whenever the RES_OR bit is set. This bit is the same as
RES_OR for SLA.
RES_OR
The RES_OR bit is set when the SafetySignal resistance value is above 100k
Ω
(114kΩ for SLA) typical. The
SafetySiganl indicates an open circuit.
LEVEL:3/LEVEL:2
The LTC4110 always reports itself as a Level 2 Smart Battery Charger.
CHARGE_INHIBITED
Indicates charge inhibited is enabled when set to a one. This is a duplicate of the CHARGE_INHIBIT bit in the
BBuStatus() register.
ChargingCurrent() – Write Only. The battery, system host or other master device sends the desired charging current to the LTC4110.
ChargingCurrent()
LTC4110 only monitors for zero or non-zero values. A value of zero will stop the charger. A non-zero value here, and
for ChargingVoltage(), will restart the charger.
ChargingVoltage() – Write Only. The Battery, System Host or other master device sends the desired charging voltage to the LTC4110.
ChargingVoltage()
LTC4110 only monitors for zero or non-zero values. A value of zero will stop the charger. A non-zero value here, and
for ChargingCurrent(), will restart the charger.
AlarmWarning() – Write Only. The Smart Battery, acting as a bus master device, sends the AlarmWarning() message to the LTC4110 to notify it that one or
more alarm conditions exist. Alarm indications are encoded as bit fi elds in the battery’s status register, which is then sent to the LTC4110 by this function.
Only the OVER_CHARGED_ALARM, TERMINATE_CHARGE_ALARM,RESERVED_ALARM, OVER_TEMP_ALARM and TERMINATE_DISCHARGE_ALARM
bits are supported by the LTC4110. The ALARM_INHIBITED bit in the ChargerStatus() register indicates whether a charging process or a calibration
process was halted by a write to this register.
OVER_CHARGED_ALARM
Set to one indicates battery has been overcharged and stops charge. Setting this bit will only stop a charging
process (default = zero).
TERMINATE_CHARGE_ALARM
Set to one indicates battery requesting charge termination. Setting this bit will only stop a charging process (default
= zero).
RESERVED_ALARM
Set to one for reserved alarm condition. Setting this bit will stop both a calibration process and a charging process
(default = zero).
Table 6. Register Command Set Descriptions (XxxxXxxx() – Register Byte, XXXXXXXX – Status Bit)
