AMM5A & AMM5B • SSI, BiSS, & RS-485
At each change of the clock signal and at each subsequent rising edge (
2
) one
bit is clocked out at a time, up to LSB, so completing the data word
transmission. The cycle ends at the last rising edge of the clock signal (
3
). This
means that up to n + 1 rising edges of the clock signals are required for each
data word transmission (where n is the bit resolution); for instance, a 13-bit
encoder needs 14 clock edges. If the number of clocks is greater than the
number of bits of the data word, then the system will send a zero (low logic
level signal) at each additional clock, zeros will either lead (LSB ALIGNED
protocol) or follow (MSB ALIGNED protocol) or lead and/or follow (TREE FORMAT
protocol) the data word. After the period Tm monoflop time, having a typical
duration of 12 µsec, calculated from the end of the clock signal transmission,
the encoder is then ready for the next transmission and therefore the data
signal is switched high.
The clock signal has a typical logic level of 5V, the same as the output signal
which has customarily a logic level of 5V in compliance with RS-422 standard.
The output code can be Binary or Gray (see the order code).
5.2 “MSB left aligned” protocol
“MSB left aligned” protocol allows to left align the bits, beginning from MSB
(most significant bit) to LSB (least significant bit); MSB is then sent at the first
clock cycle. If the number of clock signals is higher than the data bits, then
unused bits are forced to logic level low (0) and follow the data word. This
protocol can be used in encoders having any resolution.
The number of clocks to be sent to the encoder must equal the number of data
bits at least, anyway it can be higher, as stated previously. The great advantage
of this protocol over the TREE format or the LSB RIGHT ALIGNED format is that
data can be transmitted with a minimum time loss and Tm monoflop time can
immediately follow the data bits without any additional clock signal.
The length of the word is variable according to the resolution, as shown in the
following table.
Model
Length of the word
Max. number of
information
AMM5A17/1BG1...
AMM5B17/1BG1...
17 bits
131,072 cpr
AMM5A21/1BG1...
AMM5B21/1BG1...
21 bits
2,097,152 cpr
AMM5A23/1BG1...
AMM5B23/1BG1...
23 bits
8,388,608 cpr
AMM5A17/65KBG1...
AMM5B17/65KBG1...
17 + 16 bits
8,589,934,592 cpr
AMM5A21/65KBG1...
AMM5B21/65KBG1...
21 + 16 bits
137,438,953,472 cpr
AMM5A23/65KBG1...
AMM5B23/65KBG1...
23 + 16 bits
549,755,813,888 cpr
The output code is BINARY (see the order code).
MAN AMM5A_B SSI_BiSS_RS485 E 1.9.odt
5 - SSI interface
28 of 56
