21
Pin No.
Symbol
I/O
Description
83
AO2F
O
1, 0
CH2•DAC•PWM output
84
AV
DD
4
Analog power supply
85
AV
DD
5
Power supply for master clock
86
XTLO
O
1, 0
X'tal oscillation circuit output of master clock.
87
XTLI
I
X'tal oscillation circuit input of master clock.
88
AV
SS
5
GND for master clock
89
AV
SS
3
Analog GND
91
AO1F
O
1, 0
CH1•DAC•PWM output
92
AO1R
O
1, 0
CH1•DAC•PWM output (reverse phase)
93
AV
DD
3
Analog power supply
94
AV
DD
4
Digital power supply
95
SENS
O
1, Z,0
SENS output
96
DIRC
I
For 1 track jump
97
SCLK
I
Clock for SENS serial data
98
ATSK
I
Pin for Anti-shock
99
DATA
I
Digital Data input from CPU
100
XLAT
I
Latch input from CPU
101
CLOK
I
Serial Data transfer clock input from CPU
102
DV
SS
4
Digital GND
103
COUT
O
1, 0
Track number count signal output
104
MIRR
O
1, 0
Mirror signal output
105
DFCT
O
1, 0
Defect signal output
106
FOK
O
1, 0
Focus OK output
111
TESTA
Test pin
112
PWMI
I
Input of spindle control
113
FSW
O
1, Z, 0
Output used to switch the spindle motor output filter.
114
MON
O
1, 0
Output for spindle motor ON/OFF control
115
MDP
O
1, 0
Output for spindle motor servo control
116
MDS
O
1, 0
Output for spindle motor servo control
117
LOCK
O
1, 0
Output is "H" when the GFS signal sampled at 460Hz is "H". Output is "L" when the
GFS signal is "L" 8 or more times is succession.
118
SSTP
I
Disc inner periphery detection signal input
119
DV
SS
5
Digital GND
120
SFDR
O
1, 0
Slide drive output
121
SRDR
O
1, 0
Slide drive output
122
TFDR
O
1, 0
Tracking drive output
